Wafer Processing

WAFER PROCESSING ARTICLES



Inside Owens Design's turnkey metrology automation platform

07/07/2009  SST's Debra Vogler visited Owens Design before SEMICON West to see its newest platform, the Element and discuss the company's design process, with which OEMs can deploy a semiconductor "fab-ready" metrology tool.

Report from the VLSI Symposium: Less spirited, still informative

07/06/2009  This year's VLSI Symposium (June 14-17, Kyoto, Japan) was not as spirited as the past two years, which featured hot topics like high-k/metal gate approaches and bulk vs. SOI CMOS and planar vs. FinFETs, notes John O. Borland, in an exclusive report for SST. Nonetheless, many interesting papers and discussions emerged, notably finding out who else is adopting the same HK+MG scheme, and various analyses of device variability.

Upgrade from KLA-Tencor provides access to design layout files

07/06/2009  KLA-Tencor's new upgrade package for its 28XX broadband brightfield inspection systems enables access to standard IC design layout files, from which the inspection system can use knowledge of the defect's location within the circuit to better estimate its probability of affecting device yield.

Enabling 22nm litho with double-sided silicon wafer polishing process

07/03/2009  Peter Wolters CEO Kay Peterson tells SST how three key capabilities in the company's new double-sided polishing tools meet lithography challenges for 22nm and beyond semiconductor manufacturing.

Semilab adds materials analysis to metrology scheme

06/30/2009  Chris Moore, leader of Semilab's new USA division, talks to SST about the company's latest acquisition of materials analysis firm SDI, its assembled roster of metrology technologies, and a possible consequence of stalled 450mm discussions: equipment leasing.

Collaboration, manufacturing innovation vital for next-generation foundries

06/26/2009  Samsung engineers discuss advancements in manufacturing using the company's S1 fab, a state-of-the-art 300mm foundry line, as an example in the areas of patterning and closed loop variation control systems.

SEMICON West Exhibitor's Products

06/22/2009  Following are some of the booth highlights from companies exhibiting at SEMICON West, July 14–16, 2009 in San Francisco, CA. Booth demonstrations include cleaning products for flip chips, bonded wafer inspection systems, airborne particle sensor/monitors, die-attach systems, and more for semiconductor manufacturing, packaging, and test.

Intel Research Day: Update on EUV, other projects

06/19/2009  A highlight at Intel's annual research open house held this week, amid general updates on eco-innovation, 3D graphics, mobility, and enterprise computing, was a roundtable discussion of the company's manufacturing research, including a summary of the status of EUV.

Analyst: Wafer demand spike in 2Q is temporary

06/15/2009  Silicon wafer demand "rebounded strongly" in the second quarter of 2009, but look for a moderated recovery through the rest of the year and a less-than-pretty yearly picture, according to a report from Gartner.

Vanderbilt researchers make filler-less freestanding nanofilms

06/10/2009  June 10, 2009: Vanderbilt physicists have found a way to make freestanding nanoparticle films, without any additive, that are strong and resilient enough to pick up and move with tweezers -- making them easy to incorporate into microelectronic devices.

Xradia adds 3-D X-ray capabilities to Nanolab Technologies

06/09/2009  June 9, 2009: Xradia Inc. and NanoLab Technologies Inc. have formed a partnership to offer 3D X-ray imaging as part of a service model to help address semiconductor packaging development and failure analysis challenges.

Reports: Taiwan to relax 300mm investment to China

06/08/2009  Multiple media reports indicate Taiwan authorities are mulling over plans to relax restrictions on local companies investing in leading-edge chipmaking operations in mainland China.

Applied targets 22nm copper barrier or seed PVD

06/02/2009 

Applied Materials exec Marek Radko gives SST a tour of its new Endura CuBS RFX PVD system, qualified for copper barrier/seed deposition technology at 32nm and 22nm for production of logic and flash memory.

Applied targets 22nm copper barrier/seed PVD

06/02/2009  Applied Materials exec Marek Radko gives SST a tour of its new Endura CuBS RFX PVD system, qualified for copper barrier/seed deposition technology at 32nm and 22nm for production of logic and flash memory.

PVD System for 3D Packaging

06/01/2009  The Applied Materials' Charger UBM PVD system was designed for under-bump metallization (UBM), redistribution layer and CMOS image sensor applications. Its linear architecture is said to more than double the wafer output of other systems. In addition, its proprietary Isani wafer treatment technology allows the UBM system to process ten times more wafers between servicing.

Sanyo tops 23% c-Si solar cell efficiency

05/28/2009  May 27, 2009 - Sanyo Electric says it has ratcheted up the conversion efficiency of its crystalline silicon (c-Si) solar cells to 23.0% thanks to improvements in the heterojunction quality, absorption loss, and resistance loss.

ECS Day 1: Forging ahead undaunted

05/27/2009  Techcet's Michael A. Fury reports exclusively for SST from this week's spring meeting of the Electrochemical Society. On tap for Day 1: a CMP symposium, combinatorial discovery methods for fuel cells, carbon nanotubes in nanophotonics, and energy storage.

SEMI: Wafer shipments hit seven-year low

05/20/2009  The latest data nugget describing the low depths being plumbed by the semiconductor industry: silicon wafer shipments are still at a low not seen since mid-2001, and one metric of decline goes back even further.

Chip backend consolidation looms after decline in 2008

05/18/2009  Semiconductor packaging/assembly/test companies are gently ratcheting up their manufacturing capacity, but it won't be enough to prevent a culling of the herd, with nearly 20 (mostly older) facilities likely to be shuttered within a span of two years, according to new analyses from Gartner. And an improving outlook won't be enough to salvage what will likely be "one of the worst years in the SATS industry's modern era."




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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