Wafer Processing

WAFER PROCESSING ARTICLES



Angled Top-down Grind Method for Improved Via Filling Analysis

05/15/2009  but more effective — method is to perform a horizontal cross-section.

Sustainable, environmentally responsible controls and practices for the PV industry

05/14/2009  With the rapid increase in demand (both consumer and commercial) for PV products, it is essential that the PV industry fulfill the perception of being a green industry by avoiding many of the past environmental, health & safety (EHS) pitfalls encountered during the expansion of similar high-technology industries, says Andy McIntyre from EORM.

TSMC eyeing PV inroads?

05/13/2009  Top global foundry Taiwan Semiconductor Manufacturing Co. is looking to broaden its profile (and boost margins) by exploring work in the renewable energy sector, notably solar panels and photovoltaics, according to local reports.

Doubleheader out of SEMATECH's RMDC

05/12/2009  A recent collaboration between SEMATECH and Japan's TOK presents an opportunity for a look at the consortium's Resist Materials and Development Center, and its 22nm litho efforts and progress toward "manufacturable EUV."

Microbridge and e-test opens defectivity reduction

05/05/2009  In BEOL lithography layers, microbridge defects can manifest as catastrophic single-line open circuit faults in the metal lines of the finished device. Enhanced filtration of bi-layer resist and post-develop ozonated UPW is shown to contribute significantly to reduction in post-litho microbridge defects, and ultimately reduction in single-line opens at e-test.

MEMC, Conergy at odds over wafer supply redo

04/30/2009  Amid several recent examples of silicon supply contract renegotiations (and for equipment too), one partnership has taken an unusual turn: Conergy plans to sue MEMC in order to terminate (and renegotiate) their already-reduced 10-year contract, days after MEMC indicated it wouldn't budge on the terms.

Inside Novellus's tungsten CVD process for 32nm

04/27/2009  Get a sneak-peek at Novellus' new CoolFill tungsten CVD process, which the company says offers a larger process window to achieve void-free fill that meets the ITRS' electrical property requirements for 32nm DRAM and logic devices.

Searching for the bottom: Half the equation fulfilled?

04/20/2009  The market for chip tools is still awful, but a slowing in declines in tool orders may offer some hope, and what may be the first step in a long road back to an industry turnaround.

MRS Spring Day 4: eCMP alive, Si stretchable, but no brain testing

04/18/2009  In an exclusive daily blog for SST, Techcet's Michael A. Fury summarizes the day's papers, including several on eCMP, an "elegant" application of CMP to fix SiGe strain channels, and still-stealth "digital CMP." Other notable papers described work on CNT fabrication and electronic devices, inkjet printing to replace sputtering in displays, and optical screening for metal hydrides.

MRS Spring Day 2: Combinatorial screening for Ta metal gates, supercritical CO2 tricks, CMP's too thirsty

04/16/2009  In an exclusive daily blog for SST, Techcet's Michael A. Fury summarizes papers and discussion spanning nanocrystal structures for memory devices, combinatorial screening for metal gate alloys contacting a HfO2 gate dielectric, more uses for supercritical CO2, and various aspects of chemical mechanical planarization.

Analyst: Foundries heating up, but is it sustainable?

04/14/2009  Activity among the top global foundries is heating up, with shipments expected to surge as much as 50% in 2Q09, according to an analyst -- but it's too soon to invoke the "R" word (recovery) just yet.

The Riley Report

04/14/2009  Non-traditional Applications of Jet Dispensing
by George A. Riley, Contributing Editor
While jetting is common in semiconductor packaging, it is finding new applications in emerging fields. At the recent SMTA Pan Pacific Symposium, Alec Barbiarz of Asymtek described jetting opportunities in medical analytics, high-intensity lighting, active-matrix displays, green energy, and 3D assemblies.

MIT makes 36nm lines with "interference" litho step

04/14/2009  A team of researchers at MIT have produced 36nm-wide lines using interference patterns and a photochromic material, and say the technique could be extended down to patterns on the scale of individual molecules.

Gartner: Few unscathed in worse-than-thought 2008

04/13/2009  A month ago Gartner pegged preliminary 2008 capex at a -25% slide to ~$33.46B. Turns out the firm was about $3B on the high side -- its "final" tally pegs 2008 semiconductor capex at just $30.7B, down -31.7% from 2007.

3D IC Technology: Interconnect for the 21st Century

04/13/2009  By Paul Enquist and Chris Sanders, Ziptronix, Inc.
In 3D IC technology, thinned, planar circuits are stacked and interconnected using through silicon vias (TSVs). 3D ICs have the potential to alleviate scaling limitations, increase performance by reducing signal delays, and reduce cost. Enabling technologies for 3D IC include TSV formation, thinning, and alignment and bonding. Realizing the full potential of this technology requires a scaleable approach to 3D IC fabrication.

Researchers to develop point-of-care HIV nanosensors

04/06/2009  April 6, 2009: The London Centre for Nanotechnology will develop a new device to enable people living with HIV to monitor their own health and the effectiveness of their treatments, thanks to a $3 million EPSRC (Engineering and Physical Sciences Research Council) grant.

Light cycle: Recycling PV materials

04/06/2009  Alongside the photovoltaic market's extraordinary growth is a need for a sustainable method for disposal of PV modules once they reach the end of their life. To this end there is busy development of strategies and techniques that make the most of the valuable materials contained in their products and simultaneously improve their positive environmental impact.

Qimonda 300mm Fab For Sale

04/02/2009  APRIL 2, 2009

Automation is key to getting lean for 450mm manufacturing

04/01/2009  ISMI has been the leader in implementing small-lot manufacturing and single wafer processing for 300mm Prime and next-generation factory (NGF) 450mm manufacturing.

Metrology firm gears up during downturn

03/31/2009  Budapest, Hungary-based Semilab is staking its claim in the metrology sector with a pair of new acquisitions to broaden its portfolio and cement a foothold in Tier 1 fabs. Chris Moore, president/CEO of Semilab AMS, tells SST how the company has built up a portfolio of technologies to address critical applications. Also on his mind: the need for suppliers to build critical mass, what Tier 1 fabs are receptive to right now, and the state of 450mm tool development.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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