Wafer Processing

WAFER PROCESSING ARTICLES



Thermal Test Chip

02/16/2009  By Bernie Siegal, Thermal Engineering Associates, Inc.
A thermal test chip is usually designed to help thermal engineers answer critical thermal packaging or material questions. These chips either target general purpose applications, or thermal simulation of a very specific application chip. General-purpose chips must meet some key requirements. This article outlines these requirements, and describes a chip that meets them in the simplest manner possible.

SEMI maps PV standards effort

02/05/2009  SEMI has released a "guidance document" for a photovoltaic standards roadmap that lists dozens of standards and guidelines it says are applicable to PV manufacturing to save costs and spark innovation.

ISMI launches ESH center for green tech work

02/03/2009 

International SEMATECH Manufacturing Initiative (ISMI), the global consortium of major semiconductor manufacturers, today announced the launch of its new Environment, Safety & Health (ESH) Technology Center in Austin, Texas. The Center will be dedicated to providing green technology solutions that lead to reduced energy consumption, lower costs, and greater productivity in semiconductor manufacturing.

Change in ISMI membership model enables ESH efforts

02/03/2009 

International SEMATECH Manufacturing Initiative (ISMI) has launched a new Environment, Safety & Health (ESH) Technology Center in Austin, Texas, dedicated to providing green technology solutions that lead to reduced energy consumption, lower costs, and greater productivity in semiconductor manufacturing.

Rapid elimination of microbubbles for photochemical filter startup

01/30/2009  In photochemical purification applications, bubble elimination is as important as particle removal. This paper describes a technique developed to rapidly eliminate microbubbles -- which affect yield -- during filter startup in a two-stage dispense system. Experimental results suggest that providing a constant pressure to the fluid after wetting the filter makes it possible to effectively eliminate microbubbles in the fluid.

SVTC, Entrepix expand CMP work to 300mm

01/28/2009  An extended partnership between SVTC and Entrepix widens their outsourced CMP services to 300mm wafers, for both semiconductor manufacturers and suppliers -- and, execs tell SST, gets them on an early track for growth areas several years down the road.

Change in ISMI membership model enables ESH efforts

01/28/2009  Acknowledging industry demand to apply green technology in semiconductor manufacturing -- despite the current economic climate -- SEMATECH/ISMI have created a new Environment, Safety & Health (ESH) Technology Center in Austin, TX.

A reliability engineer's dream comes along

01/27/2009  SST's Debra Vogler examines Crossing Automation's new family of modular automation components for vacuum wafer handling systems, and sees the realization of long-recommended reliability practices for semiconductor equipment -- during the challenging business times that they're most needed.

TSV First and Last: Through-Si Via Technologies for 3D SIC and 3D WLP

01/21/2009  Part 2
By Jan Provoost and Eric Beyne, IMEC
3D SIC uses a via first approach to connect circuits at the global IC level. 3D WLP uses a via last approach to connect circuits at the bond pad level. Both these approaches occupy a separate space on the 3D roadmap. This article, presented in two parts, offers both options and describes the process to realize them.

DALSA launches first phase of new 200mm MEMS line

01/08/2009  January 8, 2009: DALSA Semiconductor says it has launched the first phase of a 200mm MEMS manufacturing line at its semiconductor wafer foundry in Bromont, Quebec, Canada, following several new MEMS supply contracts the company has recently received for delivery of product in 2009 and for new product development.

The year ahead: A time for innovation

01/08/2009  Technology-driven growth is still possible in the current downturn, according to SST's poll of executives from across the semiconductor manufacturing supply chain. Even during an economic slump, they remain optimistic about two things: the continuing need to innovate, and the ineveitable upturn.

The global economic crisis: A boon for solar energy?

01/08/2009  Facing one of the most serious global financial crises in decades, companies have as their highest priorities the reduction of expenditures and improvement in operational efficiency. These necessary steps remind us once again of the semiconductor industry's cyclical nature, and that these downturns have been the incubators for change, which result in a stronger industry in the long run.

Vertical integration in materials needed to deliver a more attractive COO model

01/08/2009  In 2009, materials and chemistry will continue to play an important role in semiconductor development. Given the current global economic climate, we expect to see an increased focus on cost of ownership (COO), along with greater collaboration throughout the supply chain as companies look to partner for expertise and spread both cost/risk and potential rewards.

Technology-driven growth still possible in current downturn

01/08/2009  Though we find ourselves in a deep cyclical downturn made worse by chaos in international financial markets, IC manufacturers must continue to make critical investments in new and emerging technologies that will define the competitive landscape when the next upswing materializes. Technological innovation has been the lifeblood of our industry since its inception. We have grown used to surmounting insurmountable barriers with creative solutions to often unanticipated problems.

Effective partnering and an outsourced service/process model needed in 2009

01/08/2009  Looking ahead to 2009, we believe the semiconductor market will continue further down the newly split paths as announced in the 2007 ITRS Roadmap. That is, there are now two distinct groups of device manufacturers: 1) The leading edge (scaling) -- "More Moore," with a focus on 300mm and larger wafers, and 90nm and smaller technology nodes; and 2) functional diversification/mainstream -- "More than Moore," with a focus on 200mm and smaller wafers, and 90nm and larger technology nodes.

In 2009, implement strategies to improve equipment productivity

01/08/2009  Managing costs and optimizing productivity are increasingly important in enabling semiconductor manufacturers to retain profitability. New strategies and timely solutions are needed to optimize fab output through enhancing equipment productivity and asset life extension. To meet these challenges, we anticipate 2009 will see greater collaboration between equipment suppliers and semiconductor manufacturers, leading to innovative solutions to address these important factors.

Tough times require cost control and advanced technology

01/08/2009  The chip industry is bracing for a challenging 2009 as consumers rein in spending and electronics suppliers plan for reduced production -- at least through the first half of the year. But if there's one constant in the industry, besides the cycles, it's that technology continues to march on. IC manufacturers are determined to continue advancing their technology roadmaps, which call for rolling out 32nm or 28nm devices, in order to maintain their competitive edge.

Fab management software critical to profitability improvement in current market

01/08/2009  With our industry in a cyclical downturn exacerbated by the worldwide financial crisis, we are challenged to do everything possible to maintain profitability. Unfortunately, times such as these can also increase aversion to perceived risk, resulting in missed opportunities for incremental but significant gains. We would do well to take our lead from the automotive industry, in which competitors embraced a philosophy of "constant improvement" over the approach of being only "good enough."

EV Group and Brewer Science Establish Ultra-thin Wafer Bonding Lab

01/07/2009  In response to a call for localized support and increased demand of 3D IC process development in Asia Pacific, EV Group (EVG) and Brewer Science, Inc. have set out to outfit an ultra-thin wafer bonding lab in Taiwan. To this end, the companies announced the installation of an EVG 500 series wafer-bonding system at Brewer Science's Taiwan applications lab in Hsinchu Science Park.

Ushio, Intel give funding to EUV/DUV firm Energetiq

01/07/2009  January 7, 2009: Energetiq Technology Inc., a developer and manufacturer of specialized short-wavelength light products that enable nano-scale structures, has raised additional capital in its Series C round of financing, led by new investor Ushio Inc. and existing investors including Intel Capital and Shea Ventures.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

Sponsored By:

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