11/20/2008  CD-STEM technology has been successfully deployed in thin-film magnetic head wafer production environment where it has generated immediate, measurable benefits in effective yield management.

11/18/2008  by Julia Goldstein, Ph.D. contributing editor
Speakers at MEPTEC's Packaging Developments and Innovations Symposium, November 13, 2008 in San Jose, CA, presented various new technologies to enable package miniaturization while keeping costs in check. Much of the focus was on materials innovations that optimize the existing infrastructure. One departure from that was discussions surrounding through silicon via (TSV) advancements.

11/17/2008  The WDF 12DP is designed to address increased demand for probing ultrathin and diced wafers, and wafer-level testing of chip-scale and wafer-level packaging, stacked, and 3D technologies, as well as KGD testing of ultra-hin wafers, singulated wafers, and strips on a dicing frame.

11/14/2008  Worldwide silicon wafer shipments slowed nearly 3% in 3Q08, their biggest quarterly dip in nearly six years, following what had been a nice recovery in the second quarter, before the macroeconomic climate soured, according to new data from SEMI's Silicon Manufacturers Group (SMG).

11/13/2008  Response surface methods (RSM) provide statistically validated predictive models that can be manipulated for finding optimal process configurations that exhibit minimal variability. This article introduces two RSM enhancements that focus on achieving robust operating conditions.

11/12/2008  November 12, 2008: Suss MicroTec Test Systems, a premier supplier of wafer-level test solutions for semiconductor devices, has announced the iVista LC high-resolution digital microscope, to meet the increasing need in failure-analysis labs for an advanced microscopy tool capable of delivering high-resolution digital images in conjunction with laser-cutting capabilities.

11/11/2008  SMIC has finalized terms to receive long-rumored investment from an outside investor -- Datang Telecom will invest $172M in equity for a 16.6% stake in the chipmaker, implying new foundry business for 3G communications chips and inroads into several related customer sectors.

11/06/2008  Next-Generation Factory (NGF) concepts under the International SEMATECH Manufacturing Initiative (ISMI) call for new standards and more accessible tool operating data so that chipmakers and tool suppliers can collaborate on improving tool utilization and productivity. Many presentations at the recent ISMI Symposium on Manufacturing Effectiveness probed different aspects of this emerging collaboration.

11/04/2008  November 4, 2008: Oregon researchers have synthesized an elusive metal-hydroxide compound in sufficient and rapidly produced yields, potentially paving the way for improved precursor inks that could boost semiconductor capabilities for large-area applications. The key to a "bottom-up" production of possibly the first heterometallic gallium-indium hydroxide nanocluster was the substitution of nitroso-butylamine as an additive in place of nitrosobenzene.

11/04/2008  FSI exec Scott Becker tells SST how the closed-chamber design of the company's new Orion single-wafer cleaning system addresses cleaning-related issues for 32nm and 22nm process technologies, such as material loss and galvanic corrosion.

11/03/2008  Synergetix test socket interposers for wafer-level chip scale package (WLCSP) testing are used for vertical probing applications. The interposers have a plastic assembly containing IDI's semiconductor probe technology built in. Combined with an easy-to-design-and-fabricate load board, interposers require minimal attention throughout their life cycle.

11/01/2008  The 3D stacked IC (3D-IC) approach calls for a combination of standard single damascene techniques, extreme wafer thinning, and direct Cu-Cu thermo-compression bonding.

11/01/2008  Through silicon vias (TSVs) are a key component in 3D integration technology. TSV’s improve electrical performance, reduce power consumption, shrink device sizes, and potentially lower costs.

11/01/2008  Clean the wafer not the probe card

10/30/2008  TDI, an Oxford Instruments company, talks with SST about its hydride vapor phase epitaxy (HVPE) technology, which shows promise in growth of high-quality InGaN layers for blue-green LED production.

10/30/2008  Walden C. Rhines, Chairman and CEO, Mentor Graphics, Corp. will be giving the keynote address at the GSA Semiconductor Leaders Forum on November 5, 2008 in Hsinchu, Taiwan, addressing the belief that the electronics industry is maturing, and its glory days are over.

10/29/2008  SUSS MicroTec and Surface Technology Systems (STS) are once again hosting a technology roadshow in five major Asian locations from October 29 to November 7. Similar to the US roadshow last spring, the series of one-day events is intended to provide a comprehensive overview of the latest developments 3D Integration and advanced packaging.

10/28/2008  Many OEMs are holding off on the usual holiday-season production ramp amid expectations of weak consumer demand due to the global economic crisis, and this is creating a ripple effect all along the electronic systems supply chain from ODMs and EMS companies to chip packaging and foundries, and ultimately causing a shortfall in 4Q08 chip orders, notes Gartner in a new research report.

10/24/2008  A clear understanding of the physical origin of image CD and placement variations will make it possible for EUV users and optical proximity correction (OPC) vendors to develop OPC strategies at the 22nm and 16nm device nodes to effectively compensate for them.

10/24/2008  When the next upturn comes, chipmakers aim to have much leaner, more agile fab operations ready to capitalize on it. That was a dominant theme at the International SEMATECH Manufacturing Initiative (ISMI) conference in Austin, TX (Oct. 22-23). Chip factories will also run greener, cutting costs at the same time, by using less energy, water, chemicals, and other consumables.