BY MASAHIKO HIRO AND CRAIG C. SCHUCKERT
Self-imaging polymer systems offer ease of use and improved resolution
The microelectronics industry is currently investigating the integration of more spin-applied high-temperature polymers into a variety of new packaging applications. The advent of self-imaging or photodefinable polymer systems has made the patterning of these materials considerably easier than dry-etch processing and offers significantly improved resolution over wet-etch processing. The processing and performance of a new series of polyimides with cured film thicknesses in the range of 10 to 40 µm will be investigated in this article. Such issues as photosensitivity, resolution, residual stress and metal migration will also be addressed.
Packaging Developments
The demand for chip-scale packaging (CSP) is projected to escalate as integrated circuits (ICs) continue to get smaller and denser to meet the demands of smaller and lighter electronic products. CSP offers several strategic benefits to design engineers who must face the challenges of integration and component-size reduction. In addition to shrinking the package size, CSP effectively shrinks the length of internal wiring, which in turn increases signal speed and reduces noise at faster clock speeds. New packaging designs should also reduce packaging costs and be compatible with production processes and tools currently used in wafer fabs and thin-film packaging houses.
 Figure 1. Three chip-scale packaging configurations. |
In a conventional process, the wafers are fabricated up through the deposition of the primary or secondary passivation layer. The wafers are then sent to be diced and packaged, frequently at an external packaging house to mount the die onto lead frames, and to wirebond and mold them into a conventional plastic package. A typical CSP process, after primary passivation, converts the wafer into chip-scale packages in the same fab or a similar facility capable of performing metallization, polymeric deposition and solder plating. Through the application of thin-film runners, stress-absorbing polymeric layers and solder bumping, the chips on the wafer can be configured into chip-scale packages before dicing (and without leaving the fab). Separate bump-assembly-test (BAT) fabs are also being configured to carry out this process on wafers shipped with a primary passivation layer.
Spin-applied Polyimides
Polyimide-based polymeric layers have reliably served as dielectric and passivation layers in the fabrication of ICs for many years.1 More recently, they have been used on memory and logic chips as stress-buffer passivation layers (SBPs). Film thicknesses typically range from 4 to 8 µm.
Figure 1 shows three CSP designs. Polyimides appear well-suited for single- and two-layer bond pad redistribution (BPR) applications. These materials exhibit exceptional thermal and mechanical properties because of their high molecular weight and aromatic structure. The films can be readily integrated in multi-layer stacks because of a relatively low coefficient of thermal expansion (CTE) and a high glass-transition temperature (Tg) of 300 to 400°C. The dielectric constants of these polymers (~ 3.0) are well below those of oxides.
 Figure 2. Graphic comparison of the processing steps associated with wet-etch and photodefinable polyimide. |
Photodefinable polyimides (PDPIs) were developed to simplify processing routes and improve production yields. Studies show that the resolution and critical dimension (CD) control associated with these photodefinable layers are improved over those attainable from wet-etch patterning of non-photodefinable polyimide precursors (Figure 2).2
 Table 1. Some PDPIs specific to processing parameters. |
Producers of PDPIs generally offer a variety of photodefinable products (Table 1) tailored around a given fab's photolithographic capabilities, as well as developer and rinse preferences. PDPIs are developed for a range of high-performance packaging applications, from stress-buffer passivation and controlled collapse chip connection (C-4) stress relief layers to dielectric layers used for chip-scale BPR. Several performance properties help make this material useful for these target applications:
- Thermal and mechanical properties: Tg = 350°C (measured using dynamic mechanical analysis) and elongation values of 50 percent after high-temperature thermal cycling at 375°C.
- Base resin has a high degree of i-line and g-line transparency, which is advantageous for cured film thicknesses in excess of 10 µm.
- Some PDPI products have demonstrated resolution exceeding 1:1, a wide process latitude and room-temperature stability that exceeds five weeks.
Material Challenges
While packaging designers must face the challenges of introducing smaller, more integrated packages at a lower cost, suppliers of spin-applied polymeric coatings have to tackle similar technical challenges associated with the new prototypes:
- Thin-film multi-layer capability
- Thick, cured polymer films that can exceed 35 µm
- High aspect ratios
- Tapered sidewalls
- Compatibility with a variety of substrates
- Low stress levels to prevent warpage
- High photospeed and short develop times
- Thermal and chemical stability
- Copper metallization compatibility.
Polyimides offer many of the capabilities needed to meet these structural requirements. Additional development work was necessary, however, to produce a reliable PDPI to meet these challenges with a system that combined good imaging qualities with satisfactory thermal and mechanical properties and a >25 µm film thickness capability. Based on the imaging quality and cured film properties, a thicker film version of negative-tone PDPI seemed like a logical base polymer for new thin-film packaging applications.
Figure 3a details the basic PDPI chemical reactions that occur during processing for the negative-tone PDPI used in this study. It demonstrates the PDPI precursor before and after imaging, and the subsequent conversion to a polyimide film after cure. Figure 3b illustrates the photo-chemistry mechanism that occurs during imaging. These reactions depict the excitation of a photosensitizer during irradiation, which releases free radical groups. The released radicals react with added monomers and the reactive side-chains of the polymer precursor, forming a cross-linked network across the exposed portions of the film, which becomes insoluble to the PDPI developer.
 Table 2. Measured vs. targeted cured film properties. |
Table 2 lists the lithographic and cured film properties of two thicker film versions of PDPI (one currently available and the other in development) compared to the target values around which the new coatings were designed. With a tensile strength measured at 200 Mpa and residual stress levels of approximately 35 to 36 Mpa, these systems can yield cured film thicknesses up to 50 µm.
 Table 3. Typical process conditions for a 40-µm cured PDPI film. |
Table 3 details typical processing conditions for a 40-µm cured film. An exposure energy of about 225 mJ was used in conjunction with a 60-second post-exposure bake (PEB). Development can be accomplished with either puddle or spin-spray techniques, with a 10-second overlap suggested between develop and rinse. The minimum resolution was 30 µm. Figure 4 shows the spin speed curves for two thick-film PDPIs as functions of soft-baked and cured-film thicknesses.
 Figure 4. Spin speed curves for two versions of thick-film photodefinable polyimides. |
Experience shows that the PEB is a critical step in achieving optimum resolution with thicker PDPI films. PEBs of 90, 100 and 110°C all showed a 95+ percent film retention, with exposure energies ranging from 180 mJ/cm2 to 720 mJ/cm2. The exposure energy also has an impact on resolution. Using a 100°C PEB, exposure energies of 180 mJ/cm2 and 360 mJ/cm2 were compared in the definition of 30-µm lines and spaces and 40-µm vias. An exposure of 180 mJ/cm2 produced better resolution than the higher exposure energy of 360 mJ/cm2 in 40-µm cured films (Figure 5).
 Figure 5. Resolution achieved in 40-µm cured films using PEB and exposure energies of 180 mJ/cm2 and 360 mJ/cm2. |
The study measured three critical cured-film properties of major concern to circuit designers using negative-tone PDPIs: residual stress, adhesion and copper ion migration. A stress tester was used to measure stress levels on cured films on single and multiple-layer stacks, and the recorded stress levels ranged from 33 Mpa for a 5-µm layer to 37 Mpa for a single-layer 40-µm film. It is encouraging to note that the residual stress in a triple stack (40-µm layers) was in the same range (recorded at 35 Mpa).
Strong adhesion of polymer films to metal layers and various substrates is essential for the fabrication of reliable circuits. Engineers coated cured films of polyimide over bare silicon, silicon nitride, copper, aluminum and nickel. They then measured the adhesion strength both before and after pressure-cooker testing (PCT). The adhesion strengths measured before PCT ranged from 7.0 to 7.8 kg/mm2. After a 121°C PCT at 2 barr for 168 hours, very little change was observed in adhesion to the various substrates, including copper. In some cases, the measured values were slightly higher, with recorded values ranging from 6.2 to 7.9 kg/mm2 after PCT.
Industry experts have identified copper ion migration through polyimide films as a possible problem in multi-layer circuits. To further investigate this phenomenon, engineers built test structures on silicon substrates with patterned copper layers, cover-coated them with PDPI, and took them through an extended 350°C curing process. They made cross-sections of the test structures and checked for copper ion migration using both SEM and EDAX analysis. Both cases showed no ion migration. Future tests will include further attempts to characterize copper ion migration though polymeric films.
Summary
As new, thicker film versions of photodefinable polyimide undergo development for CSP, a newly developed negative tone PDPI is now capable of achieving a cured film thickness of 40 µm. Using broadband lithography tools and a PEB, a resolution of 30-µm lines and spaces and 40-µm vias are possible with exposure energies as low as 180 mJ. Continued studies will include attempts to further characterize adhesion and metal migration on this new series of spin-applied polymers for advanced packaging. AP
References:
- L. Larson, “A Silicon and Aluminum Dynamic Memory Technology,” IBM Journal of Research & Development, Vol. 24, Number 3, May 1980, pp. 268-282.
- W. Wilkens and C. Schuckert, “Reducing Polyimide Cure Time for MCM-D,” Advanced Packaging, November 1999, pp. 42-46.
- S. Hall and C. Schuckert, “Single Mask Wafer Overcoat Process Using Photodefinable Polyimide,” Solid State Technology, October 1999, pp. 95-96.
MASAHIKO HIRO, staff researcher, can be contacted at HD MicroSystems, 4-13-1, Higashi-cho, Hitachi, Ibaraki 317-8555 Japan; 81-294-23-8973; Fax: 81-294-22-3793; E-mail: [email protected]. CRAIG C. SCHUCKERT, product manager, can be contacted at HD MicroSystems, P.O. Box 80010, BMP 10-2206, Wilmington, DE 19880-0010; 302-892-0548; Fax: 302-892-0597; E-mail: [email protected].
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