by Ed Korczynski, Senior Technical Editor
Experts at the recent daylong International Wafer-Level Packaging Conference in San Jose expressed confidence that technology integration can create a manufacturable fab flow using through-silicon vias. But while 3D-WLP is already commercially viable, wire-bonding already can handle up to 16 chips, and two-level connections can be easily flip-chipped. So let’s acknowledge the elephant in the room: besides MEMS and optoelectronics, does anyone really need TSVs for commercial ICs?
Good Article