Soitec launches FD-SOI pilot line in Singapore

Soitec, a designer and manufacturer of semiconductor materials for the electronics industry, is launching a pilot line to produce fully depleted silicon-on-insulator (FD-SOI) wafers in its Singapore wafer fab. This is the first stage in beginning FD-SOI production in Singapore and providing multi-site FD-SOI substrate sourcing to the global semiconductor market.

“Our decision to launch this FD-SOI line in Singapore as well as the decision we already made to ramp up our FD-SOI production in France are based on direct customer demand,” said Paul Boudre, CEO of Soitec. “These are very important milestones for Soitec and the expanding FD-SOI ecosystem. In Singapore, we plan to get full qualification at the customer level in the first half of 2019 and then increase capacity in line with market commitment.”

The FD-SOI ecosystem continues to strengthen and the use of FD-SOI technology is progressing. Multiple foundries, IDMs and fabless customers are engaged with a growing number of FD-SOI tape-outs and wafer starts. FD-SOI offers a unique value proposition for low-power applications, which makes it well suited for rapidly growing electronic market segments such as mobile processing, IoT, automotive and industrial.

Soitec reports that its investment in Singapore to launch its FD-SOI pilot line is approximately US$40 million, to be spent over a 24-month period.


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One thought on “Soitec launches FD-SOI pilot line in Singapore

  1. Sang Kim

    About decade ago IBM created an International SOI consortium and then faded away. The followings are some important facts challenging validity of FDSOI: first, the 28nm bulk planar is volume manufactured for several years by major semiconductor companies such as Intel, TSMC, Samsung, GF and others but not 28nm FDSOI yet. Why not? Simply because the LDD(lightly doped drain) required for hot carrier reliability for 28nm bulk planar can’t be implemented in such a 7nm thin SOI layer for 28nm FDSOI. Therefore, the hot carrier reliability is a major critical issue with 28nm FDSOI with no LDD, and has to be addressed because the hot carrier effects will become worse as 28nm FDSOI is scaled to 22nm node, 14nm node and beyond. So, how do you cope with hot carrier reliability for 28nm FDSOI with no LDD? Implement LDD in 7nm thin SOI layer for 28nm FDSOI? Dose GF’s 22FDX has LDD built in? Not likely. Therefore, 28nm FDSOI and GF’s22FDX have to resolve first the hot carrier reliability issue to become a viable technology. Other critical issues with GF’s 22nmFDX are: suppose that GF’s 22nmFDX is off, applying zero volt to the gate and one volt to the drain, large punch-though leakage currents could occur at such un-doped short channel device, resulting in device failure. Next, suppose applying one volt to the gate and drain or device is on. A large number of hot electron and hole pairs are generated near the drain by impact ionization. Electrons drift to the drain with no harm but where the holes to go? The vast majority holes go toward the source, resulting in device failure.

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