Yearly Archives: 2017

TowerJazz, the global specialty foundry, and Crocus, a developer of TMR magnetic sensor technology and embedded MRAM, today announce volume manufacturing of Crocus TMR (Tunnel MagnetoResistance) sensors, using TowerJazz’s 0.13um CMOS process with a dedicated magnetic module in the Cu BEOL. With Crocus’ magnetic process, know-how and IP, and TowerJazz’s process technology and integration expertise, Crocus has successfully licensed the TMR technology to an automotive Tier 1 customer, bringing increased business to both companies.

According to a 2016 MarketsandMarkets report, the overall magnetic field sensors market was valued at USD $2.25 billion in 2015 and is expected to reach S4.16 billion by 2022, at a CAGR of 8.87% between 2016 and 2022. The growth of this market is driven by the rising demand for MEMS-based sensors across industry verticals, surge in the automotive industry, increasing demand for high-quality sensing devices, and continuous growth in consumer electronics applications.

Magnetic transducers which sense magnetic field strength are widely used in modern industry and electronics to measure current, position, motion, direction, and other physical parameters. Crocus’ TMR technology is a CMOS-based, robust technology capable of offering important advantages in sensitivity, performance, power consumption, size and full integration with CMOS to create monolithic single die ICs. Benefits to customers come in the form of low power, a robust design and high temperature performance. Crocus TMR solutions are ideally suited for many applications ranging from IoT to consumer, medical, automotive and industrial equipment.

“We selected TowerJazz because of their high flexibility and capabilities to adapt their TS13 platform to incorporate our TMR technology which includes magnetic materials that are typically not used in CMOS. TowerJazz’s vast manufacturing expertise is enabling us to successfully fulfill the needs of several market sectors combined with increased performance required in next-generation sensors. TowerJazz has been our development partner for many years and together we have achieved technology maturity leading to expanded business and successful licensing of Crocus IP,” said Michel Desbard, Crocus CEO.

“As the demand for IoT applications in our daily life is ever-increasing, there is an even greater need for intelligent sensing, low power and improved performance. Crocus’ successful licensing of their IP, along with TowerJazz’s manufacturing capability and know-how, enables us to deliver highly-advanced and competitive embedded-solutions to multiple customers in various markets. Through our partnership with Crocus, we are broadening our presence in the sensors’ market, complementing our MEMS and image sensing programs,” said Zmira Shternfeld-Lavie, VP of TOPS BU and R&D Process Engineering.”

Crocus’s TMR magnetic sensor is expected to displace existing sensor technologies in many applications. Crocus’ TMR magnetic sensor product family includes multiple architectures which are based on its Magnetic Logic Unit, a disruptive CMOS-based rugged magnetic technology.

IDTechEx predict that 2017 will be the first billion dollar year for wearable sensors. These critical components are central to the core value proposition in many wearable devices. The “Wearable Sensors 2018-2028: Technologies, Markets & Players” report includes IDTechEx’slatest research and forecasts on this topic, collating over 3 years of work to provide a thorough characterisation and outlook for each type of sensor used in wearable products today.

Despite sales volumes from wearable products continuing to grow, creeping commoditisation squeezes margins, with hardware sales being particularly vulnerable. This has led to some consolidation in the industry, with several prominent failures and exits, and challenging time even amongst market leaders in each sector. As hardware margins are squeezed, business models are changing to increasingly focus on the valuable data generated once a device is worn. Sensors are responsible for the collection and quality of that data, so understanding the capabilities and limitations of different sensor platforms is critical to understanding the progress of the industry as a whole.

In the report, IDTechEx address 21 different types of wearable sensor across 9 different categories as follows: Inertial Measurement Units (IMUs), optical sensors, electrodes, force/pressure/stretch sensors, temperature sensors, microphones, GPS, chemical & gas sensors & others. Hundreds of examples from throughout the report cover a breadth of technology readiness, ranging from long-established industries to early proof-of-concepts. The report contains information about the activities of over 115 different companies, with primary content (including interviews, exhibition or site visits by the authors) to more than 80 different companies, large and small.

IDTechEx describe wearable sensors in three waves. The first wave includes sensors that have been incorporated in wearable for many years, often being originally developed for wearable products decades ago, and existing as mature industries today. A second wave of wearable sensors came following huge technology investment in smartphones. Many of the sensors from smartphones could be easily adapted for use in wearable products; they could be made-wearable. Finally, as wearable technology hype and investment peaked, many organisations identified many sensor types that could be developed specifically with wearable products in mind. These made-for-wearablesensors often remain in the commercial evaluation or relatively early commercial sales today, but some examples are already becoming significant success stories.

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Billions of wearable electronic products are already sold each year today. Many have already experienced significant hardware commoditisation, with tough competition driving prices down. Even as wearable devices become more advanced, introducing more sensors and better components to enhance value propositions, lessons of history tell us that hardware will always be prone to commoditisation. As this happens the role of sensors only becomes more important; with hardware prices being constantly squeezed, increasing proportions of the value that companies can capture from products will be from the data that the products can generate.

The key hardware component for capturing this data is the sensors, so understanding the development and prospects of sensors today is critical to predicting the potential for this entire industry in the future. “Wearable Sensors 2018-2028: Technologies, Markets & Players” is written to address the needs of any company or individual looking to gain a clearer, independent perspective on the outlook for various types of wearable sensor. The report answers detailed questions about technology, markets and industry trends, and supported by years of primary research investment collated and distilled within.

Reno Sub-Systems (Reno), a developer of high-performance radio frequency (RF) matching networks, RF power generators and gas flow management systems for semiconductor manufacturing, today announced it has closed its Series C funding. Samsung Venture Investment Corporation led the round. New investors Samsung Venture Investment Corp., Hitachi High-Technologies Corporation and SK hynix all join Reno’s premier list of strategic investors. Existing investors Intel Capital, Lam Research and MKS Instruments also participated in this funding round.

“Our list of strategic investors now includes the venture arms of three of the top five largest semiconductor manufacturers, two out of four of the largest etch tool providers, and a key subsystems supplier,” said Bob MacKnight, CEO of Reno Sub-Systems. “Our holistic approach to precision subsystem process control across RF as well as flow technologies offers clear differentiation from competitive approaches. Our new investors are motivated to participate to secure access to our innovative technologies, to enhance their manufacturing operations or product offerings.”

“We saw high value in Reno’s technology, so it only made sense for us to pursue an investment,” said Dr. Dong-Su Kim, vice president of Samsung Venture Investment Corp.

“The new capabilities that Reno’s subsystems provide will add to our competitive strengths,” said Craig Kerkove, president & CEO of Hitachi High-Technologies America.

“Greater precision and repeatability of processing are key to future device geometries,” said Heejin Chung, head of SK hynix’s Venture Investment. “Reno’s subsystems can help us achieve that.”

The additional funding will support continued development of the technology to enable leading-edge silicon manufacturing technology nodes in high-volume production. “The C-round will allow us to support our rapidly growing number of deployments and enable high-volume manufacturing of our systems to support our recent platform wins,” said MacKnight.

The company also announced that it has secured several additional platform design wins for its Electronically Variable Capacitor (EVC™) impedance matching networks and has been qualified by a leading OEM.

Since the 2009 semiconductor downturn and strong 2010 recovery year, power transistor sales have been rocked by market volatility, falling in three of the last five years because of inventory corrections and drawdowns by systems makers worried about ongoing economic weakness and price erosion in some product categories. After recovering from a 7% drop in 2015, power transistor sales grew 5% in 2016 to $12.9 billion and are forecast to set a new record high this year with worldwide revenues rising 6% to $13.6 billion, according to IC Insights’ 2017 O-S-D Report—A Market Analysis and Forecast for Optoelectronics, Sensors/Actuators, and Discrete Semiconductors.

The expected 2017 growth in power transistor sales will be the first back-to-back annual increase in this semiconductor market segment in six years, and that will push dollar volumes past the current record high of $13.5 billion set in 2011. In 2012 and 2013, power transistors suffered their first back-to-back annual sales decline in more than three decades—dropping 8% and 6%, respectively—after rising 12% in 2011 and surging 44% in the 2010 recovery from the 2009 downturn year. The power transistor market then rebounded in 2014 with a strong 14% increase, only to drop 7% in 2015. In 2016, this semiconductor discretes market category began to stabilize and is expected to continue expanding at a modest rate in the next several years, based on IC Insights’ O-S-D Report forecast (Figure 1).

Power transistors are the primary growth engine in the $23 billion discrete semiconductor market because they play a vital role in controlling and conditioning electricity for all types of electronics—including a growing number of battery-operated systems. Worldwide efforts to reduce the waste of power in electric utility grids have significantly increased the importance of power transistors in consumer, commercial, and industrial systems. Renewable-energy applications (e.g., wind and solar systems) as well as electric and hybrid vehicles have also become important applications for power transistors in the last 15 years.

Figure 1

Figure 1

However, volatility in the first half of this decade resulted in an uncharacteristic drop in market size for power transistors during the last five years.  Between 2011 and 2016, power transistor sales fell by a compound annual growth rate of -0.9% compared to a 25-year historical annual average increase of 6.4% (between 1991 and 2016).  The 2017 O-S-D Report is projecting that worldwide power transistor sales will grow by a CAGR of 4.2% between 2016 and 2021, reaching $15.8 billion in the final year of the forecast.

All power transistor technology categories are expected to register sales growth in 2017 with MOS field effect transistor (FET) products increasing 6% to nearly $7.7 billion, insulated-gate bipolar transistor (IGBT) products also rising 6% to $4.1 billion, and bipolar junction transistor products growing 4% to about $875 million.  RF/microwave power transistors and module sales are forecast to rise 3% in 2017 to $960 million, according to the O-S-D Report.

SiFive, the first fabless provider of customized, open-source-enabled semiconductors, today announced it has joined the TSMC (NYSE: TSM) IP Alliance Program, part of the TSMC Open Innovation Platform, which accelerates innovation in the semiconductor design community. As an alliance member, SiFive’s RISC-V based Coreplex IP are made available to its customers to reduce time-to-market, increase return on investment and reduce waste in the manufacturing process.

With the significant increases in non-recurring engineering and design costs required to bring to life new silicon designs, TSMC’s IP Alliance Program makes it easier for fabless chipmakers to innovate and produce custom semiconductors. By participating in the TSMC IP Alliance Program, SiFive becomes the first RISC-V solution provider to make its IP readily available for fabless chipmakers leveraging the industry’s most comprehensive semiconductor IP portfolio.

“Acceptance into the TSMC IP Alliance is an honor and a significant validation not only of SiFive, but of the RISC-V architecture as a whole,” said Jack Kang, vice president of Product and Business Development, SiFive. “Having the SiFive Coreplex IP platform available through the program makes designing a chip based on the latest in open source hardware even easier. We look forward to continued collaboration with TSMC and the other members of the IP Alliance ecosystem.”

“The TSMC Open Innovation Platform forms the center of our open innovation model that addresses the needs of our customers looking to reduce design time and speed time-to-market,” said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. “The addition of SiFive’s IP to the TSMC IP catalog will streamline the process of fabricating custom silicon designs based on the RISC-V implementation.”

SiFive was founded by the inventors of RISC-V – Andrew Waterman, Yunsup Lee and Krste Asanovic – with a mission to democratize access to custom silicon. In its first six months of availability, more than 1,000 HiFive1 software development boards have been purchased and delivered to developers in over 40 countries. Additionally, the company has engaged with multiple customers across its IP and SoC products, started shipping the industry’s first RISC-V SoC in November 2016 and announced the availability of its Coreplex RISC-V based IP earlier this year. SiFive’s innovative “study, evaluate, buy” licensing model dramatically simplifies the IP licensing process, and removes traditional road blocks that have limited access to customized, leading edge silicon.

Researchers from Finland and Taiwan have discovered how graphene, a single-atom-thin layer of carbon, can be forged into three-dimensional objects by using laser light. A striking illustration was provided when the researchers fabricated a pyramid with a height of 60nm, which is about 200 times larger than the thickness of a graphene sheet. The pyramid was so small that it would easily fit on a single strand of hair. The research was supported by the Academy of Finland and the Ministry of Science and Technology of the Republic of China.

A similar structure was made experimentally by using laser irradiation in a process called "optical forging." Credit: The University of Jyväskylä

A similar structure was made experimentally by using laser irradiation in a process called “optical forging.” Credit: The University of Jyväskylä

Graphene is a close relative to graphite, which consists of millions of layers of graphene and can be found in common pencil tips. After graphene was first isolated in 2004, researchers have learned to routinely produce and handle it. Graphene can be used to make electronic and optoelectronic devices, such as transistors, photodetectors and sensors. In future, we will probably see an increasing number of products containing graphene.

“We call this technique optical forging, since the process resembles forging metals into 3D shapes with a hammer. In our case, a laser beam is the hammer that forges graphene into 3D shapes,” explains Professor Mika Pettersson, who led the experimental team at the Nanoscience Center of the University of Jyväskylä, Finland. “The beauty of the technique is that it’s fast and easy to use; it doesn’t require any additional chemicals or processing. Despite the simplicity of the technique, we were very surprised initially when we observed that the laser beam induced such substantial changes on graphene. It took a while to understand what was happening.”

“At first, we were flabbergasted. The experimental data simply made no sense,” says Dr Pekka Koskinen, who was responsible for the theory. “But gradually, by close interplay between experiments and computer simulations, the actuality of 3D shapes and their formation mechanism started to become clear.”

“When we first examined the irradiated graphene, we were expecting to find traces of chemical species incorporated into the graphene, but we couldn’t find any. After some more careful inspections, we concluded that it must be purely structural defects, rather than chemical doping, that are responsible for such dramatic changes on graphene,” explains Associate Professor Wei Yen Woon from Taiwan, who led the experimental group that carried out X-ray photoelectron spectroscopy at the synchrotron facility.

The novel 3D graphene is stable and it has electronic and optical properties that differ from normal 2D graphene. Optically forged graphene can help in fabricating 3D architectures for graphene-based devices.

Understanding the impact of valve flow coefficient (Cv) in fluid systems for microelectronics manufacturing

BY STEPHANE DOMY, Saint-Gobain Performance Plastics,

When scaling up, or down, a high-purity liquid installation – many complex factors need to be considered from ensuring the integrity of the transported product to the cleanliness of the environment for both the safety of the process and the operator [1]. In my 15 years working in the semiconductor fluid handling component industry, I’ve learned that the Cv is a bit misunderstood. Given the Cv formula can be used for any flow component in a fluid line, most are familiar with it, yet few consider how it relates to their specific installation. Therefore, this article will focus on factors that pertain to achieving a specific flow performance and specifically the flow coefficient (Cv) as it relates to valves.

Cv empirical explanation and more

As we know, when working on a turbulent flow the Cv formula is: Cv= Q√(SG / ∆P) where Q is the flow going through the valve in gallons per minute (GPM), SG is the specific gravity of the fluid and ∆P is the pressure drop in PSI through the component. In the semiconductor industry, due to the low velocity of the transported fluid the high purity chemistry and slurries are mostly in a semi–turbulent state or a laminar state. Yet you’ll notice there is not a single link to the viscosity of the transported product in the Cv formula. This is significant given the viscosity directly impacts the Cv value when the flow is in a semi-turbulent or laminar mode. Consider that if you calculate the pressure drop in your system with the formula above you could end up with a result that is 4 to 5 times lower. No doubt this inaccuracy can cause significant issues in your installation.

To take this further, let’s analyze how pressure drop based on flow evolves through a valve by comparing a Saint-Gobain Furon® Q-Valve (1⁄2” inner flow path and 1⁄2” pipe connection) to a standard semiconductor industry valve of the same size. The Saint-Gobain valve, which meets the requirements of the semiconductor industry (metal free, 100% fluoropolymer flow path and so on), has a Cv of 3.5 – one of the best for its dimensions. To ease the calculation, we will use deionized (DI) water, which will free us of the specific gravity or impact of the viscosity if we are not in the right state.

As we can see on the graph in FIGURE 1, at a normal flow rate used in micro-e for 1⁄2” 5 to 10 lpm; the pressure drop difference between a standard valve and a Saint-Gobain valve is in the range of 0.1 to 0.3 PSI. At first glance, this does not appear to be much. However, let’s factor in a viscous product and that you have a number of these lines in your flow line — now the numbers start to accumulate. And by moving from a standard valve to a Saint-Gobain valve, as described above, you start to see a significant difference in pressure drop, which could occur across your installation. That being said, up to a certain limit (defined by another component in your installation, such as your pump pressure capability or some more delicate device) an “easy” counter is to increase the pressure through put of your pump but it is at the expense of wasting energy and adding the potential for additional shearing or particle generation in your critical fluid. Now that we have reviewed, the impact of the Cv on our flow and how this could impact our installation, let’s see what can potentially impact the Cv.

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Design impact on Cv and resulting trade-off

The first impact that may come to mind is a larger orifice – and it’s correct. The size of the orifice can benefit flow through and directly relates to the volume of your valve. However there are trade-offs for this improved Cv. The first is cost increase. A higher volume requires a larger valve, which can cost up to 50% more than the initial valve due to specific material and process requirements. Additionally, as highlighted in “Design Impact for Fluid Components” by increasing the size of the component (due to the specific micro-e material requirements), you could lose pressure rating performance [1]. Also when increasing the inner volume of your valve, you potentially increase volume retention as well as particle generation, given that using larger actuation systems results in more points of contact and creates a hub for generating particles. Another possible drawback is significant velocity loss, but that will have to be addressed in another article. The critical point to be taken here is the importance of choosing the right size orifice – too small and flow can be restricted too much and too big and you may end up paying for other problems.

Another potential impact to Cv is the difference in valve technology. Though there more, I’ll specifically cover stopcock/ball valves, weir style valves; and diaphragm valves. Other valve technologies, such as the butterfly valve, will not be discussed because their construction materials are generally not used for fluid handling components for the semiconductor industry.

Starting with the simplest design, the stopcock/ball valve provides by far the best Cv of the three technologies mentioned. Considering the premium Cv achieved, you would assume they are expensive. Instead they are generally the cheapest of the three values mentioned. One drawback in using stopcock valves is the need for a liquid oring on the fluid path which may create compatibility issues. The exception is the Furon® SCM Valve, a stopcock valve that employs a PFA on PTFE technology and allows for oring-free sealing. Additionally, stopcock valves can lower pressure/ temperature ratings and have a tendency to generate a great deal of particles when actuated. This occurs when the key or ball is rotating inside the valve body. Both drawbacks are related to the PTFE/PFA construction materials required for the flow path by the micro-e industry.

The weir style valve, if done properly, should provide a very good Cv – perhaps not as good as a stopcock/ball valve, but still very good. And although liquid orings are not an issue, these valves have other drawbacks. In a weir style valve the diaphragm is generally a sandwich structure consisting of a thin layer of PTFE that is backed by an elastomeric component in which a metal pin is embedded to connect the membrane to the valve actuating system. It is the sandwich materials that generate a number of potential issues when used on critical, high purity chemistry. Specifically, the delamination of the sandwich creates the possi- bility of multiple points of contamination to the liquid (metal & elastomer). In addition, the significant surface contact between the membrane and the valve seat, which is necessary to secure a full seal, generates a lot of particles – though significantly less than a stopcock/ball valve.

The diaphragm valve is the most commonly used valve in the semiconductor industry as it offers a great balance in terms of the issues previously identified: potential contami- nation, materials and particle generation. The trade-off is that the construction of these valves is more complex and as a result they are priced higher than the average cost of the other valves. Additionally, the Cv performance is well below a stopcock/ball valve and slightly below a weir style valve. However, by using Saint-Gobain’s patented rolling diaphragm technology this does not have to be an issue. In fact, with this technology, we can offer the equivalent Cv of a weir style valve in combination with premium pressure and temperature capabilities as well as the cleanest valve technology – all of which allows for a system design with the lowest impact possible on the transported fluid.

As demonstrated in this document, understanding the Cv rating and the impacts that could affect that rating as it relates to valves is critical when optimizing an installation for fluid and energy efficiency. Cost aside, there are a number of issues that are unique to the semiconductor industry that ultimately guide and often restrict installation choices, such as: dead volume, particle generation, cleanliness as well as the physical and mechanical properties of appropriate polymers. Additionally, choosing the appropriate valve for your installation goes far beyond the simple notion that if “I need more flow, I will get a larger valve.” Most likely the residual effect of that choice will affect the performance of the system, particularly regarding cleanliness. Instead critical adjustments to your valve actuation mechanism and valve flow path designs as well as to your valve technology may allow you to achieve the required results – even if the installation still uses the same 1⁄2” valve…but more on this point in another article.

References

1. www.processsystems.saint-gobain.com/sites/imdf.processsystems. com/files/2015-12-03-part-one-design-impact-for-fluid-components.pdf

BY ARABINDA DAS and JUN LU, TechInsights, Ottawa, ON

Last year was a great year for photovoltaic (PV) technology. According to Renewable Energy World magazine, since April 2016, 21 MW of solar PV mini-grids were announced in emerging markets [1]. The exact numbers of installed solar grids for 2016 has not been published yet but looking at the data for 2015, the PV industry is growing, helped by the $/watt for solar panels continuing to drop. The $/watt is obtained by taking the ratio of total cost of manufacturing and the number of watts generated. According to the Photovoltaic Magazine, the PV market continued to grow worldwide in 2015. The magazine also makes reference to the newly published report by the International Energy Agency Photovoltaic Power System (IEA PVPS) programme’s “Snapshot of Global Photovoltaic Markets 2015,” which also states that the total capacity around the globe has crossed the 200 GW benchmark and is continuing to grow [2]. This milestone of 200 GW in installed systems is a remarkable achievement and makes us think of the amazing journey of PV technology. The technology was born in Bell Labs, around 1954, with a solar cell efficiency of just 4% [3]. By the end of the 20th century, the overall solar cell efficiency was close to 11% and the worldwide installed capacity of PV was only 1 GW [3]. Today, seventeen years later, it has soared to 200 GW, with single junction cells having efficiencies around 20% [2].

Si-based solar cells

To celebrate this important milestone, we put TechInsights’ analysis and technical databases to work to investigate the structure of solar cells of two leading manufacturers and compare them to earlier technologies. We chose to analyze Si-based solar cells only, as they represent over 85% of the global market. According to the 2016 IHS Markit report, the top three PV module suppliers in the world are Trina Solar, SunPower, and First Solar [4]. We procured panels from Trina Solar, a Chinese based company, and SunPower, an American company, and carried out a structural analysis of these panels. These analyses helped us take a snapshot of current PV technology. We compared these two types of panels with an older panel from our database. This panel is about eight years old and was made by Kaneka (Japan). We will provide an overview of each panel and their underlying structure.

Table 1 consolidates some of the important param- eters of the three panels. The SunPower panel is based on monocrystalline silicon and the Trina solar panels are based on polycrystalline silicon. The older Kaneka panel is based on amorphous Si thin film technology. The panel from Kaneka is an earlier product; their recent products are made using hybrid technology, a combination of amorphous films and polycrystalline substrates, The Kaneka panel complements very well the other two products which are based on Si crystalline wafers. The technology to fabricate the solar cells (thin film, multi-crystalline or mono-crystalline) has a direct impact on the efficiency of the cells and on their electrical parameters like the open circuit voltage (Voc) and the short circuit current (Isc), as can be seen in Table 1. This table also shows that the Kaneka thin-film based panel has the lowest nominal power among the three. The ratio of nominal power to the light power that is received by the PV panel is indicative of its efficiency. It can be seen also that Kaneka’s thin film panel has the highest open circuit voltage which is the maximum voltage available from the solar cell without any load connected to it.

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Table 1 indicates that SunPower is the only one among the three that uses an n-type substrate and has the highest solar efficiency. SunPower has the lowest weight per meter-square of all the panels assessed (9.3kg).

Unlike SunPower panels, most installed Si solar panels employ a p-type substrate, even though the first silicon-based solar cells developed at Bell Labs were based on n-type Si substrates [3]. Researchers J. Libal and R. Kopecek posit that the industry transitioned to p-type substrates because the initial usage of solar cells was in space applications and p-type wafers demonstrated less degradation in the presence of cosmic rays. They suggest that for terrestrial applications there is growing evidence that n-type based solar panels are preferred over p-type based panels [5]. The reasons for choosing n-type Si substrates rather than p-type substrates are because the former are less sensitive to metallic impurities and thus are less expensive to fabricate. In general, the minority carrier diffusion lengths in n-type substrates are higher than p-type Si substrates. Also, n-type Si substrates can withstand higher processing temperatures than p-type substrates, which are prone to boron diffusion. According to the International Technology Roadmap for Photovoltaic (ITRPV), n-type based substrates will increase in prevalence and may eventually replace the p-type monocrystalline Si cells [6].

Thin film based solar panels are very different from monocrystalline Si cells. Thin film cells have the lowest efficiency and yet they too have a role to play in the PV industry. They are the most versatile; they can be coated on different substrates such as glass, plastic or even flexible substrates. The other big advantage of amorphous solar films is that they can be manufac- tured in a range of shapes, even non-polygonal shapes, thus they can be used in various applications. Also, thin film solar panels are not affected by high temper- atures, unlike crystalline solar panels. Thin film based panels made from amorphous Si are more effective for wavelengths between 400 nm to 700 nm, which is also the sensitive spectrum of the human eye; thus they can be used as light sensors [7]. Usually, thin film panels are almost half the price of monocrystalline panels. Amorphous silicon solar cells only require 1% of the silicon used in crystalline silicon solar cells [7].

Multi-crystalline (MC) solar panels are also cheaper than monocrystalline solar panels. MC panels are made by melting raw silicon and confining them into square molds, where they are cooled. This MC-Si process does not require the expensive Czochralski process. In the early days, the cost of fabrication of MC-Si panels was higher than thin film based panels. Now, due to the major advances in fabrication technologies, these panels often have the best $/ watt, which represent the ratio of cost to manufacture to energy output [8]. It is difficult to compare $/watt directly from different manufacturers and different types of solar panels as the technology is manufacturing is changing rapidly and often the most recent products of a manufacturer are not compared. A more sensible factor of comparison would be the ratio of total kilowatt-hours the system generates in its lifetime divided by the cost per square unit of the panel. To make a detailed estimation even the installation cost and tolerance to shade, overall reliability must be included in the calculations, which is beyond the scope of this article.

Solar panel overview

FIGURE 1 shows the panel from Kaneka. It indicates that the Kaneka solar panel cells are long strips that run across the whole length of the panel. The color of the panels is a shade of purple. The Kaneka Solar which is amorphous Si-based, has a very uniform color. The inherent structure of amorphous Si-films has many structural defects because they are not crystalline and thus are tolerant to other defects like impurities during manufacturing, unlike crystalline based panels [7]. The color of the thin film panels is strongly thickness dependent because thickness affects the light absorption. A solar cell’s outward appearance can range from blue to black and is dependent on the absorption and reflectivity of their surface. Ideally, if the cell absorbs all the light impinging on the surface it should be black. FIGURE 2 shows the panels from Trina solar and Sunpower. The Trina Solar panel has a blueish color and each cell is perfectly square. The SunPower SPR-X20- 250-BLK solar cell has a uniform blackish color. The spacing between the cells, the interconnect resis- tance, the top contacts and the materials used for the connections affect the overall performance of the panel. All three manufacturers connect their cells within a PV module and PV modules within an array in a series configuration.

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Table 2 summarizes the cell dimensions for the three manufacturers. Kaneka panels have the narrowest space (0.55mm) between the cells. The Trina solar panel has a 3 mm wide gap and a 5 mm gap, between two adjacent solar cells, in the horizontal and vertical direction respectively. These gaps are used for bus electrodes. In the SunPower solar panel, the metal grid is placed on the back surface eliminating metal finger width as a layout constraint. This design significantly reduces the finger resistance and improves the series resistance.

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For all panels, interconnects are made between the cells. The metallization and interconnects between the cells is a field of technology on its own. There are various techniques like lithography, laser grooving and printed contacts and these details are discussed more in detail elsewhere [9, 10, 11].

Solar panel cross-sections

In this section, we look into the layers deposited on the substrates. Cross-sectioning these big panels is not a trivial feat. These panels are covered with tempered glass and shatter during sawing and cross-sectioning. To extract a small rectangular piece requires patience and involves sawing and grinding processes. In most cases, the glass was removed before doing the cross-section. FIGURE 3 illustrates two SEM cross-sectional images and one schematic drawing. The SEM cross-sectional images show the top and bottom part of the Kaneka solar cell. In figure 3(a), the active layers comprise indium- tin- oxide, an amorphous silicon layer capped with zinc oxide, silver and a very thin layer of Ni-Al. On top of the Ni-Al film, solder is deposited. Ni-Al provides better adhesion to solder. Two electrical contacts are made between the cells, one to the indium-tin-oxide for the back contact and the other to the Ni-Al layer. Figure 3(b) exposes the layers under the glass substrate. The rear surface of the glass substrate is covered by a soft material such as EVA (ethyl-vinyl-acetate), which in turn is covered by a rear Polyvinyl Fluoride (PVF) layer called the backsheet (Tedlar or similar). EVA is also used on the top surface (figure 3(a)). The usage of these layers is standard practice in the PV industry. The main function of these layers is that they are impervious to moisture and are stable under prolonged exposure to sunlight. On the front side, EVA also helps to reduce reflection and provides good adhesion between the top glass and the solar panels. Figure 3(c) shows the complete stack in the Kaneka solar cell.

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FIGURE 4 presents the stack of materials on the multi- crystalline substrate of the Trina Solar panel. The substrate is p-type and has a very thin phosphorous doped region near the top surface. This n-doped region forms the PN junction. A silicon nitride anti-reflective coating layer is deposited on top of the substrate and in designated areas the passivation is opened and silver is deposited to make electrical contact to the n-doped regions. At the bottom of the multi-crystalline substrate, there is also a thin region of high p-doping concentration and this forms the back surface field layer. This solar cell module is fabricated using passivated emitter and full metal back-surface-field (BSF) technology. BSF technology is implemented to mitigate rear surface recombination and this is done by doping heavily at the rear surface of the substrate. This high doping concentration keeps minority carriers (electrons) away from the rear contact because the interface between the high and low doped areas of same conductivity acts like a diode and restricts the flow of the minority carriers to the rear surface. Passivated emitters in the front side and BSF layer on the rear side improve the efficiency of the cells. Figure 3(b) is the schematic repre- sentation of the cell without the EVA and PVF layers.

Screen Shot 2017-09-26 at 1.06.57 PM

FIGURE 5 shows an optical cross-section of the SunPower cell. Figure 5(a) shows that SunPower employs a backside junction technology with interdigitated backside p-emitter and n-base metal. This means that both the contact’s n and p-electrodes are at the bottom of the substrate and are placed in in an alternating manner. Having all the metal contacts on the rear side has two big advantages:

Screen Shot 2017-09-26 at 1.07.03 PM

1. Metallic contacts are reflective and occupy space that can be used to collect more sunlight; transferring these contacts to the rear side improves the cell efficiency and also leaves the front surface with a uniformly black color, which is more aesthetic for the home users.

2. It reduces bulk recombination. The mono-crystalline substrate is only 120 μm thick. It is designed so that the carrier is generated close to the junction. The substrate is n-type and p-electrodes are formed by localized doping on the bottom part of the substrate.

Figure 5(b) illustrates the general structure of the cell.

FIGURE 6 depicts a SEM cross-section of the metal fingers that connect to the interdigitated electrodes. The pitch between the metal fingers is 920 um and repeats over the entire back surface of the panel.

All three manufacturers employ some sort of surface texturing along with anti-reflective coatings to reduce reflection but SunPower uses the most advanced technology for surface texturing. FIGURE 7 illustrates a SEM topographical image of the front surface texture of the monocrystalline substrate having pyramids, which are etched into the silicon surface. These faceted surfaces increase the probability of reflected light entering back to the surface of the substrate. A similar concept is also applied to the back surface.

Screen Shot 2017-09-26 at 1.07.11 PM Screen Shot 2017-09-26 at 1.07.20 PM

The future is sunny and bright

Of the three panels we analyzed, SunPower solar panels employ the most advanced technologies and they illustrate how the solar cell has evolved over the ages. It started from a simple PN junction, then passivated emitters were intro- duced along with local back-surface-field (BSF) technology, which came to be known as Passivated-Emitter with Rear Locally (PERL) diffused technology. In contrast, today the most advanced technology is interdigitated back contacts along with passivated contacts.

In addition to these advances, there is great progress in tandem cells and multi-junctions to capture the different wavelength regions of the sun’s rays. A recent article in IEEE spectrum magazine presented the state of art of record-breaking PV cells made with different techniques such as thin film, crystalline Si, single junction, multi-junction cells. PV cells especially the multi-junction cells, have now crossed the 50% efficiency barrier [12]. Similarly, a publication from the alterenergy.org has collected all the major advances made in PV technology and discusses concepts like colloidal quantum dots and GaAs for cell technology, along with new applications [13]. Today, we regularly read about new materials (like perovskites) and come across new techniques that improve solar panel efficiencies, including new manufacturing methods to reduce the overall cost of fabrication. Moreover, PV cells are used in an innovative manner. The installation of PV panels is no more restricted to isolated rooftops or solar farm. An article in the Guardian made a reference to a solar panel road in Normandy, France [14]. At TechInsights, we will continue to keep an eye on emerging solar cell technologies.

The efforts emerging from various organizations all over the world are very encouraging. There are indeed many challenges for renewable energy to overcome before fiscal parity with fossil fuels is achieved; particularly for PV energy. Nevertheless, there is an increased focus on climate change issues. This has resulted in a significant amount of resources being allotted to PV technology in many countries, especially in developing countries such as China, India, and Brazil [1, 2]. This optimistic scenario reminds us of the song “I Can See Clearly Now” by the 1970s American singer Johnny Nash, where the refrain runs optimistically, “It’s gonna be a bright, bright sun-shiny day.”

References

1. http://www.renewableenergyworld.com/articles/2017/01/21-mw- of-solar-pv-for-emerging-market-community-mini-grids-announced- since-april.html;
2. http://www.pv-magazine.com/news/details/beitrag/iea-pvps— installed-pv-capacity-at-227-gw-worldwide_100024068/#ixzz4MB1 a44hq
3. The history of solar: https://www1.eere.energy.gov/solar/pdfs/solar_ timeline.pdf
4. http://news.ihsmarkit.com/press-release/technology/ihs-markit- names-trina-solar-sunpower-first-solar-hanwha-q-cells-and-jinko-
5. www.pv-tech.org/guest…/n_type_silicon_solar_cell_technology_ ready_for_take_off
6. http://www.itrpv.net/; http://www.itrpv.net/Reports/Downloads/2016/ 7. http://www.solar-facts-and-advice.com/amorphous-silicon.html
8. http://energyinformative.org/solar-cell-comparison-chart-mono-
polycrystalline-thin-film/
9. RP_0706-14839-O-4CS-11Kaneka
10. RP_0616-41931-O-5SA-100_Trina
11. RP_0716-42662-O-5SA-100_SunPower
12. http://spectrum.ieee.org/green-tech/solar/what-makes-a-good-pv-
technology
13. http://www.altenergy.org/renewables/solar/latest-solar-technology.
html
14. https://www.theguardian.com/environment/2016/dec/22/solar-panel-
road-tourouvre-au-perche-normandy

Cree names Gregg Lowe as CEO


September 25, 2017

Cree, Inc. (Nasdaq: CREE) announces the appointment of Gregg Lowe as president and chief executive officer and to the board of directors of Cree, effective September 27. Mr. Lowe succeeds Chuck Swoboda, per the transition plan announced in May. Coincident with this change, Robert Ingram, current board member and lead independent director of Cree, will assume the position of chairman of the board. Mr. Swoboda will remain on the board until the annual meeting of shareholders on October 24.

Mr. Lowe joins Cree with extensive leadership and deep industry experience. From 2012 through 2015, he served as president and CEO of Freescale Semiconductor, a $5 billion company with 17,000 employees and products serving automotive, industrial, consumer and communications markets. Prior to that, he had a long career spanning 28 years at Texas Instruments, most recently serving as senior vice president and leader of the analog business.

“Gregg is an exceptional leader and a proven visionary in the semiconductor industry. We are proud that he has accepted the CEO position and is prepared to lead this innovative, technology-rich company into the future,” said Robert Ingram, board chairman of Cree.

“I want to thank Chuck Swoboda for guiding this company for the past sixteen years. His leadership helped solidify Cree as an industry leader in multiple businesses,” stated Gregg Lowe, CEO of Cree. “Cree’s innovation engine is unmatched in the industry. I am honored to be a part of this team and look forward to working with the employees and the board to establish and execute a clear vision for the company moving forward.”

In addition to his experience with semiconductor companies, Mr. Lowe also holds numerous board positions including Silicon Labs in Austin, Texas; Baylor Healthcare System in Dallas, Texas; and The Rock and Roll Hall of Fame in Cleveland, Ohio, where he co-chairs the education committee for the board.

Mr. Lowe holds a Bachelor of Science degree in electrical engineering from the Rose-Hulman Institute of Technology and has completed the executive program at Stanford University. He is the recipient of the Rose-Hulman Institute of Technology Career Achievement Award honoring both his accomplishments in the semiconductor industry as well as his community service. Additionally, he was awarded an Honorary Doctorate of Engineering from the Institute in 2014.

Cree is an innovator of lighting-class LEDs, lighting products and Wolfspeed™ power and radio frequency (RF) semiconductors.

Cypress Semiconductor Corp. (NASDAQ: CY) today announced the appointment of Jeffrey J. Owens to its board of directors. He will serve on the company’s Compensation Committee. Owens brings to Cypress more than 40 years of experience in a variety of technology, engineering and operating leadership roles at Delphi Automotive, one of the world’s largest suppliers of vehicle electronics.

Owens recently retired from his role as Chief Technology Officer at Delphi Automotive, where he was responsible for a global engineering team of 20,000 technologists located in 14 major tech centers and was instrumental in transforming the company into a provider of software, electronics, and advanced safety and electrical architectures to the world’s largest automotive manufacturers. Prior to his CTO role, he was President of Delphi’s $3 billion Electronics and Safety division. Owens currently serves on the board of directors of public engineering materials supplier Rogers Corporation. He is on the board of trustees at Kettering University and previously served as chairman of the board.

“We are pleased to welcome Jeff Owens to Cypress’ board,” said Steve Albrecht, Cypress’ chairman. “He is a great addition to our team with invaluable technology and system expertise to support management as they continue building the already strong automotive business. His capabilities align perfectly with the Cypress 3.0 strategy to evolve into an embedded system solutions leader in fast-growing market segments, including autonomous driving.”