Issue

SAN JOSE, CALIF. — Tessera Technologies developed a package stacking technology that addresses business and logistical issues created by multichip integration.

Packaging markets have come full circle over the past 40 years. In the 1960s, thick- and thin-film hybrid technology addressed, in part, limitations of integrated circuit (IC) technology.

Editors and other people with the luxury of observing and commenting have been exhorting the packaging part of the semiconductor industry to work more closely with the front-end portion of it.

The term "wafer-level packaging" (WLP) entered the microelectronics industry's lexicon in the late 1990s.

Until recently, X-ray technology was the only option for inspecting hidden solder joints on chip scale packages (CSP).

Plastic ball grid array (BGA) packages have gained popularity because of trends in product miniaturization and enhanced in-package electrical performance.

A critical area of microtechnology is the mechanical stress of thin films. Generally, the goal is to keep the stress as low as possible for providing durable and reliable film stacks.