Category Archives: Device Architecture

IC Insights recently released its new Global Wafer Capacity 2019-2023 report that provides in-depth detail, analyses, and forecasts for IC industry capacity by wafer size, process geometry, region, and product type through 2023.  Figure 1 shows the world’s installed monthly wafer production capacity by geographic region (or country) as of December 2018.  Each number represents the total installed monthly capacity of fabs located in that region regardless of the headquarters location of the company that own the fab(s).  For example, the wafer capacity that South Korea-based Samsung has installed in the U.S. is counted in the North America capacity total, not in the South Korea capacity total.  The ROW “region” consists primarily of Singapore, Israel, and Malaysia, but also includes countries/regions such as Russia, Belarus, and Australia.

Figure 1

As shown, Taiwan led all regions/countries in wafer capacity with 21.8% share, a slight increase from 21.3% in 2017 (Taiwan first became the global wafer capacity leader in 2015.)  Taiwan’s capacity share was only slightly ahead of South Korea, which accounted for 21.3% of global wafer capacity in 2018, according to the Global Wafer Capacity 2019-2023 report.  TSMC in Taiwan and Samsung and SK Hynix in South Korea accounted for the vast share of wafer fab capacity in each country and were the top three capacity leaders worldwide. TSMC held 67% of Taiwan’s capacity while Samsung and SK Hynix represented 94% of the installed IC wafer capacity in South Korea at the end of 2018.

Japan remained firmly in third place with just over 16.8% of global wafer fab capacity.  Micron’s purchase of Elpida several years ago and other recent major changes in manufacturing strategies of companies in Japan, including Panasonic spinning off some of its fabs into separate companies, means that the top two companies (Toshiba Memory and Renesas) accounted for 62% of that country’s wafer fab capacity.

China showed the largest increase in global wafer capacity share in 2018, rising 1.7 percentage points from a 10.8% share in 2017 to a 12.5% share in 2018.  It nearly tied North America as the fourth-largest country/region with installed capacity.  A lot of buzz circulated about China-based startups and their new wafer fabs during 2018. Meanwhile, other global companies expanded their manufacturing presence in China last year so it would be expected that the country’s capacity share would show a significant increase.  China’s percentage gain came mostly at the expense of ROW and North America.  The share of capacity in the ROW region slipped 0.8 percentage points from 9.5% in 2017 to 8.7% in 2018. North America’s share of capacity declined 0.4 percentage points in 2018.

Silicon Catalyst, the world’s only incubator focused exclusively on accelerating solutions in silicon, today announced Soitec (Euronext Paris), a designer and manufacturer of semiconductor materials, as its first European Strategic Partner. This agreement provides Soitec access to early-stage silicon technology innovation targeting consumer, IoT and automotive segments and applications.

Silicon Catalyst is a Silicon Valley-based incubator providing silicon-focused start-ups access to a world-class network of advisors, design tools, silicon devices, networking, access to funding and marketing acumen needed to successfully launch their businesses. Soitec will engage in this start-up ecosystem to gain insight into the newest technologies and applications across high-growth markets, and to guide nascent technologies to successful market penetration.

“As a Strategic Partner of Silicon Catalyst, Soitec has a unique opportunity to grow our visibility among early-stage semiconductor companies,” said Thomas Piliszczuk, Executive VP of Global Strategy for Soitec. “Engineered substrates give semiconductor related start-ups a competitive edge in developing new high-performance, energy-efficient solutions. We are looking forward to supporting emerging trends and technology advancements with Silicon Catalyst’s distinguished portfolio of semiconductor entrepreneurs.”

“We are pleased to welcome Soitec as our first European Strategic Partner. Soitec is creating technical advances that are enabling the next generation of products across many market segments. Their SOI technology is a key ingredient to meet the diverse challenges for breakthrough differentiated semiconductor products, combining ultra-low power with excellent analog / mixed-signal performance,” stated Pete Rodriguez, CEO of Silicon Catalyst. “Joining our other Strategic Partners, Texas Instruments and ON Semiconductor, Soitec will participate in the selection of applicants to our incubator and provide guidance for our Portfolio Companies, contributing to the growth of startups that are creating the next generations of semiconductor innovation.”

Soitec’s substrate solutions, most notably silicon-on-insulator (SOI), address the full range of applications for electronics. SOI substrates are designed to support ultra-low power signal processing, wireless connectivity, power, image sensors and silicon photonics applications. Radio-frequency silicon-on-insulator (RF-SOI) substrates are the foundation of the RF incumbent technology for RF Front-End modules used in all smart phones manufactured today. RF-SOI and fully depleted SOI (FD-SOI) material enable ultra-low power connectivity, mobility, distributed AI and edge computing. Adding our new compound and piezo-electric on insulator substrates, Soitec offers a wide range of engineered substrates addressing numerous and fast growing segments like automotive, AI-IoT (AIoT) and 5G.

The RF GaN industry is showing an impressive growth with a 23% CAGR between 2017 and 2023, driven by telecom and defense applications. By the end of 2017, the total RF GaN market was close to US$380 million and 2023 should reach more than US$1.3 billion with an evolving industrial landscape (1). Telecom and defense are looking for innovative technologies and RF GaN-based devices are directly answering to the market demand.

Figure 1

Defense remains a major RF GaN market segment, as its specialized high-performance requirements and low price sensitivity offer many opportunities for GaN-based products. In 2017-2018, the defense sector accounts for more than 35% of the total GaN RF market, and the global defense market shows no signs of slowing down (1).

“We believe this important GaN market segment will continue growing along with GaN’s overall penetration rate,” asserts Hong Lin, PhD. Senior Technology & Market Analyst at Yole Développement (Yole), part of Yole Group of Companies.

Under this dynamic ecosystem, Yole’s partner, Knowmade, has deeply analyzed the RF GaN IP landscape and proposes today a dedicated report, RF GaN 2019 – patent landscape analysis. This report reveals the competitive landscape from a patent perspective. Key patent owners, IP & technology strategies, and future intents have been deeply analyzed by Knowmade’s analysts. This report details competitors’ strengths and weaknesses in terms of patents and technologies. It also proposes a comprehensive description of the technology trends and emerging technologies status.
GaN RF has been recognized by industrial companies and has clearly become mainstream. Leading players are increasing revenue very rapidly and this trend will remain for the next several years. From an IP perspective, American and Japanese players dominate the RF GaN IP ecosystem. So who are the leading RF GaN companies? What is the status of their patent portfolio? Do they have the right IP portfolios to face huge opportunities?…

Knowmade’s analysts invite you to discover the status of the RF GaN IP landscape.

“Cree (Wolfspeed) indisputably has the strongest IP position, especially for GaN HEMTs on SiC substrate,”comments Nicolas Baron, PhD., CEO and co-founder of Knowmade. “Sumitomo Electric, the market leader in RF GaN devices, is well positioned but far behind Cree.”

Furthermore, Sumitomo Electric has been slowing down its patenting activity while other Japanese companies like Fujitsu, Toshiba and Mitsubishi Electric are increasing their patent filings and thus today have strong patent portfolios as well.

Intel and MACOM are currently the most active patent applicants for RF GaN, both especially for GaN-on-Silicon technology, and are today the main IP challengers in the RF GaN patent landscape.
Other companies involved in RF GaN market, such as Qorvo, Raytheon, Northrop Grumman, NXP/Freescale, and Infineon, hold some key patents but do not necessarily have a strong IP position. CETC and Xidian University dominate the Chinese patent landscape with patents on GaN RF technologies targeting microwave and mm-wave applications. And the emerging foundry HiWafer, entered the IP landscape three years ago, is today the most serious Chinese IP challenger… American and Japanese companies are playing a key role on the RF GaN IP playground.

From a device perspective, Cree (Wolfspeed) has also taken the lead in the GaN HEMT IP race for RF applications… “The analysis of Cree’s RF GaN patent portfolio shows it can effectively limit patenting activity in the field and control the freedom-to-operate of other firms in most key countries,” explains Nicolas Baron from Knowmade.

Intel, which entered the GaN HEMT patent landscape later, is currently the most active patent applicant and it should strengthen its IP position in coming years, especially for GaN-on-Silicon technology. New entrants in the GaN RF HEMT related patent landscape are mainly Chinese players: HiWafer, Sanan IC and Beijing Huajin Chuangwei Electronics.
Other noticeable new entrants are Taiwan’s TSMC and Wavetek Microelectronics, Korea’s Wavice and Gigalane, Japan’s Advantest, and America’s MACOM and ON Semiconductor…

Under this new IP report, the technology intelligence and IP strategy consulting company, Knowmade, has selected and analyzed more than 3,750 patents published worldwide up to October 2018. These patents pertain to RF GaN epiwafers including GaN-on-SiC and GaN-on-Silicon, RF semiconductor devices, including HEMTs and HBTs , integrated circuits, including RFICs and MMICs , operating methods and packaging, for all functions, such as RF PAs , RF switches and RF filters and from radio frequencies <6GHz to microwaves >6GHz and mm-waves >20GHz. A detailed description of this IP report is available on Knowmade’s website.

Global electronics manufacturing pillars Smart manufacturing, IoT and workforce development will come into sharp focus at SEMICON Southeast Asia (SEA) 2019, scheduled May 7-9, at the Malaysia International Trade and Exhibition Centre (MITEC) in Kuala Lumpur. Industry experts from around the world will gather at the region’s premiere global electronics manufacturing supply chain for critical insights into the semiconductor ecosystem, new business opportunities and collaboration. SEMICON SEA 2019 registration is now open.

Themed “Think Smart, Make Smart,” SEMICON SEA will feature three themed pavilions, five global pavilions, insightful keynote presentations and a host of technology forums to address key issues in the electronics manufacturing supply chain.

The new Workforce Pavilion addresses the critical industry shortage of skilled workers by attracting the young talent critical to sustaining industry innovation and growth. College students will meet with industry experts to explore career paths in microelectronics as tutorials enhance university students’ understanding of semiconductor manufacturing and opportunities.

The World of IoT Pavilion showcases applications and technologies enabling the IoT revolution. Companies from across the region will demonstrate technologies that enable Smart lifestyles as start-ups showcase pioneering and disruptive products and applications powered by IoT.

At the Smart Manufacturing Pavilion, the Artificial Intelligence exhibition zone highlights critical capabilities including collaborative robots, automated guided vehicles, cybersecurity and manufacturing excellence systems. The Pavilion’s Supply Chain Management zone provides insights into key elements of manufacturing excellence such as automated material handling and automated storage and retrieval. The Pavilion also features an augmented reality (AR) interactive human-machine interface to give visitors an immersive experience in smarter manufacturing processes.

SEMICON SEA 2019 will also feature an exclusive Hosted Buyer Programme. Hosted by SEMI, the customised business matching platform connects buyers in the electronics manufacturing supply chain with international solution providers for collaboration and business opportunities.

SEMICON Southeast Asia 2019 sponsors include ADLINK, Applied Materials, Cimetrix®, Evatec, GLOBALFOUNDRIES, Kanken Techno Co Ltd, Kulicke & Soffa, First Derivatives, Lam Research, Tokyo Electron and UPS.

For more information about SEMICON SEA is available on the event website.

Quantum computers promise to be a revolutionary technology because their elementary building blocks, qubits, can hold more information than the binary, 0-or-1 bits of classical computers. But to harness this capability, hardware must be developed that can access, measure and manipulate individual quantum states.

Researchers at the University of Pennsylvania’s School of Engineering and Applied Science have now demonstrated a new hardware platform based on isolated electron spins in a two-dimensional material. The electrons are trapped by defects in sheets of hexagonal boron nitride, a one-atom-thick semiconductor material, and the researchers were able to optically detect the system’s quantum states.

Researchers at the University of Pennsylvania’s School of Engineering and Applied Science have now demonstrated a new hardware platform based on isolated electron spins in a two-dimensional material. The electrons are trapped by defects in sheets of hexagonal boron nitride, a one-atom-thick semiconductor material, and the researchers were able to optically detect the system’s quantum states. Credit: Ann Sizemore Blevins

The study was led by Lee Bassett, assistant professor in the Department of Electrical and Systems Engineering, and Annemarie Exarhos, then a postdoctoral researcher in his lab.

Fellow Bassett Lab members David Hopper and Raj Patel, along with Marcus Doherty of the Australian National University, also contributed to the study.

It was published in the journal Nature Communications, where it was selected as an Editor’s Highlight.

There are number of potential architectures for building quantum technology. One promising system involves electron spins in diamonds: these spins are also trapped at defects in diamond’s regular crystalline pattern where carbon atoms are missing or replaced by other elements. The defects act like isolated atoms or molecules, and they interact with light in a way that enables their spin to be measured and used as a qubit.

These systems are attractive for quantum technology because they can operate at room temperatures, unlike other prototypes based on ultra-cold superconductors or ions trapped in vacuum, but working with bulk diamond presents its own challenges.

“One disadvantage of using spins in 3D materials is that we can’t control exactly where they are relative to the surface” Bassett says. “Having that level of atomic scale control is one reason to work in 2D. Maybe you want to place one spin here and one spin there and have them talk them to each other. Or if you want to have a spin in a layer of one material and plop a 2D magnet layer on top and have them interact. When the spins are confined to a single atomic plane, you enable a host of new functionalities.”

With nanotechnological advances producing an expanding library of 2D materials to choose from, Bassett and his colleagues sought the one that would be most like a flat analog of bulk diamond.

“You might think the analog would be graphene, which is just a honeycomb lattice of carbon atoms, but here we care more about the electronic properties of the crystal than what type of atoms it’s made of,” says Exarhos, who is now an assistant professor of Physics at Lafayette University. “Graphene behaves like a metal, whereas diamond is a wide-bandgap semiconductor and thus acts like an insulator. Hexagonal boron nitride, on the other hand, has the same honeycomb structure as graphene, but, like diamond, it is also a wide-bandgap semiconductor and is already widely used as a dielectric layer in 2D electronics.”

With hexagonal boron nitride, or h-BN, widely available and well characterized, Bassett and his colleagues focused on one of its less well-understood aspects: defects in its honeycomb lattice that can emit light.

That the average piece of h-BN contains defects that emit light had previously been known. Bassett’s group is the first to show that, for some of those defects, the intensity of the emitted light changes in response to a magnetic field.

“We shine light of one color on the material and we get photons of another color back,” Bassett says. “The magnet controls the spin and the spin controls the number of photons that the defects in the h-BN emit. That’s a signal that you can potentially use as a qubit.”

Beyond computation, having the building block of a quantum machine’s qubits on a 2D surface enables other potential applications that depend on proximity.

“Quantum systems are super sensitive to their environments, which is why they’re so hard to isolate and control,” Bassett says. “But the flip side is that you can use that sensitivity to make new types of sensors. In principle, these little spins can be miniature nuclear magnetic resonance detectors, like the kind used in MRIs, but with the ability to operate on a single molecule.

Nuclear magnetic resonance is currently used to learn about molecular structure, but it requires millions or billions of the target molecule to be assembled into a crystal. In contrast, 2D quantum sensors could measure the structure and internal dynamics of individual molecules, for example to study chemical reactions and protein folding.

While the researchers conducted an extensive survey of h-BN defects to discover ones that have special spin-dependent optical properties, the exact nature of those defects is still unknown. Next steps for the team include understanding what makes some, but not all, defects responsive to magnetic fields, and then recreating those useful defects.

Some of that work will be enabled by Penn’s Singh Center for Nanotechnology and its new JEOL NEOARM microscope. The only transmission electron microscope of its kind in the United States, the NEOARM is capable of resolving single atoms and potentially even creating the kinds of defects the researchers want to work with.

“This study is bringing together two major areas of scientific research,” Bassett says. “On one hand, there’s been a tremendous amount of work in expanding the library of 2D materials and understanding the physics that they exhibit and the devices they can make. On the other hand, there’s the development of these different quantum architectures. And this is one of the first to bring them together to say ‘here’s a potentially room-temperature quantum architecture in a 2D material.'”

Robust demand for more content for mobile, Internet of Things (IoT), automotive and industrial applications will drive production of 700,000 200mm wafers from 2019 to 2022, a 14 percent increase, reports SEMI, the global industry association serving the electronics manufacturing supply chain, in its latest Global 200mm Fab Outlook. The increase brings total 200mm wafer fab capacity to 6.5 million wafers per month as many devices have found their sweet spot with 200mm wafer fabrication.

Strong 200mm wafer growth mirrors sound capacity demand seen across various industry segments. From 2019 to 2022, for example, wafer shipments for MEMS and sensors devices are expected to increase 25 percent while shipments for power devices and foundries are forecast to jump 23 percent and 18 percent, respectively, the SEMI Global 200mm Fab Outlook shows. The increases in 200mm fab count and installed capacity reflect continuing 200mm industry strength as it continues to add capacity and even open new fabs.

The SEMI Global 200mm Fab Outlook report has added seven new facilities, with 160 updates to 109 fabs, since its most recent publication in July 2018. A total of 16 new facilities or lines, 14 of them volume fabs, are expected to begin operation between 2019 and 2022. The report takes into account both equipment transferred from one fab to another and equipment revitalized after being held in storage, such as for SK Hynix and Samsung.

Across the industry, recent sudden changes in investment plans for leading-edge devices such as memory have triggered a projected double-digit decline in spending in 2019. However, with demand for mature devices using wafers 200mm and smaller stable or evening growing, it would be no surprise to see plans emerge for even more 200mm capacity and new fabs to meet growing demand.

More information about the SEMI Global 200mm Fab Outlook report from 2019 to 2022 is available here.

Maryam Cope joins SIA

The Semiconductor Industry Association (SIA) announced Maryam Cope has joined the association as government affairs director. In this role, Cope will help advance the U.S. semiconductor industry’s key legislative and regulatory priorities related to semiconductor research and technology, high-skilled immigration, and product security, among others. She also will serve as a senior representative of the industry before Congress, the White House, and federal agencies.

“The U.S. semiconductor industry is at the heart of the technologies driving America’s economic strength, national security, and global technology leadership,” said John Neuffer, SIA president and CEO. “Maryam Cope’s impressive skills and extensive experience in the tech policy arena make her an ideal advocate for semiconductor industry priorities in Washington. We’re excited to welcome her to the SIA team and look forward to her help advancing initiatives that promote growth and innovation in our industry and strengthen the U.S. economy.”

Cope most recently served as managing partner of GoldsteinCope Policy Solutions, a public policy consulting firm focused on technology issues. Prior to that role, she led the creation of a tech-policy practice at the American Hotel and Lodging Association, positioning the industry as a leading voice on tech policy related to consumer issues. Cope also served as director of government affairs at the Information Technology Industry Council, helping to guide the association’s advocacy efforts on cybersecurity, encryption, and supply chain security.

Cope began her career on the staff of Sen. Kay Bailey Hutchison (R-Texas) and later served as professional staff on the U.S. Senate Committee on Commerce, Science, and Transportation, serving a key role in drafting science, innovation, and cybersecurity legislation. She holds a bachelor’s degree in biology from Northwestern University and a graduate certificate from Stanford’s Graduate School of Business Executive Program for Women Leaders.

Samsung Electronics and Apple remained the top two semiconductor chip buyers in 2018, representing 17.9 percent of the total worldwide market, according to Gartner, Inc. This is a 1.6 percent decrease compared with the previous year. However, the top 10 OEMs increased their share of chip spending to 40.2 percent in 2018, up from 39.4 percent in 2017.

“Four Chinese original equipment manufacturers (OEMs) — Huawei, Lenovo, BBK Electronics and Xiaomi — ranked in the top 10 in 2018, up from three in 2017. On the other hand, Samsung Electronics and Apple both significantly slowed the growth of their chip spending in 2018,” said Masatsune Yamaji, senior principal analyst at Gartner. “Huawei increased its chip spending by 45 percent, jumping in front of Dell and Lenovo to the third spot.”

Eight of the top 10 companies in 2017 remained in the top 10 in 2018, with Kingston Technology and Xiaomi replacing LG Electronics and Sony (see Table 1). Xiaomi rose eight places to the 10th position, increasing its semiconductor spending by $2.7 billion in 2018, a 63 percent growth year over year.

Table 1. Preliminary Ranking of Top 10 Companies by Semiconductor Design TAM, Worldwide, (Millions of Dollars)

2017 Ranking 2018

Ranking

 Company 2017 2018  2018 Market

Share (%)

Growth (%) 2017-2018
1 1 Samsung Electronics 40,408 43,421 9.1 7.5
2 2 Apple 38,834 41,883 8.8 7.9
5 3 Huawei 14,558 21,131 4.4 45.2
3 4 Dell 15,606 19,799 4.2 26.9
4 5 Lenovo 15,173 17,658 3.7 16.4
6 6 BBK Electronics* 11,679 13,720 2.9 17.5
7 7 HP Inc. 10,632 11,584 2.4 9.0
13 8 Kingston Technology 5,273 7,843 1.6 48.7
8 9 Hewlett Packard Enterprise 6,543 7,372 1.5 12.7
18 10 Xiaomi 4,364 7,103 1.5 62.8
    Others 257,324 285,179 59.8 10.8
    Total 420,393 476,693 100.0 13.4

TAM = total available market

*BBK Electronics includes Vivo and OPPO

Note: Numbers may not add to totals shown because of rounding

Source: Gartner (February 2019)

The continued market consolidation in the PC and smartphone markets had a significant impact on the semiconductor buyers’ ranking. The big Chinese smartphone OEMs, in particular, have increased their market domination by taking out or purchasing competitors. As a result, semiconductor spending by the top 10 OEMs increased significantly, and their share reached 40.2 percent of the total semiconductor market in 2018, up from 39.4 percent in 2017. This trend is expected to continue, which will make it harder for semiconductor vendors to maintain high margins.

Another factor impacting the market was memory prices. While the DRAM average selling price (ASP) has been high in the past two years, it is now declining. However, the impact is limited, as OEMs will increase their memory content when the ASP declines and also invest in premium models. Gartner predicts that the share of total memory chip revenue in the total semiconductor market will be 33 percent in 2019 and 34 percent in 2020, higher than its 31 percent share in 2017.

“With the top 10 semiconductor chip buyers commanding an increasing share of the market, technology product marketers at chip vendors must allocate a majority of their resources to their top 10 potential customers,” said Mr. Yamaji. “It is crucial that they take advantage of the open budget that is available due to the weakening memory ASPs and encourage customers to use advanced chips or increase memory content.”

Noting the startling advances in semiconductor technology, Intel co-founder Gordon Moore proposed that the number of transistors on a chip will double each year, an observation that has been born out since he made the claim in 1965. Still, it’s unlikely Moore could have foreseen the extent of the electronics revolution currently underway.

Today, a new breed of devices, bearing unique properties, is being developed. As ultra-miniaturization continues apace, researchers have begun to explore the intersection of physical and chemical properties occurring at the molecular scale.

Advances in this fast-paced domain could improve devices for data storage and information processing and aid in the development of molecular switches, among other innovations.

Nongjian “NJ” Tao and his collaborators recently described a series of studies into electrical conductance through single molecules. Creating electronics at this infinitesimal scale presents many challenges. In the world of the ultra-tiny, the peculiar properties of the quantum world hold sway. Here, electrons flowing as current behave like waves and are subject to a phenomenon known as quantum interference. The ability to manipulate this quantum phenomenon could help open the door to new nanoelectronic devices with unusual properties.

“We are interested in not only measuring quantum phenomena in single molecules, but also controlling them. This allows us to understand the basic charge transport in molecular systems and study new device functions,” Tao says.

Tao is the director of the Biodesign Center for Bioelectronics and Biosensors. In research appearing in the journal Nature Materials, Tao and colleagues from Japan, China and the UK outline experiments in which a single organic molecule is suspended between a pair of electrodes as a current is passed through the tiny structure.

The researchers explore the charge transport properties through the molecules. They demonstrated that a ghostly wavelike property of electrons–known as quantum interference– can be precisely modulated in two different configurations of the molecule, known as Para and Meta.

It turns out that quantum interference effects can cause substantial variation in the conductance properties of molecule-scale devices. By controlling the quantum interference, the group showed that electrical conductance of a single molecule can be fine-tuned over two orders of magnitude. Precisely and continuously controlling quantum interference is seen as a key ingredient in the future development of wide-ranging molecular-scale electronics, operating at high speed and low power.

Such single-molecule devices could potentially act as transistors, wires, rectifiers, switches or logic gates and may find their way into futuristic applications including superconducting quantum interference devices (SQUID), quantum cryptography, and quantum computing.

For the current study, the molecules–ring-shaped hydrocarbons that can appear in different configurations–were used, as they are among the simplest and most versatile candidates for modeling the behavior of molecular electronics and are ideal for observing quantum interference effects at the nanoscale.

In order to probe the way charge moves through a single molecule, so-called break junction measurements were made. The tests involve the use of a scanning tunneling microscope or STM. The molecule under study is poised between a gold substrate and gold tip of the STM device. The tip of the STM is repeatedly brought in and out of contact with the molecule, breaking and reforming the junction while the current passes through each terminal.

Thousands of conductance versus distance traces were recorded, with the particular molecular properties of the two molecules used for the experiments altering the electron flow through the junction. Molecules in the ‘Para’ configuration showed higher conductance values than molecules of the ‘Meta’ form, indicating constructive vs destructive quantum interference in the molecules.

Using a technique known as electrochemical gating, the researchers were able to continuously control the conductance over two orders of magnitude. In the past, altering quantum interference properties required modifications to the charge-carrying molecule used for the device. The current study marks the first occasion of conductance regulation in a single molecule.

As the authors note, conductance at the molecular scale is sensitively affected by quantum interference involving the electron orbitals of the molecule. Specifically, interference between the highest occupied molecular orbital or HOMO and lowest unoccupied molecular orbital or LUMO appears to be the dominant determinant of conductance in single molecules. Using an electrochemical gate voltage, quantum interference in the molecules could be delicately tuned.

The researchers were able to demonstrate good agreement between theoretical calculations and experimental results, indicating that the HOMO and LUMO contributions to the conductance were additive for Para molecules, resulting in constructive interference, and subtractive for Meta, leading to destructive interference, much as waves in water can combine to form a larger wave or cancel one another out, depending on their phase.

While previous theoretical calculations of charge transport through single molecules had been carried out, experimental verification has had to wait for a number of advances in nanotechnology, scanning probe microscopy, and methods to form electrically functional connections of molecules to metal surfaces. Now, with the ability to subtly alter conductance through the manipulation of quantum interference, the field of molecular electronics is open to a broad range of innovations.

Critical subsystems for the IC equipment market continued to grow to a new record of $11 billion in 2018. While 2019 is expected to be a downturn year, the long-term outlook remains unchanged with an average growth rate of 3 percent.

Last year may have been a new high for revenues, but it will be remembered as a year of two parts: record quarterly revenues in Q1, followed by rapidly falling orders in Q3 and Q4. Normally, this would not be a problem as suppliers are used to managing volatility in their businesses. However, encouraged by solid end market drivers and optimistic customers, the timing of this downturn was particularly bad as it coincided with the addition of significant new manufacturing capacity for critical subsystems that will be needed to supply the industry into the next decade. The resulting step change in costs against the backdrop of falling revenues has put strain on the financials of these suppliers. Although current visibility is poor, the order decline appears to be stabilising and the worst is nearly over. Revenues are expected to recover in the second half of 2019 followed by a promising outlook for the following three years.

Critical Subsystems for IC equipment history and forecast to 2022. After a pause in 2019, the trend is expected to continue to reach new industry records.

Suppliers of subsystems used in vacuum process tools, such as deposition and etch, have benefited the most from critical subsystems growth since 2012. Vacuum intensity of semiconductor processing continues to grow and in 2018 the value of vacuum process tools exceeded the value of non-vacuum process tools for the first time. This trend is expected to continue with vacuum based semiconductor process equipment accounting for over 60 percent of wafer fab equipment revenues by 2023.

In summary, 2019 is expected to be down 10 percent to 20 percent as the industry digests the recent large additions to semiconductor manufacturing capacity, followed by a new cycle starting in 2020.

Julian West is a technical and marketing analyst at VLSI Research Europe.

Source: SEMI Blog