November 10, 2011 — OSRAM Opto Semiconductors increased its IR Power Topled with lens (SFH 4258S/4259S) optical output by 80% over the standard version by integrating a thin-film chip. The infrared (IR) light emitting diode (LED) has the same surface area and drive current.
OSRAM Opto used Nanostack technology to create the thin-film chip with 2 p-n junctions grown one on top of the other. Because of the series circuit, the voltage is higher by approximately a factor of 2. The increased output in the same package footprint suits designs where real estate, even illumination, and cost are factors, said OSRAM’s representatives.
The IR Power Topled produces 80mW optical output power from an operating current of 70mA. The new LED emits at a wavelength of 850nm. It is available with beam angles of
October 6, 2011 — Thanks to MEMS, 3D packaging, LEDs, power devices, and other applications, thinned wafers will be the majority of wafers in the market by 2016, according to Yole D
August 30, 2011 – SEMICON Taiwan (Sept. 7-9) approaches, the island’s most celebrated event for microelectronics manufacturing, coorganized by SEMI and the Taiwan External Trade Development Council (TAITRA), offers more than 60 programs and sessions and 550 exhibitors spanning the entire semiconductor value chain and related high-growth industries.
A "Market Trend Forum" will host five industry analysts with their takes on future trends in semiconductor markets from up and down the value chain: foundries, DRAM, packaging, and equipment/materials.
The SiP Global Summit presents the latest 3D IC developments from TSMC and ASE, and offers talks on test challenges, 2.5D-3D ICs, and device-embedded substrates, dubbed "the last mile" in heterogeneous integration in SiP packaging.
A gathering for celebration, to see and be seen: The 2011 Leadership Gala Dinner will honor TSMC’s Morris Chang, recipient of the 2011 Akira Inoue award, and we’re told that President Ma Ying-jeou will talk as well. Other invited guests listed are Vincent Siew, VP representing the ROC; Wu Den-Yih, Premier of the Executive Yuan; Yen-Shiang Shih from the Ministry of Economic Affairs (MOEA); and Taipei Mayor Hau Lung-Bin.
For networking, the CEO Forum presents a range of talks from top industry execs (Mentor Graphics, IMEC, Applied Materials, TSMC), addressing market differentiation, future "hyper-intelligent systems," equipment technology inflection points, and other silicon IC technology challenges and opportunities. And there’s the annual SEMICON Taiwan golf tournament and luncheon.
Other forums cover a range of hot industry topics:
– MEMS: Litho for 3D TSV MEMS, etching, simulation, test
– LEDs Cost and technology trends, manufacturing efficiencies, packaging
– Green Manufacturing: Reducing and efficiently managing consumption of energy, water, hazardous substances, waste, etc. Talks include ISO and SEMI standards, TSMC’s "total chemical management," pump/abatement, automation, etc.
– More: Manufacturing/design collaboration, CMP, secondary equipment, and a number of themed pavilions including a Cross-Strait and several national ones.
August 11, 2011 — In these 2 video interviews from SEMICON West 2011, ESI technologists John Sabol and Vernon Cooke discuss what LED chips require on the back-end manufacturing line, starting at wafer scribing and moving on through test. LEDs differ from semiconductor chips — high light extraction is a major goal, for example — though some goals — high yields and low costs — remain universal.
Wafer scribing for brighter LEDs
John Sabol of ESI talks about wafer scribing for LEDs. The LED industry is working on increasing quantum well efficiencies and light extraction. ESI focused on the latter in developing tools for scribing patterned sapphire wafers and distributed Bragg and metal mirrors.
LED scribing cuts LED wafers into die, going through layers of gold, sapphire, GaN, and other materials. By paying attention to sidewall construction during this cut, ESI was able to integrate a laser cutting technology that keeps light output high.
Handling LED packages for better throughput and yields
Vernon Cooke, ESI, covers the company’s new light emitting diode (LED) manufacturing technologies, focusing on advanced packaging test tools and handling systems. "The back-end process of packaged LEDs equates to about 60% of the total cost of LED manufacturing," Cooke notes.
ESI sees lowering the cost of handling, testing, and binning LEDs as a major goal. Multi-track handling doubles throughput for LED testing. Handling without device damage is also important. Ceramic packages with delicate lenses require different handling methods than standard chips. A nested carrier brings the LED through processes in a protected manner. Equipment toolsets for LEDs must be flexible, Cooke adds, seeing many package sizes and designs for LEDs.
Standardization should occur in the end-product luminaire, Cooke believes, which he says will push standardization back up the manufacturing and interconnect chain.
August 4, 2011 — Attolight AG is launching a quantitative cathodoluminescence system with nanoscale resolution and picosecond timing for research and product development in semiconductor, ceramics, advanced materials, geological, solar panel, and LED sectors.
The cathodluminescence system runs the full spectrum from UV to IR while maintaining 10nm spatial resolution. It offers a 15K to 300K temperature range. Field of view (FOV) and collection efficiency are reportedly 100x better than other CL technologies.
The system is based on a newly designed scanning electron microscope (SEM) containing an embedded optical microscope, a 9-axis cryo nano-stage, and a fully integrated cathodoluminescence system.
Available in two versions, the continuous wave CL 10-Infinity can be field-upgraded to the pico-second, time-resolved CL10-10.
See the new system, and a paper on time-resolved spectroscopy at M&M, August 7-11, Nashville TN, Microscopy.org. Attolight Booth #1520.
Attolight is a spin-off from EPFL’s Institute of Quantum Electronics and Photonics in Lausanne, Switzerland. For further details, visit www.Attolight.com.
July 26, 2011 – Marketwire — Nuventix, LED cooling technology developer, received capital from GE (NYSE:GE) and other investors. GE will also license Nuventix’s patent portfolio.
Nuventix raised $10 million in the investment round, which included GE Energy Financial Services (as part of GE’s ecomagination Challenge) and The Bergquist Company joining existing investors Braemar Energy Ventures, CenterPoint Ventures, InterWest Partners and Rho Ventures. Investments from each firm participating were not disclosed. The funding will support Nuventix’s global expansion and further development in its LED light cooling technology.
Nuventix technology moves air to cool LEDs using a single oscillating membrane, called a SynJet, rather than cooling fans. It can be integrated into LED lighting fixtures for spot, down, track and accent lighting. SynJet works with high-brightness light engines such as GE’s Infusion LED modules.
GE Lighting’s patent license will be applied to developing reliable, longer-lasting LED products and systems. Nuventix’s SynJet technology can make LED lights "brighter, longer-lasting and potentially cheaper," said Steve Briggs, vice president of marketing and product management at GE Lighting.
July 14, 2011 — ESI Inc. (Nasdaq:ESIO), laser-based manufacturing equipment supplier, uncrated the Model 5390 micromachining system for advanced LED via drilling and the AccuScribe 2600 LED wafer scribing system at SEMICON West.
The Model 5390 laser-based micromachining system creates electrical interconnections on LED packages, optimizing via placement accuracy.
It uses ESI’s high-speed compound beam positioner coupled with a high-power CO2 laser, enabling user-definable variable pulse width and pulse repetition frequencies of up to 300kHz. The system can produce more than 100 vias per second in typical single layer dielectric materials.
The first Model 5390 has shipped to an LED manufacturer.
ESI’s AccuScribe 2600 is built for high brightness LED (HB-LED) manufacturing, scribing patterned sapphire substrate (PSS), distributed Bragg reflector (DBR), metal mirror (MM) and other advanced wafers. HB-LEDs change LED architecture and manufacturing processes, said Jonathan Sabol, general manager of ESI’s LED
June 27, 2011 –Until now, LED makers used retrofitted IC equipment and materials. Yole Developpement predicts that the market has enough sway now to attract dedicated toolsets for LED fab and packaging. LED growth will not be boring, however, as a few mini down-/up-turn cycles will occur through 2016.
Yole will release "LED Packaging 2011" in July, covering the market for capital equipment, packaging trends (hint: lower the cost), and LED manufacturing capacity expectations through 2016.
With packaging eating up 20-60% of the packaged LED’s total cost, it represents the biggest area for cost reduction on this emerging technology. Although LEDs can have longterm cost benefits over traditional lighting technologies, for example, their upfront costs have inhibited widespread adoption.
More than $2 billion will be spent through 2016 on new equipment for LED packaging, including laser lift-off [LLO], permanent wafer/die bonding, singulation, and testing. Yole notes that the LED packaging houses’ reliance on retrofitted IC fab equipment is now constraining the LED industry. What once was a cost-saving and field-proven option is now becoming too far removed from the specific needs of LED devices. Yole forecasts that equipment andmaterials suppliers will now develop dedicated LED manufacturing and packaging products. These fab investments will allow LED makers to boost yields and throughputs and obtain other benefits.
Unfortunately, an over-investment in LED packaging equipment in the last 2 years will create a mini down-cycle in 2012-2013. The rush to add capacity for the upcoming general LED lighting spike meant aggressive investment from 2009 onward. This cycle, initiated in Korea, is now essentially fueled by subsidies and other incentives in China. New entrants are investing heavily to displace existing manufacturers. This will lead to a world averaged overcapacity that will briefly exceed 50% for some tools (ie: capacity utilization rate of <50%) by mid-2012.
The resultant 12-18 month down cycle may bring up some consolidations before utilization rates return to the 80% neighborhood. By mid-2013, a new investment cycle will begin, fueled by general lighting again. This might lead to another, shorter excess investment to be absorbed in 2016.
Material and component suppliers will enjoy a smoother ride: 27.6% compound annual growth rate (CAGR) between 2011 and 2016.
Package substrate makers will see the fastest growth: 45% CAGR through 2016. Phosphors will experience strong price pressure but still enjoy double digit growth with a 12% CAGR. More innovation in this field could pay off in more added value. For such products however, it remains paramount that the solution offers an overall reduction in cost of ownership ($/lumen) to LED manufacturers.
"LED Packaging 2011" reviews the major challenges associated with the key LED packaging process steps. It focuses especially on the most recent technologies and market trends for high power LED and packages and arrays and provides quantification for various materials and equipment associated with each of those key steps. Trends are analyzed in detail including emerging technologies like silicon substrates, wafer level packaging (WLP), chip on board (COB), etc.
April 1, 2011 — Daniel Duffy, research scientist in Henkel’s Advanced Technology Group, was a presenter at MEPTEC’s The Heat is On event (3/21/11, Santa Clara, CA). Summarizing the encapsulant materials used for high-brightness LEDs (HB-LEDs), he noted the pros and cons of epoxy and silicone. The material challenges for epoxies are temperature stability and color (aging); and for silicone, contamination and adhesion, as well as barrier properties. In the future, epoxies will have to be stable with respect to blue light (T>150ºC); and silicone material will have to fulfill the condition T<Tg CTE <60ppm/K. "Silicone encapsulants are very stable," said Duffy. "But it is not enough — future power demands require higher levels of photo-thermal stability."
Die attach material challenges include transparency, CTE, interfacial TC, and adhesion properties. Such materials will need to have stable thermal resistance, high TC, matched TCE, and good adhesion properties. Duffy specifically mentioned adhesion as a critical property for LED packaging. "Delamination leads to increased interfacial thermal resistance," said Duffy. "Localized temperature increases can shorten device life." Furthermore, cracking can lead to weakening of wire bonds and cracks; also, delamination weakens barrier protection.
In this podcast interview, Duffy discusses the outlook for new materials and/or enhanced materials for HB-LED applications, including quantum dots. "Quantum dots are very interesting materials…when we learn how to tune the interactions between then and the rest of the materials involved in LED packaging, they will play a continuous role in the future," said Duffy. "They offer a wide variety of colors, tunability of color, and lots of options for tuning their performance with temperature, with time and, maybe even other optical effects we’re not even considering now…they’re here to stay." The challenge, he noted, will be getting them into materials for higher-power applications.
March 23, 2011 — Emerging LED test standards was one of the topics covered at MEPTEC’s The Heat is On event, held in CA this week. András Poppe, PhD, marketing manager in Mentor Graphics’ MicReD division, took on a number of important LED testing challenges in his presentation.
The importance of defining thermal resistance for LEDs was noted by Poppe: some LED vendors neglect the effect of radiant flux (Popt, i.e., emitted optical power) in their calculations, which results in better data than is actually achieved in the field. Still another example where calculations need to be carefully weighed is determining the amount of cooling needed for reliable LED operation (Fig. 1). In this case, hot lumens need to be taken into account, essentially, calculating the light output under real operating junction temperatures (i.e., the actual operating conditions) rather than laboratory test conditions. In the accompanying podcast interview, Poppe explains these concepts.
Junction temperature — performance indicator
Differential formulation of the thermal resistance
Calculation: TJ = RthJ-X x PH + TX RthJ-X junction-to-reference_X thermal resistance supplied by the LED vendor PH heating power measured/calculated by the LED user. How? TX reference temperature (un)specified by the LED user.
Used in the design process to decide if the foreseen cooling is sufficient or not. Not enough: in case of LEDs, prediction of "hot lumens" is also required.
Figure 1. Junction temperature and thermal resistance calculations. SOURCE: Mentor Graphics
Poppe also presented a comprehensive LED testing solution (Fig. 2), noting that the JEDEC JC15 committee is working on this issue along with the CIE (Commission Internationale de l’Eclairage). Additional comments can be heard in his interview, along with a discussion of challenges associated with testing AC mains-driven LEDs — a major trend because they can be substituted for conventional light bulbs.
Figure 2. Comprehensive LED testing. SOURCE: Mentor Graphics
