Category Archives: Lithography

The semiconductor manufacturing industry is fighting to attract, educate, and retain the necessary talent for its continued growth. A significant workforce gap of up to 10,000 global positions stretches the industry’s ability to meet the world’s already demanding technology needs. To solve this challenge, SEMI, the global electronics manufacturing association, is launching an audacious and innovative campaign to raise industry awareness and attract students and recent graduates that don’t yet know about the immense opportunities available to them in semiconductor manufacturing.

Semiconductors are the brains and memory of all modern electronics. Their incredible processing power has made breakthroughs possible in communication, transportation, and medicine, powering everything from smartphones to space travel. Whether you’re driving a car, surfing the internet or using a computer, semiconductors drive technological innovation. Global semiconductor revenue has grown by over $100 billion in the last four years and is projected to surpass $0.5 trillion by 2019.

The campaign, You’re Welcome, speaks to how fundamental, yet underappreciated, this technology is. It includes a suspenseful, action-filled movie trailer that shows what happens when scientists, engineers, and mathematicians make semiconductors to save the world from the brink of disaster. The video also takes viewers behind-the-scenes of a semiconductor facility, or fab, which brings together cutting-edge STEM fields to develop the world’s most advanced technology. The campaign’s website provides information about the value and production of semiconductors, as well as a career guide that showcases the wide variety of opportunities available with companies such as Intel, Samsung, Applied Materials, Tokyo Electron, and the more than 2,000 SEMI member companies.

The campaign is just one piece in SEMI’s comprehensive workforce development plan. The plan engages students as early-on as 4th grade, inspires and motivates them through high school and college, and provides pathways to professional careers, building a pipeline to fill the short-term and long-term needs of the industry. Through the You’re Welcome campaign, SEMI is addressing the increasingly urgent workforce need by taking a completely new, never-before-seen approach to talent recruitment by leveraging high-interest areas of entertainment, media and storytelling to excite students about the industry’s role in society.

SEMI, the global industry association representing the electronics manufacturing supply chain, today applauded the United States and China for agreeing to take first steps to reduce trade tensions. The U.S. plans to delay tariff increases on $200 billion worth of Chinese imports, China has vowed to increase U.S. market access, and both parties are planning talks over the course of 90 days to address current frictions.

“Everyone, businesses and consumers alike, relies on devices powered by semiconductors,” said Ajit Manocha, president and CEO of SEMI. “Tariffs on products threaten jobs, stifle innovation, curb growth, and compromise U.S. competitiveness.”

With intellectual property critical to the semiconductor industry, SEMI strongly supports efforts to better protect valuable IP. SEMI believes, however, that U.S. tariff increases will ultimately do nothing to change China’s trade practices. SEMI has long supported efforts to reduce and end trade tensions between the U.S. and China.

“While this is a first step, it is encouraging to see presidents Trump and Xi committed to working together,” Manocha said. “We look forward to continued negotiations that produce an agreement that not only removes tariffs altogether, but also satisfactorily addresses bilateral economic concerns.”

The semiconductor industry relies heavily on international trade. Since the tariffs have been in force, companies have faced higher costs, greater uncertainty, and difficulty selling products abroad.

Since action against China was announced in March, SEMI has engaged heavily with the Trump administration, submitting written comments and offering testimony on the importance of the free trade to the industry as well as the damaging effects of tariffs on Chinese goods. SEMI estimates that tariffs would have cost semiconductor companies more than $700 million annually.

Last month, SEMI issued “10 Principles for the Global Semiconductor Supply Chain in Modern Trade Agreements,” calling for their adoption in existing and new trade deals, including frameworks for a U.S.-China agreement.

In the face of the microelectronics industry’s unprecedented challenges and opportunities with artificial intelligence (AI) and new markets outside the historic semiconductor audiences, SEMI announces the Technology Leadership Series of the Americas. The seven-part sequence of related strategy and technical conferences comprises the world’s largest and most comprehensive approach for examining and fabricating future innovations that can fuel a higher quality of life for the planet.

As the era begins with the volume of the world’s data doubling every 12-18 months, a global brain trust of hundreds of industry experts has provided inputs for a coherent, step-by-step process that will position the microelectronics industry to navigate the future.

With an objective to reduce learning curves and shorten product times to market, key interest groups have rallied with SEMI in the past 24 months to multiply interactions with the supply chain. In turn, these exchanges are calculated to increase the members’ respective technical ROIs. Technology communities include the Fab Owners Alliance (FOA), FlexTech, MEMS & Sensors Industry Group (MSIG), Electronic System Design Alliance, as well as global partner associations such as IEEE and SAE International, which leads technical learning for the mobility industry.

As a result, more than 2,100 global market-related businesses have teamed with SEMI to help structure content for the Technology Leadership Series of the Americas.

Aligned from coast to coast, across a 12-month span, the series is designed to foster the most critical discussions for connecting both the short-term and long-term influences impacting the $2 trillion worth of emerging markets. The series further aims to remove guesswork about which of the world’s rapidly rising number of conferences provides the highest ROI for the senior executive, engineer-scientist and sales manager.

“There’s been lots of talk around AI, its potential enhancements for nearly all markets, and which priorities should be next for maximizing those. To facilitate measurable industry progress, the approach for this series is to fit together the most critical puzzle pieces – strategy, design, new materials and manufacturing technologies – that will deliver the most impactful roadmap for the coming decades,” said David Anderson, president of SEMI Americas and series co-author. “The experts have concluded that focal points identified for these topic-exclusive conferences will each serve as a stepping stone – or enabler – for the roadmap’s most important areas. As with previous industry efforts, what hasn’t changed is that the path to success hinges on collaboration by partners from across the supply chain.”

Target topics will address the leading edges of industry knowledge and practices, including up-to-the-minute market forecasts and deep dives into game-changing issues and advancements. Six strategy and technical conferences will culminate in an unmatched integration of technologies and partners at SEMICON West, July 9-11, 2019, in San Francisco.

The Series’ special conferences are:

  • Industry Strategy Symposium (ISS) Jan. 6-9 – will kick off the new year with analysis of new and emerging demand drivers for new architectures, new logic and memory, new streams of investment and how to advance their arrivals and ensure longevities that enable the next industrial revolution.
  • Flexible & Printed Electronics and MEMS & Sensors Technical Congress (FLEX/MSTC) Feb. 18-21 – the co-located events will provide the most comprehensive technical conference as FLEX focuses on the design and manufacture of flexible electronics, including sensors, IC integration and substrates, while MSTC focuses on the technology behind the trends in MEMS and sensors for autonomous mobility in mobile devices, IOT, drones, and autonomous transportations.
  • Advanced Semiconductor Manufacturing Conference (ASMC) May 6-9 – will improve the industry’s advanced manufacturing strategies and methodologies through a combined sharing of highlights and insights by device makers, equipment and materials suppliers and academics. Women in Semiconductors will hold their third annual workshop.
  • Strategic Materials Conference (SMC) Sept. 2019 – will share the latest developments from around the world in strategic materials that will be vital for new markets, system creation, heterogeneous integration and packaging.
  • MEMS & Sensors Executive Congress (MSEC) Oct. 2019 – will present how the next generations of MEMS and sensors will be designed and produced to meet on-going growth for emerging markets beyond the historic microelectronics customer base.
  • International Technology Partners Conference (ITPC) Nov. 3-6 – will advance productive trans-pacific relationships to help avoid threatened supply chain prosperity, leveraging thought-leadership and relationship-building programs for executive-level engagement.

At the peak of the collaborative series, SEMICON West 2019 will provide renowned global presenters and hands-on demos, at both strategic and technical levels, for up-to-minute predictions and breakthroughs on upcoming trends and enablers. Based on direction from SEMI’s members, the five vertical application areas of AI and Data, Smart Transportation, MedTech, Smart Manufacturing and Industrial Automation, plus workforce development, will be featured at the semiconductor industry’s flagship event.

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced the addition of Silicon Labs (NASDAQ: SLAB) as an SIA member. Silicon Labs President and CEO Tyson Tuttle was elected to the SIA board of directors at the association’s board meeting on Nov. 29. Silicon Labs joins several other companies that have become SIA members within the last year: Cree, NVIDIA, Xilinx, Arm, SK Hynix, and KLA-Tencor.

“Silicon Labs is a major player and leading voice in our industry, and we’re thrilled to have them in the SIA tent,” said John Neuffer, SIA President and CEO. “SIA has a 40-year history of advancing the semiconductor industry’s interests in Washington and capitals around the world. Our work to advance policies that will promote growth and innovation in our industry will be greatly strengthened by the addition of Silicon Labs as a member, and we are excited to welcome Tyson Tuttle to the SIA board.”

Tyson Tuttle has been instrumental in shaping Silicon Labs’ strategic and technological direction for more than 20 years. After becoming CEO in 2012, Tyson laid the foundation for a cultural shift to serve broad-based markets with a greater emphasis on software and tools, enabling customers to simplify IoT system design. As CEO, Tyson has transformed Silicon Labs into a leading provider of IoT connectivity solutions, with more than half of the company’s revenue stemming from the IoT. He has more than 25 years of semiconductor experience and holds more than 70 patents in RF and mixed-signal IC design. Tyson received a B.S. degree in Electrical Engineering in 1989 from Johns Hopkins University and an M.S. degree in Electrical Engineering in 1992 from UCLA.

“Smart government policy is critical to the continued strength of the semiconductor industry, the tech sector, and the broader economy,” said Tuttle. “It is a true pleasure to represent Silicon Labs on the SIA board and to work alongside my colleagues to make meaningful progress on issues of great importance to us all.”

SEMI, the global industry association representing the electronics manufacturing supply chain, today reported that third quarter 2018 worldwide semiconductor manufacturing equipment billings dropped 5 percent from the previous quarter to US$15.8 billion but are 11 percent higher than the same quarter a year ago.

The data are gathered jointly with the Semiconductor Equipment Association of Japan (SEAJ) from over 95 global equipment companies that provide data on a monthly basis.

The quarterly billings data by region in billions of U.S. dollars, quarter-over-quarter growth and year-over-year rates by region are as follows:

 
3Q2018
2Q2018
3Q2017
3Q18/2Q18
(Qtr-over-Qtr)
3Q18/3Q17
(Year-over-Year)
China
3.98
3.79
1.93
5%
106%
Korea
3.45
4.86
4.99
-29%
-31%
Taiwan
2.90
2.19
2.37
33%
23%
Japan
2.41
2.28
1.73
6%
40%
North America
1.27
1.47
1.50
-14%
-15%
Rest of World
0.98
0.96
0.74
2%
32%
Europe
0.85
1.18
1.06
-29%
-20%
Total
15.84
16.74
14.33
-5%
11%

Source: SEMI (www.semi.org) and SEAJ, December 2018

 

The Equipment Market Data Subscription (EMDS) from SEMI provides comprehensive market data for the global semiconductor equipment market.

Sanjay Mehrotra, President and CEO, Micron Technology, 2019 SIA Chair

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced the SIA Board of Directors has elected Sanjay Mehrotra, President and CEO of Micron Technology, Inc. (NASDAQ: MU), as its 2019 Chair and Keith Jackson, President, CEO, and Director of ON Semiconductor (NASDAQ: ON), as its 2019 Vice Chair.

“It is a great pleasure to welcome Sanjay Mehrotra as SIA’s 2019 Chair and Keith Jackson as SIA’s Vice Chair,” said John Neuffer, SIA President and CEO. “A design engineer by trade, Sanjay is a highly accomplished industry veteran and a leading voice on semiconductor technology. With more than 30 years of experience, Keith is a mainstay in our industry and a devoted champion for semiconductor priorities. Their combined skills and experience will be a tremendous asset to SIA as we pursue our industry’s interests in Washington and around the world.”

A 39-year veteran of the semiconductor industry, Mehrotra joined Micron in May 2017 after a long and distinguished career at SanDisk Corporation, where he led the company from a start-up in 1988 until its eventual sale in 2016. In addition to being a SanDisk co-founder, Mehrotra served as its President and CEO from 2011 to 2016, overseeing its growth to an industry-leading Fortune 500 company.

Prior to SanDisk, Mehrotra held design engineering positions at Integrated Device Technology, Inc., SEEQ Technology, and Intel Corporation. Mehrotra earned both bachelor’s and master’s degrees in electrical engineering and computer science from the University of California, Berkeley. He holds more than 70 patents and has published articles in the areas of non-volatile memory design and flash memory systems.

“The semiconductor industry is leading the greatest period of technological advancement in human history, making the seemingly impossible possible and opening up tremendous opportunities for economic growth,” said Mehrotra. “Driving innovation requires our industry to speak with one voice and promote policies that support our industry vision, and I look forward to helping lead that effort as 2019 SIA Chair.”

Jackson began serving as President, CEO, and Director of ON Semiconductor in November 2002. Before joining ON Semiconductor, he was with Fairchild, serving as Executive Vice President and General Manager, Analog, Mixed Signal, and Configurable Products Groups, and was head of its Integrated Circuits Group.

Previously, Jackson served as President and a Member of the Board of Directors of Tritech Microelectronics in Singapore and worked for National Semiconductor Corporation, most recently as Vice President and General Manager of the Analog and Mixed Signal division. He also held various positions at Texas Instruments Incorporated, including engineering and management positions, from 1973 to 1986. Mr. Jackson earned his bachelor’s and master’s degrees from Southern Methodist University.

“It is an honor to serve as 2019 SIA Vice Chair,” Jackson said. “Many issues of great importance to the semiconductor industry are being debated in Washington and around the world. We look forward to promoting policies that advance semiconductor technology and move our industry forward.”

 

By David W. Price, Jay Rathert and Douglas G. Sutherland

Author’s Note:The Process Watch series explores key concepts about process control—defect inspection, metrology and data analytics—for the semiconductor industry. This article is the fourth in a series on process control strategies for automotive semiconductor devices.

The first three articles1-3 in this series discussed methods that automotive semiconductor manufacturers can use to better meet the challenging quality requirements of their customers. The first paper addressed the impact of automotive IC reliability failures and the idea that combating them requires a “Zero Defect” mentality. The second paper discussed continuous improvement programs and strategies that automotive fabs implement to reduce the process defects that can become chip reliability problems. The third paper focused on the additional process control sensitivity requirements needed to capture potential latent (reliability) defects. This installment discusses excursion monitoring strategies across the entire automotive fab process so that non-conforming material can be quickly found and partitioned.

Semiconductor fabs that make automotive ICs typically offer automotive service packages (ASPs). These ASPs provide differentiated process flows – with elements such as more process control and process monitoring, or guaranteed use of golden process tools. The goal of ASPs is to help ensure that the chips produced meet the stringent reliability requirements of the automotive industry.

But even with the use of an automotive service package, excursions are inevitable, as they are with any controlled process. Recognizing this, automotive semiconductor fabs pay special attention to creating a comprehensive control plan for their critical process layers as part of their Process Failure Mode and Effects Analysis (PFMEA). The control plan details the process steps to be monitored and how they are monitored – specifying details such as the inspection sensitivity, sampling frequency and the exact process control systems to be used. A well-designed control plan will detect all excursions and keep “maverick” wafers from escaping the fab due to undersampling. Additionally, it will clearly indicate which wafers are affected by each excursion so that they can be quarantined and more fully dispositioned – thereby ensuring that non-conforming devices will not inadvertently ship.

To meet these objectives, the control plan of an automotive service package will invariably require much more extensive inspection and metrology coverage than the control plan for production of ICs for consumer products. An analysis of process control benchmarking data from fabs running both automotive and non-automotive products at the same design rule have shown that the fabs implement more defect inspection steps and more types of process control (inspection and metrology) for the automotive products. The data reveals that on average:

  • Automotive flows use approximately 1.5 to 2 times more defect inspection steps
  • Automotive flows employ more frequent sampling, both as a percentage of lots and number of wafers per lot
  • Automotive flows use additional sensitivity to capture the smaller defects that may affect reliability

The combined impact of these factors results in the typical automotive fab requiring 50% more process control capacity than their consumer product peers. A closer look reveals exactly how this capacity is deployed.

Figure 1 below shows an example of the number of lots between inspection points for both an automotive and a non-automotive process flow in the same fab. As a result of the increased number of inspection steps, if there is a defect excursion, it will be found much more quickly in the automotive flow. Finding the excursion sooner limits the lots at risk: a smaller and more clearly defined population of lots are exposed to the higher defect count, thereby helping serve the automotive traceability requirement. These excursion lots are then quarantined for high-sensitivity inspection of 100% of the wafers to disposition them for release, scrap, or when applicable, a downgrade to a non-automotive application.

Figure 1. Example demonstrating the lots at risk between inspection points for an automotive process flow (blue) and a non-automotive (baseline) process blow (pink). The automotive process flow has many more inspection points in the FEOL and therefore fewer lots at risk when a defect excursion does occur.

The additional inspection points in the automotive service package have the added benefit of simplifying the search for the root cause of the excursion by reducing the range of potential sources. Fewer potential sources helps speed effective 8D investigations4 to find and fix the problem. Counterintuitively, the increased number of inspection points also tends to reduce production cycle time due to reduced variability in the line.5

While increasing inspection capacity helps monitor and contain process excursions, there remains risk to automotive IC quality. Because each wafer may take a unique path through the multitude of processing chambers available in the fab, the sum of minor variations and marginalities across hundreds of process steps can create “maverick” wafers. These wafers can easily slip through a control plan that relies heavily on sub-sampling, allowing at-risk die into the supply chain. To address this issue, many automotive fabs are adding high-speed macro defect inspection tools to their fleet to scan more wafers per lot. This significantly improves the probability of catching maverick wafers and preventing them from entering the automotive supply chain.

Newer generation macro defect inspection tools6 can combine the sensitivity and defect capture of many older generation brightfield and darkfield wafer defect inspection tools into a single platform that can operate at nearly 150 wafers per hour, keeping cost of ownership low. In larger design rule 200mm fabs, the additional capacity often reveals multiple low-level excursions that had previously gone undetected, as shown in Figure 2.

Figure 2. The legacy sample plan of 5 wafers per lot (yellow circles) would have allowed the single maverick wafer excursion (red square) to go undetected. High capacity macro defect inspection tools can stop escapes by reducing undersampling and the associated risks.

In advanced, smaller design rule fabs, macro defect inspection tools lack the needed sensitivity to replace the traditional line monitoring and patterned wafer excursion monitoring roles occupied by broadband plasma and laser scanning wafer defect inspection tools. However, their high capacity has found an important role in augmenting the existing sample plan to find wafer-level signatures that indicate a maverick wafer.

A recent development in automotive control strategies is the use of defect inspection for die-level screening. One such technique, known as Inline Defect Part Average Testing (I-PAT™), uses outlier detection techniques to further enhance the fab’s ability to recognize die that may pass electrical test but become reliability failures later due to latent defects. This method will be discussed in detail in the next installment of this series.

About the authors:

Dr. David W. Price and Jay Rathert are Senior Directors at KLA-Tencor Corp. Dr. Douglas Sutherland is a Principal Scientist at KLA-Tencor Corp. Over the last 15 years, they have worked directly with over 50 semiconductor IC manufacturers to help them optimize their overall process control strategy for a variety of specific markets, including implementation of strategies for automotive reliability, legacy fab cost and risk optimization, and advanced design rule time-to-market. The Process Watch series of articles attempts to summarize some of the universal lessons they have observed through these engagements.

References:

  1. Price, Sutherland and Rathert, “Process Watch: The (Automotive) Problem With Semiconductors,” Solid State Technology, January 2018.
  2. Price, Sutherland and Rathert, “Process Watch: Baseline Yield Predicts Baseline Reliability,” Solid State Technology, March 2018.
  3. Price, Sutherland, Rathert, McCormack and Saville, “Process Watch: Automotive Defect Sensitivity Requirements,” Solid State Technology, August 2018.
  4. 8D investigations involve a systematic approach to solving problems. https://en.wikipedia.org/wiki/Eight_disciplines_problem_solving
  5. Sutherland and Price, “Process Watch: Process Control and Production Cycle Time,” Solid State Technology, June 2016.
  6. For example, see: https://www.kla-tencor.com/products/chip-manufacturing/defect-inspection-review.html#product-8-series

 

IC Insights revised its outlook for total semiconductor industry capital spending and presented its forecast of semiconductor capex spending for individual companies in its November Update to The McClean Report 2018, which was released earlier this month.

Samsung is expected to have the largest capex budget of any IC supplier again in 2018.  After spending $24.2 billion for semiconductor capex in 2017, IC Insights forecasts that Samsung’s spending will edge slightly downward, but remain at a very strong level of $22.6 billion in 2018 (Figure 1).  If it comes in at this amount, Samsung’s two-year semiconductor capital spending will be an astounding $46.8 billion.

Figure 1

As seen in Figure 1, Samsung’s semiconductor capital outlays from 2010, the first year the company spent more than $10 billion in semiconductor capex, through 2016 averaged $12.0 billion per year. However, after spending $11.3 billion in 2016, the company more than doubled its 2017 capex budget. The fact that Samsung’s continued its strong capex spending in 2018 is just as impressive.

IC Insights believes that Samsung’s massive spending outlays in 2017 and 2018 will have repercussions far into the future.  One effect that has already begun is a period of overcapacity in the 3D NAND flash market.  This overcapacity situation is due not only to Samsung’s huge spending for 3D NAND flash, but also from spending by competitors (e.g., SK Hynix, Micron, Toshiba, Intel, etc.) that attempt to keep pace in this market segment.

With the DRAM and NAND flash memory markets showing strong growth through the first three quarters of 2018, SK Hynix ramped up its capital spending this year.  In 1Q18, SK Hynix said that it intended to increase its capex spending by “at least 30%” this year. In the November Update, IC Insights forecasts that SK Hynix will see a 58% surge in its semi capex spending.  The increased spending by SK Hynix this year is focused primarily on bringing new capacity online at two of its large memory fabs—M15, a 3D NAND flash fab in Cheongju, South Korea, and the expansion of its huge DRAM fab in Wuxi, China. The Cheongju fab is being pushed to open before the end of this year.  The Wuxi fab is also targeted to open by the end of this year, a few months earlier than its original start date of early 2019.

Overall, IC Insights’ now forecasts total semiconductor industry capital spending will climb 15% to $107.1 billion this year, the first time that annual industry capex is expected to top $100.0 billion. Following the industry-wide growth this year, semiconductor capex is expected to decline 12% in 2019 (Figure 2).

Figure 2

Given that the current softness in the memory market is expected to extend into at least the first half of next year, the combined capital spending by the three largest memory suppliers—Samsung, SK Hynix, and Micron—is forecast to drop from $45.4 billion in 2018 to $37.5 billion in 2019, a decline of 17%.

In total, the top five spenders, which are expected to represent 66% of total outlays this year, are forecast to cut their capital spending by 14% in 2019 with the remaining semiconductor industry companies registering a 7% decline.

SEMI, the global industry association serving the global electronics manufacturing supply chain, today announced the industry’s first worldwide fab data for power and compound semiconductors. The new report, Power and Compound Fab Outlook, provides comprehensive front-end semiconductor fab information and a forecast to 2022 for global manufacturing capabilities of power and compound semiconductors.

Power devices are rising in importance as energy-efficiency standards tighten to meet growing demand for power-thrifty high-end consumer electronics, wireless communications, electric vehicles, green energy, data centers, and both industrial and consumer IoT (Internet of Things) applications. Semiconductor fabs around the globe have responded with improvements to power usage in every aspect of electronics including power harvesting, delivery, transformation, storage, and consumption. Cost structure and performance are critical in power electronics, dictating the pace of market growth and technology adoption.

With compound materials driving significant gains in the energy efficiency of power devices, the Power and Compound Fab Outlook highlights particular compound materials that have been adopted in semiconductor fabs. The report is an essential business tool for anyone interested in related tool and material markets as well as power and compound materials capacity in fabs by region and wafer sizes.

Figure 1

North America-based manufacturers of semiconductor equipment posted $2.06 billion in billings worldwide in October 2018 (three-month average basis), according to the October Equipment Market Data Subscription (EMDS) Billings Report published today by SEMI. The billings figure is 0.9% percent lower than the final September 2018 level of $2.07 billion, and is 2.0 percent higher than the October 2017 billings level of $2.02 billion.

“October billings of North American equipment suppliers reflect near-term weakening of demand for PC, mobile phones and servers,” said Ajit Manocha, president and CEO of SEMI. “Additionally, memory manufacturers have pulled back investments in response to recent softening of memory pricing.”

The SEMI Billings report uses three-month moving averages of worldwide billings for North American-based semiconductor equipment manufacturers. Billings figures are in millions of U.S. dollars.
Billings
(3-mo. avg.)
Year-Over-Year
May 2018
$2,702.3
19.0%
June 2018
$2,484.3
8.0%
July 2018
$2,377.9
4.8%
August 2018
$2,236.8
2.5%
September 2018 (final)
$2,078.6
1.2%
October 2018 (prelim)
$2,059.1
2.0%

Source: SEMI (www.semi.org), November 2018

SEMI publishes a monthly North American Billings report and issues the Worldwide Semiconductor Equipment Market Statistics (WWSEMS) report in collaboration with the Semiconductor Equipment Association of Japan (SEAJ). The WWSEMS report currently reports billings by 24 equipment segments and by seven end market regions. SEMI also has a long history of tracking semiconductor industry fab investments in detail on a company-by-company and fab-by-fab basis in its World Fab Forecast and SEMI FabView databases.