Category Archives: Materials and Equipment

September 28, 2007 — Ormecon International has introduced a new nanosize surface finish for the printed circuit board market. With a thickness of 55 nanometers, the layer consists of a nanoparticle complex formed between organic nanometal and silver.

According to Ormecon, this ultrathin layer provides a much more powerful protection against oxidation than any other established metallic finish, which are between six and 100 times thicker than the new nanofinish.

The Korean company YooJin will install the first industrial line for the nanofinish, Ormecon said in a news release, and the line will go into operation in the second half of October. The company said the JooJin installation will mark the first time a nanosized surface finish is used for printed circuit boards.

by Debra Vogler, Senior Technical Editor, Solid-State Technology

Building on its relationships with partners PDF Solutions, Ponte Solutions, and Brion Technologies (recently acquired by ASML), Pyxis Technology launched its Nexus Solution Suite on Sept. 25, having matured the product through implementation on 60 different designs, and working with a number of IC manufacturers including AMD and Chartered Semiconductor Manufacturing.

According to Mitch Heins, VP of marketing, the need for the company’s technology arises not only from the need to start with a “fresh sheet of paper” with respect to the traditional iterative approach to physical design. Pyxis has set out on a design-based DFM approach that implements a single-pass approach that concurrently looks at routability closure, timing closure, manufacturing closure, DFM rules, etc. The resulting layout is thereby optimized for yield.

To illustrate the yield benefits achievable with Pyxis’ NexusRoute software, an IC routing platform architected for designs =65nm, Heins provided data on a benchmarking study showing how predicted yield using the company’s auto-router compares with other commercially available routers [see Figure]. The graph shows results from six different benchmarks, four of which were manufactured at 90nm and two of which were manufactured at 65nm technologies, he explained.

Each of the benchmarked designs is a production design for which the fab yield is known and simulated using yield analysis tools from its DFM partners, Ponte Solutions and PDF Solutions. The results were correlated to the known fab yields, Heins told WaferNEWS, and then re-routed with NexusRoute “using identical standard cell and macro placements and timing constraints,” he noted. The Pyxis version of the designs were re-simulated and compared against the original version of the design to generate the results in the figure. In all cases, the Pyxis routed design showed an improvement in the simulated yield ranging from 5.1%-11.1%. — D.V.


Rice University scientists captured the first optical images of carbon nanotubes inside a living organism. (Photo: Rice University)

September 24, 2007 — Rice University scientists have captured the first optical images of carbon nanotubes inside a living organism. Using fruit flies, the researchers confirmed that a technique developed at Rice — near-infrared fluorescent imaging — was capable of detecting DNA-sized nanotubes inside living fruit flies.

“Carbon nanotubes are much smaller than living cells, and they give off fluorescent light in a way that researchers hope to harness to detect diseases earlier than currently possible,” said research co-author Bruce Weisman, professor of chemistry. “In order to do that, we need to learn how to detect and monitor nanotubes inside living tissues, and we must also determine whether they pose any hazards to organisms.”

Researchers have studied how carbon nanotubes interact with tissues of rabbits, mice and other animals, but Weisman and co-author Kathleen Beckingham, professor of biochemistry and cell biology, chose something smaller — the fruit fly Drosophila melanogaster — to attempt the first-ever detection of nanotubes inside a living animal.

“Drosophila is one of biology’s preeminent model organisms,” said Beckingham. “We have a wealth of knowledge about the genetic and biochemical workings of fruit flies, and this presents us with unique opportunities to explore the effects and fate of single-walled carbon nanotubes in a living organism.”

Carbon nanotubes have long been promoted as a possible drug delivery device or disease detector, and have also been the focus of concern among some scientists and activists worried about possible toxic effects in the body. This ability to visualize nanotubes interacting with live cells will likely be followed by many nanotech watchers.

Weisman and Beckingham’s research, which is available online, appeared in the September issue of Nano Letters, the American Chemical Society’s journal. A short video is also available at YouTube.

In the study, fruit fly larvae were raised on a yeast paste that contained carbon nanotubes. The flies were fed this food from the time they hatched throughout their initial feeding phase of 4-5 days. Fruit flies are ravenous eaters during this period and gain weight continuously until they are about 200 times heavier than hatchlings. Then they become pupae. As pupae, they do not eat or grow. They mature inside pupal cases and emerge as adult flies.

“Developmentally, the first few days of a fruit fly’s life are critical,” Beckingham said. “We provided larval flies with a steady diet of food that contained carbon nanotubes and checked their weight just after they emerged from their pupal cases. We found no significant differences in the adult weight of nanotube-fed flies when compared to control groups that were not fed carbon nanotubes.”

The nanotube-fed larvae also survived to adulthood just as well as the control group.

Using a custom-built microscope, the team aimed a red laser beam into the fruit flies. This excited a fluorescent glow from the carbon nanotubes, as they emitted near-infrared light of specific wavelengths. The researchers were able to use a special camera to view the glowing nanotubes inside living flies. Videos constructed from these images clearly showed peristaltic movements in the digestive system.

When the researchers removed and examined tissues from the flies, they found the near-infrared microscope allowed them to see and identify individual nanotubes inside the tissue specimens. The highest concentration of nanotubes was found in the dorsal vessel, which is analogous to a main blood vessel in a mammal. Lesser concentrations were found in the brain, ventral nerve cord, salivary glands, trachea and fat. Based on their assays, the team estimates that only about one in 100 million nanotubes passed through the gut wall and became incorporated into the flies’ organs.

The research was sponsored by the National Science Foundation, Rice University’s Center for Biological and Environmental Nanotechnology, the Alliance for NanoHealth and the Welch Foundation. Co-authors include Tonya Leeuw, Michelle Reith, Rebecca Simonette, Mallory Harden, Paul Cherukuri, and Dmitri Tsyboulski.

September 21, 2007 – Taiwan-based packaging houses are ramping up orders for wire bonders to meet demand from networking, consumer, and PC segments, according to a Digitimes report citing “industry and company sources.”

Advanced Semiconductor Engineering (ASE) and Siliconware Precision Industries (SPIL) have both been running at full wire-bonding capacity for nearly two quarters, and Lingsen Precision Industries and Greatek Electronics are not far behind, almost at full utilization rates, the report notes.

ASE and SPIL each plan to order 400 wire bonders before year’s end, and Lingsen will add another 100 wire bonders between 4Q and 1Q08, the report notes. Lingsen will increase capital by about $9 million and issue another ~$12M through issuing convertible bonds. Greatek also is looking to add as much as 20% to its 2007 wire bonding capex of ~$30M.

The report notes that SPIL chairman Bough Lin had previously thought global wire bonding capacity would grow by <10% in 3Q, but now says the new capacity should not pose any near-term oversupply concerns.

ChipSensors’ technology enables the surface of a chip itself to sense parameters. (Photo: ChipSensors)

September 21, 2007 — ChipSensors Ltd., a fabless semiconductor start-up company based in Limerick, Ireland, has unveiled what it calls a breakthrough: a new offering that enables the surface of a chip itself to sense parameters such as temperature, humidity, certain gases, and pathogens. The patent-pending technology exploits the fact that the dielectric material in standard sub-micron CMOS comprises porous oxides and polymers; by selectively admitting or blocking ingress of the agent to be sensed, any resulting changes in electrical characteristics can be accurately detected and measured, ChipSensors says.

The technology was demonstrated publicly for the first time this week at RFID Europe 2007: a prototype single-chip temperature and humidity sensor, communicated via an off-chip wireless link to a laptop PC displaying real-time measurements. ChipSensors says it is now on the verge of commercializing this technology, and is engaged in negotiations with international customers, partners, and potential investors.

According to ChipSensors, most sensors are manufactured on glass or ceramic substrates, using specialist materials and manufacturing processes, and have proved difficult, if not impossible, to accommodate within mainstream foundry CMOS processes. The wafers had to be post-processed and the sensors then required testing and calibrating after packaging, which was time-consuming and expensive. ChipSensors’ technology overcomes these obstacles. It enables sensors, signal conditioning circuits — including high resolution analog-to-digital converters — and RF transceiver functions, together with the microcontroller and memory, to be integrated on a single chip, fabricated entirely from standard CMOS.

The 0.13 µm sensor chip has applications as an all-electronic replacement for the type of electromechanical thermostats and humidistats used in building management and environmental monitoring systems. ChipSensors is also developing an ultra-low-power wireless version of this sensor that integrates all the signal conditioning, microcontroller, memory and RF transceiver functions onto the same chip as the sensor itself for incorporation into passive and active ID tags.

ChipSensors CEO Tim Cummins says, “By ‘piggy-backing’ on mainstream semiconductor technology developments in this manner, we are ‘putting sensors on Moore’s Law’, opening the door to true low-cost and high volume scalability for wireless sensors.”

September 20, 2007 – After sliding to an eight-month low in July, semiconductor equipment orders slid even further in August to their lowest levels in a year and a half, and the B:B demand indicator is even more sluggish, according to data from SEMI.

North American-based manufacturers of semiconductor equipment reported $1.39 billion worth of orders in August, about 1% lower than July, and down about 19% from August 2006 — the biggest single-month Y-Y decline, and first string of Y-Y declines, since late 2005 (Sept-Oct-Nov). Billings were flat with the prior month at $1.69B, and down roughly 3% from a year ago.

The book-to-bill ratio (B:B) stayed even with July at 0.83, meaning $83 worth of orders were received for every $100 of product billed. That’s the lowest it’s been since April 2005, and that’s also the last time bookings have been this low for consecutive months.

In a statement, SEMI president Stanley Myers acknowledged the continued slide in bookings, which are down 15% below a peak in May, but indicated that full-year 2007 equipment sales “remain on course to be comparable to 2006” — i.e., we’re in for zero growth in tool sales this year.

North American equipment bookings, billings — August 2006-August 2007

Month…….Billings…….%M-M………%Y-Y……….Bookings……..%M-M……..% Y-Y………B:B…………
……………..(3-mo. avg.)………………………………….(3-mo.avg.)……………………………………..

Aug’06…………..1742.8…….6.4%……..65.1%……….1729.7…….-0.3%…….69.6%……..0.99
Sep’06…………..1672.8……-4.0%……..53.7%……….1639.2…….-5.2%…….66.6%……..0.98
Oct’06…………..1562.9……-6.6%……..36.4%……….1468.6……-10.4%…….34.3%……..0.94
Nov’06…………..1486.1……-4.9%……..26.0%……….1426.5…….-2.8%…….30.5%……..0.96
Dec’06…………..1482.3……-0.2%……..21.1%……….1497.2……..5.0%…….31.0%……..1.01
Jan’07…………..1448.0……-2.3%……..15.0%……….1445.8…….-3.4%…….17.9%……..1.00
Feb’07………….1423.0……-1.3%……..11.3%……….1398.1…….-3.1%……..8.3%……..0.98
Mar’07………….1436.4……..0.9%……….7.3%………..1419.6………1.5%………2.5%……..0.99
Apr’07………….1594.7……..11.0%……….10.1%………..1567.5………10.4%………-2.1%……..0.98
May’07………….1670.2……..4.7%……….15.0%………..1641.9………4.7%………1.4%……..0.98
June’07……….1768.1……..5.9%……….13.5%………..1607.6……..-2.1%………-9.8%……..0.91
July’07(f)………1685.8……-4.7%…….2.9%……….1406.3…….-12.5%……-18.9%……..0.83
Aug’07(p)…………..1687.6…….0.1%……..-3.2%……….1394.5…….-0.8%……-19.4%……..0.83

Source: SEMI

An optimised fused silica stamp etch with 30 nm features to 200 nm depth. (SEM image: Oxford Instruments)

September 20, 2007 — Oxford Instruments and NIL Technology have collaborated to develop etch processes targeted specifically at nanoimprint lithography (NIL). NIL, a versatile, cost effective, and flexible high-throughput method for fabrication of structures as small as 10 nm, has a wide range of application within, for example, data storage, optics, and biosensors.

The collaboration combines Oxford Instruments’ process development expertise in plasma etching with NIL Technology’s experience in developing and supplying templates, stamps, and processes for NIL. Together the companies have developed processes for the etching of nanoimprinting stamps in fused silica, de-scumming of the imprinted polymer with negligible critical dimension (CD) loss, and etch of the final structure.

The etch developments were carried out using Oxford Instruments’ Plasmalab System100 inductively-coupled plasma (ICP) tool. The company says that ICP etch shows superior capabilities for etching of high performance NIL stamps with well-controlled profiles. The stable low pressure de-scum process possible with ICP effectively removes residual polymer after imprinting with minimal loss of CD; ICP is also well suited for transferring the imprinted pattern into fused silica and silicon.

“We saw an opportunity for NIL Technology and Oxford Instruments to work together to develop processes which are optimised as an overall end-to-end process rather than in individual steps,” says Brian Bilenberg, Chief Technical Officer of NIL Technology. “As we continue further work, we expect to improve the whole process of etching nanostructures created by nanoimprint lithography yet more.”

By Debra Vogler, Senior Technical Editor, Solid State Technology

The humble diode is the focal point of what Phiar Corp. hopes will be the beginning of a future that includes non-semiconductor materials for junction transport via quantum tunneling — and the first credible alternative to semiconductors since the vacuum tube era.

Potential applications of the company’s metal-double-insulator-metal (MIIM) diodes include:

– 60GHz+ wireless communications (addresses antenna-edge frequency conversion);
– millimeter wave radar;
– millimeter wave and Terahertz imaging and spectroscopy;
– next-generation Flash memory (enabling direct addressing at NAND densities); and
– chip-to-chip RF communications (reducing copper interconnects).

Motorola Labs has already gone on record validating the high-speed performance of MIIMs for future wireless applications. Vida Ilderem, VP of Motorola’s embedded systems research, said in a joint news release that Phiar’s diodes surpass the benchmarks of commercially available diodes for millimeter wave detector applications (see Fig. 1, above). A joint paper presented at the 2007 IEEE RFIC Conference discussing measurements taken at Motorola support that claim, noted Adam Rentschler, director of business development at Phiar.

MIIM devices are made of amorphous films deposited at temperatures below 300°C. Phiar says it has proven the technology on several substrates — CMOS, post-CMP CMOS, SiO2, quartz, and polyimde. RF signal integrity is optimized by locating passives, antennas, and detector diodes on the same substrate.

Devices built with the MIIM structure, which uses nanoscale stacks of metals and insulators instead of traditional compound semiconductor materials, offer two primary speed advantages over semiconductors, according to Rentschler. “First, traditional semiconductor junction transport is replaced by quantum tunneling, a phenomenon so fast it requires only about one femtosecond,” he told WaferNEWS. “Second, in metal-insulator devices, bulk electron transport takes place in metals, rather than much lower mobility semiconductor materials” (see Fig. 2, below).

Much of the projected major cost-savings in the MIIMs process flow come from the ability to use existing sputtering equipment as well as eliminating the need for exotic compound semiconductor materials, explained Rentschler. Additionally, because the nominal device linewidths are 300nm, there is no need for cutting-edge lithography. “Currently, we only need four mask layers — that number will probably start to increase a bit when we start building more sophisticated analog ICs, but that number is still small compared to the number of mask layers one would normally find in a typical CMOS process,” he said. The 60GHz diodes developed for Motorola measure roughly 300nm x 300nm, dimensions easily achieved with older manufacturing technology.

The company is careful, though, not to make claims about supplanting Moore’s Law. “Those working at the cutting edge of semiconductor technology continue to do amazing things and keep inventing around seemingly insurmountable challenges,” Rentschler told WaferNEWS. “Moore’s Law is alive and well, but there is now an alternative to incremental performance improvement in semiconductor technology. Metal-insulator electronics is a brand new platform for engineers to utilize, particularly in applications requiring low cost, high performance analog devices.”

RF engineers may become enthusiastic as this technology is deployed. According to the company, its metal-insulator electronics offers the ability to tap not only the 7GHz of unlicensed spectrum centered around 60GHz, but also the same-sized chunks the FCC has allocated at 120GHz and 244GHz. “The devices stay the same,” said Rentschler, “but the antennas shrink to handle the higher frequencies.” He added that Phiar plans to eventually build chip-to-chip RF interconnects at carrier frequencies of 500GHz or higher.

Another application being explored is flash memory, where “there’s always a need to achieve greater density and greater speeds,” says Rentschler. He wouldn’t elaborate on details, citing a confidentiality agreement, but noted that Phiar’s technology enables the fabrication of a very high-current density, very small-switching diode that’s compatible with CMOS and proprietary flash memory technology. — D.V.

September 14, 2007 – Fujifilm Corp. says its electronic materials division has acquired Air Products’ OptiYield positive photoresist developer line. Terms of the deal were not disclosed.

The addition “is a complementary addition to our ancillaries product portfolio,” said Brian O’Donnelly, business director, formulated products & thin film systems, Fujifilm Electronic Materials, in a statement. “In certain applications, the OptiYield chemistry may provide significant performance and productivity gains compared to conventional developer chemistries,”

Supply and support functions will be transferred from Air Products’ facility in Tempe, AZ to Fujifilm’s site in Mesa, AZ, with transfer of all operations expected to be done by 1Q08.

by Debra Vogler, Senior Technical Editor

The logic portion (i.e., baseband) of chipsets for cell phones and other mobile communications applications has benefited from scaling, and the radio portion is already down the path of integration (going from exotic technologies to BiCMOS, SiGe, and RF CMOS). But integration has not yet found its way into the last portion, from the radio out — power amplifiers, switches, and memory management.

The lack of scaling solutions for the feature-rich portions of mobile chipsets has a lot to do with the difficulties inherent in using GaAs and other compound semiconductor materials that make them more expensive to use in manufacturing. Fueled by the demand for cell phones in emerging markets, IBM has seized the opportunity by developing a low cost, integrated solution (announced concurrent with the FSA Expo) in which multiple RF/analog functions are integrated onto a single chip.

The “CMOS 7RF SOI” technology makes use of IBM’s extensive experience with SOI, and even though the geometry being used is 0.18µm, the lithography technology is relatively advanced for the RF world and very advanced compared to what is used in GaAs manufacturing, according to Jim Dunn, senior manager, analog & mixed signal technology development at IBM’s Semiconductor Research and Development Center.

The key to the technology was being able to obtain the same electrical performance in an SOI environment as that obtained with GaAs, a typical material for communications applications. GaAs pHEMTs (pseudomorphic high-electron mobility transistors) have been the preferred solution for switches, Dunn told WaferNEWS, because of their good insertion loss, semi-insulating substrate properties (low capacitance/good isolation), and with breakdown voltages usually >12V, it is not necessary to stack very many of them to address voltage spikes or load mismatches.

If the switch function can be moved from GaAs into silicon, however, then the controller, power amplifier, and other functions in the front-end of the handset also can be moved into silicon, Dunn explained. “By using SOI as the substrate, we can take advantage of having source/drains sitting on top of a buried oxide that reduces the overall junction capacitances, improving isolation,” he said. “Electrically, we can get performance that matches the GaAs solution and finally, because in SOI, the bodies are floating, you can stack multiple devices to withstand any high voltage spikes.”

Dunn added that the devices have time constants that are very fast relative to those associated with the voltage spikes. “So we can take a stack of 2.5V devices and by putting them together, withstand a 30V voltage spike, which is what you are likely to encounter in a typical GSM phone,” said Dunn.

As phones become more advanced, there are even more multiple bands with multiple modes (i.e., fairly complex transmit and receive capabilities), so IBM’s new technology becomes more compelling — high levels of integration do not play to the strengths of GaAs, but they do in SOI, said Dunn. “As you start having more and more devices in CMOS, it’s typical to have 3-4 levels of metal to integrate more logic