Category Archives: Materials and Equipment

March 8, 2012 — AGC (Asahi Glass Co. Ltd.) developed ultra-high-speed processing technology for micro hole drilling of 0.1mm-thin glass, targeting leading-edge applications such as 3D semiconductor packages.

Ultra-thin glass has prospects for being applied to various products thanks to its thinness of 0.1mm in addition to the excellent features of glass including transparency, heat resistance and electrical insulation. Last year, AGC developed the thinnest (0.1mm) float glass, but these were difficult to process using ordinary processing methods, which led to this new drilling technology

AGC developed the micro hole drilling processing technology using a dielectric breakdown induced by electrical discharging. This technology has enabled precise drilling processing on ultra-thin glass with a very high processing speed, in the order of a few milliseconds.

This technology can be applied, for instance, to hole drilling processing of thin sheet glass for interposers for laminated stacked-die packages with interposers. This interposer needs many holes with a diameter of about 50

March 8, 2012 – PRNewswire-Asia/ — Semiconductor Manufacturing International Corporation (SMIC; NYSE:SMI; SEHK:0981.HK), China-based advanced semiconductor foundry, announced an ultra high density (UHD) library solution for its 0.11um copper back end of line (Cu-BEOL) manufacturing platform that can reduce chip size by an average of 31%.

SMIC’s comprehensive silicon-proven UHD IP solution incorporates SMIC’s in-house UHD IP library, based on smaller bit cells, and Mentor Graphics’ (NASDAQ: MENT) cool-memory IP library with MemQuestTM memory compiler, specifically designed for compatibility with SMIC’s UHD solution. SMIC’s in-house UHD library consists of a 6-track UHD standard cell library, UHD memory compiler, and UHD standard I/O library. Mentor Graphics’ UHD cool-memory IP library comprises coolSRAM-6T, coolREG-6T, coolREG-8T (Dual Port), coolREG-8T (Two Port), and coolROM. This unified library solution can generate different configurations to optimize power, speed, and density, and is available to SMIC customers free of charge.

SMIC’s 0.11um UHD IP solution enables a 31% chip size reduction for a typical SOC design, when compared to a design that uses a traditional IP library. This can bring cost advantages to users making SoCs for mobile storage devices, flash memory controllers, mobile multimedia players, digital televisions, and set-top boxes, among other applications.

"SMIC’s 0.11um Cu-BEoL process has long been recognized by our customers for its high stability. We have an accumulative shipment of more than 100,000 wafers adopting SMIC’s 0.11um IP library on our existing Cu-BEoL platforms," said Steven Chen, Senior Director of SMIC’s Product Marketing Division. "Our Beijing and Shanghai fabs provide customized service based on our customers’ chip size and quantities in order to meet their manufacturing requirements. Now with the release of SMIC’s 0.11um ultra high density IP solution, we can further help our customers lower their manufacturing costs and increase their market competitiveness."

"Mentor Graphics is very pleased to be able to offer its systemic, low-power and high density memory compiler technology to SMIC 0.11um users, to further optimize their design and embedded memory usage for additional density and cost gains," said Farzad Zarrinfar, Managing Director of the Novelics business unit at Mentor Graphics.

Semiconductor Manufacturing International Corporation (SMIC; NYSE:SMI; SEHK:981) is a semiconductor foundry in Mainland China, providing integrated circuit (IC) foundry and technology services at 0.35um to 40nm. Headquartered in Shanghai, China, SMIC has a 300mm wafer fabrication facility (fab) and three 200mm wafer fabs in its Shanghai mega-fab, two 300mm wafer fabs in its Beijing mega-fab, a 200mm wafer fab in Tianjin, and a 200mm fab under construction in Shenzhen. SMIC also has customer service and marketing offices in the U.S., Europe, Japan, and Taiwan, and a representative office in Hong Kong. In addition, SMIC manages and operates a 300mm wafer fab in Wuhan owned by Wuhan Xinxin Semiconductor Manufacturing Corporation. For more information, please visit http://www.smics.com/

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March 6, 2012 — DfR Solutions, quality, reliability, and durability (QRD) services provider for the electronics industry, installed micro bond and die testing tools from XYZTEC at its College Park, MD headquarters. The Condor Series tools will perform JEDEC JESD22 qualification, dynamic bend testing of small structures, copper wire bond pull and shear testing, and material characterization of lead-free solders.

DfR Solutions selected XYZTECH for package testing after an extensive survey of existing micro testing technologies. The Condor bond testers (systems pictured above and at bottom) perform high-speed shear testing and micro cyclic bend testing. The series offers a range of tools and loadings for precise characterization. A tester can evaluate pull strength on fine-pitch bond wires in multi-stack architectures and high-power die shear strength without changing equipment.

XYZTEC is looking to future expansions at DfR Solutions’ European and Asian facilities to grow the equipment partnership, said Bas van Tilborg, managing director of XYZTEC.

DfR Solutions provides quality, reliability, and durability (QRD) research and consulting for the electronics industry. For more information regarding DfR Solutions, visit www.dfrsolutions.com.

XYZTEC designs and manufactures quality assurance equipment for multiple industries, with a focus on bond testing. For more information about XYZTEC Inc., visit www.XYZTEC.com.

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March 2, 2012 — Test equipment supplier Multitest launched a new Quad Tech contactor, the Triton contactor, for high-end digital test applications such as server, computer, mobile smartphone, digital TV, and graphics chips.

The Triton contactor is designed for these large-array, highly integrated semiconductor packages with high I/O count and many high-speed differential I/Os. It eliminates contactor bowing, limited compliance and test handler force limitations by offering an enhanced compliance window to accommodate stack height variations, an optimized force to support large BGAs and LGAs and multisite package test. It uses up to 20GHz differential bandwidth.

The Triton was successfully evaluated at high-volume production. Multitest has received several re-orders for the contactors.

Multitest is a designer and manufacturer of final test handlers, contactors and load boards used by integrated device manufacturers (IDMs) and final test subcontractors. For more information about Multitest’s Triton contactors, visit www.multitest.com/Triton.

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In this 2-part series, Part 1 describes aluminum nitride (AlN) and what it accomplishes as a ceramic substrate for high-brightness light emitting diodes (HB-LEDs).

March 2, 2012 — In Part 2, the furnace considerations are discussed, as well as furnace throughput. It covers the role of the oxide sintering phase in AlN in defining the materials microstructure and thus determining key properties such as thermal conductivity and mechanical strength.

Furnace considerations

An AlN formulation that sinters below 1700°C enables new furnace options versus higher-temp materials. At 1700°C or below, a continuous tunnel kiln can be utilized. This furnace runs in a N2 atmosphere with a small amount of H2 present to protect the heating elements from oxidation. The heat shields are constructed of alumina and the heaters of molybdenum. The substrates are stacked on alumina plates, which are continuously pushed through the furnace at a rate of travel determined by the length of the hot zone and the required time at sintering temperature (about 3-5 hours). The longer the hot zone, the higher the sintering throughput. Since a continuous furnace runs in steady state, no heat up/cool down times are needed, key limitations in batch processing.

Table 4. A comparison of a typical batch furnace for sintering high-temperature AlN with the continuous furnace used to sinter low-temperature AlN.

Comparison Area

High Temperature Batch

Continuous Tunnel Kiln

Shielding

Tungsten or Mo

Alumina

Heating Elements

Tungsten

Molybdenum

Atmosphere

N2/H2

N2/H2

Peak Operating Temperature

1950C

1700C

Furnace Type

Refractory Metal Furnace for high temperature specialized processing of metals or ceramics

Conventional HTCC firing furnace

 

Furnace throughput comparison

The goal of this analysis is to compare the throughput of a batch furnace and continuous furnace with approximately the same capital equipment cost.

Key assumptions:

  • Both furnaces have a capital cost of approximately $500,000
  • Batch furnace hot zone dimensions: 8” x 8” x 20”
  • For batch firing, assume that 80% of the hot zone is usable for the high temperature firing process. This would be typical. The very top and bottom of the hot zone are too hot/cold to obtain the optimum microstructure/density.
  • Continuous furnace opening dimensions of 8” x 8”
  • Continuous furnace hot zone length of 36” with adjacent zones heated to achieve a uniform hot zone temperature
  • Fired substrates 4.5” x 4.5” x 20 mils
  • Kiln furniture the same for both furnaces
  • Stack of 5 substrates separated by coarse powder on top of a setter forms the basic stacking unit
  • Batch furnace has a loader arrangement so that stacking time is not included in the total  cycle time.

 

Figure 6. A commercial HTCC furnace (Model 4612-3Z Automated).

 

Using these assumptions, the throughput in fired substrates per hour is:

  • 225 substrates per hour for the continuous furnace
  • 22 substrates per hour for the batch furnace (432 substrates per batch, 20 hours per run)
  • Continuous furnace throughput for the same capital expense is 10x higher. The same type of relative throughput enhancement will be achieved for flat firing.

Conclusion

In Part 1, the 5 major cost factors for AlN substrates (compared to Al2O3) were discussed: (1) higher cost powder; (2) separate BBO cycle; (3) batch sintering cycle; (4) batch flat fire cycle and (5) non-aqueous processing. By adopting a low-temperature sintering configuration, cost factors 4 and 5 are addressed, bringing the sintering and flat-firing operations in line with the process for alumina.

This process will only be appropriate for applications where a thermal conductivity of 130W/m-K is acceptable, which includes most HBLED, RF, and power semiconductor devices. The same advantages of AlN as a substrate material in HB-LED applications are also key in discrete power semiconductor packaging and in packaging for highly concentrated photovoltaics (HCPV) applications.  For laser diode telecommunications applications, 130W/m-K will most likely be too low and conventional higher-cost AlN will continue to be utilized.

The availability of a low temperature, continuous sintering process also provides strong motivation for the next phase of cost reduction for AlN, utilization of lower-cost/lower-performance AlN powder. Again, with a focus on HB-LED and power semiconductor applications, sensitivity to impurities such as iron (Fe) and silicon (Si), which drive up AlN powder costs, may not be anywhere as stringent as applications such as RF and microwave (where dielectric properties at high frequencies are important). The combination of lower cost powder and a continuous sintering process would move AlN substrate pricing much more in line with alumina.

The major limiting factor for widespread utilization of AlN ceramics in these applications — the cost barrier compared to alumina — is addressed by this new sintering technology. It takes into account the role of the oxide sintering phase in AlN in defining the materials microstructure, and thus determining key properties such as thermal conductivity and mechanical strength. With the exception of a lower thermal conductivity, the properties of traditional high-cost materials and the HB-LED-grade AlN are very similar.

Read the series from the start with Part 1 on HB-LED-grade AlN vs other materials here.

Jonathan Harris, PhD is president of CMC Laboratories Inc., www.cmclaboratories.com.

References:

[1] J.H. Harris, R.A. Youngman and R.G. Teller, J. Mater. Res. 5, 1763 (1990)

[2] J. McCauley, and N. Corbin, High Temperature Reactions and Microstructures in the Al2O3-AlN System, Progress in Nitrogen Ceramics, ed. F.L. Rley, Martinus Nijhoff Pub., The Netherlands, 111- 118 © 1983.

February 27, 2012 — Elpida Memory Inc. (Tokyo: 6665) resolved to file a petition for the commencement of corporate reorganization proceedings at today’s meeting of the board of directors, and filed the same with the Tokyo District Court. Elpida’s consolidated subsidiary, Akita Elpida Memory Inc., also saw the commencement of corporate reorganization proceedings, and there is a possibility that claims against the said company may not be collected. Nikkei called the bankruptcy protection filing "the largest corporate failure among Japan’s manufacturers since the end of World War II" (Dow Jones, http://e.nikkei.com/e/fr/tnks/Nni20120227D27JF576.htm).

Tokyo District Court has immediately rendered the temporary restraining order to restrain any repayment, etc., the comprehensive prohibition order to prohibit any execution and the supervision and examination order. Under the court’s supervision and Atsushi Toki, Attorney-at-Law and the Supervisor and Examiner appointed, Elpida will begin to rebuild its business. The company stated, "If we continue the business by ourselves, we will face cash shortage soon. Moreover, we assumed that, if we left this situation and then cash shortage would become reality, the corporate value of our company must significantly fall, there must be no way to be supported by any sponsorship, and the people concerned such as the creditors must suffer more inconvenience. Therefore, we are obliged to decide that we will aim for the restructuring of our business under the proceedings of the Corporate Reorganization Act and filed the petition as of today."

The filing ends "prolonged speculation" about how Elpida was going to raise enough funds to repay large loans due from April. Elpida’s debts amounted to 448.03 billion yen as of March 31, 2011, reports Nikkei. Elpida’s 2011 IC sales were down 39%, dropping it 6 spots in the rankings, according to a recent IC Insights report.

Elpida was established in December 1999 to make dynamic random access memory (DRAM) semiconductor chips in Japan (initial trade name was NEC Hitachi Memory Inc. until 2000), with development operations for DRAM products since April 2000. Elpida expanded into foreign markets and was listed on the Tokyo Stock Exchange in November 2004. It established a joint venture company, Tera Probe, Inc., specialized in wafer probe testing, in 2005. Other businesses of Elpida include Akita Elpida Memory, Inc., a wholly owned subsidiary to take on the back-end process for DRAM and Rexchip Electronics Corporation, a joint venture company for front-end process that was subsequently acquired as a subsidiary.

"Elpida, while strong technically, has suffered because of the 2011 DRAM price collapse and Japan’s strong yen," report Jim Handy and Lane Mason of Objective Analysis.

Elpida has a wafer fab in Hiroshima, Japan and one (the Rexchip fab) in Taiwan; both are 300mm and each have 100,000 wafers per month (WPM) capacity. "Elpida could sell off some of its assets, potentially the Hiroshima fab, to pay off creditors and even sell some additional 300mm fab equipment," theorized Sterne Agee’s Vijay Rakesh and Mark Kelley.

Elpida cites sluggish DRAM growth in personal computers, as well as an increase of the capacity of DRAM per unit, for its overcapacity after 2006-2007 capital expenditures on wafer fabs and equipment. "At the beginning of 2007, the price of DRAM started falling sharply and, combined by a significant decrease of demand for the products due to the global economic downturn begun in the fall 2008, such price further declined. In the fiscal year ended March 2009, we were forced to experience a significant deterioration in business results compared with the previous year," Elpida’s statement reads. Objective Analysis does not expect a supply/demand balance in the overall DRAM marketplace until 2013, or possibly later if NAND gains share in PCs.

DRAM chip prices may rise in the near term after Elpida filed for bankruptcy protection, Taiwanese memory chip vendors said. The remaining players in the DRAM market will benefit from reduced supply with a boost in pricing and revenue in H2 2012, according to the IHS iSuppli Memory & Storage Service. IHS conservatively estimates that 2012 DRAM revenue will exceed $30 billion, compared to the previous forecast of $24 billion.

Figure. If more than 25% of Elpida’s manufacturing capacity is taken offline, the global average selling price (ASP) for all DRAM shipments is projected to rise to $1.21 by the end of 2012, up 15.5% from $1.05 at the end of H1. The figure shows global ASP for all DRAM shipments (global DRAM revenue divided by gigabit shipments). SOURCE: IHS iSuppli Research.

Related stories: SMIC, Elpida settle 200mm wafer claims and Elpida shifting output to Taiwan, blames yen and ASPs

In June 2009, Elpida received an approval on the business restructuring plan under the Act on Special Measures Concerning Revitalization of Industry and Innovation of Industrial Activity from the Ministry of Economy, Trade and Industry in order to maintain superiority in technology and to increase the productivity. Japan’s trade and industry minister Yukio Edano called the 2009 bailout decision a "sensible one," but noted that this time "things are different," Nikkei reports, http://e.nikkei.com/e/ac/tnks/Nni20120227D27JF580.htm. Today, circumstances are worse for Elpida with a strong yen against the US dollar and the steep fall of the price of DRAM products with fierce competition in the DRAM industry. DRAM demand also stagnated due to the great flood in Thailand in 2011.

Given that Elpida has already established itself as a major DRAM suppler for smartphones and tablets, if the Japanese vendor exits the market, only Samsung Electronics Co. (KSE:005930) and Hynix Semiconductor Inc. (KSE:000660) will remain in the mobile DRAM market, resulting in a DRAM oligopoly, hypothesized TrendForce in a new report.

Akita Elpida was established in July 2006 as a wholly owned subsidiary of Elpida, taking over the semiconductor backend process businesses from Akita Electronics Systems Co. Ltd. and Akita Semiconductor Co. Ltd., a subsidiary of Akita Electronics, both of which were Hitachi Ltd. group companies. Akita Elpida has so far collected its claims for accounts receivable of approximately 700 million yen from Elpida monthly. However, now that facing the situations that Elpida is set to rebuild and the collection of the accounts receivable has become difficult, and as a result of which the prospect of its future financing has become uncertain, Akita Elpida has decided to rebuild its business pursuant to the procedures under the Corporate Reorganization Act. The total amount of liabilities (Balance sheet as of March 31, 2011) is 7,961 million yen.

Powerchip is a DRAM foundry for Elpida in Taiwan, and Elpida’s bankruptcy could mean further ripple effects, warned Sterne Agee’s analysts. Elpida’s bankruptcy could further cut 2012-13 DRAM equipment capex and the capex of OEM-foundry partners.

Of the remaining DRAM manufacturers, Micron is the only one that is likely to take over other companies’ DRAM businesses, asserts Objective Analysis, noting that Hynix and Samsung build all their own capacity. Taiwan’s DRAM players are in a position similar to Elpida’s, and more consolidation or similar drastic actions could occur soon in Taiwan’s biggest three DRAM makers: Nanya, Powerchip, and ProMOS.

Learn more at Elpida Memory’s news page, http://www.elpida.com/en/news/index.html.

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March 2, 2012 — Chemicals supplier WACKER expanded and relocated its South Korea technical laboratories and offices, bringing together R&D operations, applications technology, and basic and advanced training in silicones and polymers applications.

The 3,600 m

March 1, 2012 – Marketwire — Docea Power, power and thermal analysis software supplier, released AceThermalModeler (ATM) for generating compact thermal models of system on chips (SoCs), 3D ICs, systems in package (SiP) devices, and complete boards.

Compact thermal models enable early system floorplan exploration or partitioning, new system packaging and integration architectures, and early exploration of power management policies to reduce peak temperatures and manage temperature gradients across the system.

The ATM tool can be used by thermal experts to create RC compact thermal models quickly, then handed off to the system architecture team to estimate various corner use cases, floorplans, architecture options for multi-core designs, operating points or power management policies impact on temperature across the system.

Enabling early dynamic or steady state estimations of thermal distributions for the most power hungry use cases allows system architects to optimize systems and architectures and avoid loss of revenue due to thermal issues found late in the project.

Docea Power’s Aceplorer simulator considers the relationship between power and temperature. The next tool in the flow is ATM, to perform both thermal steady state or coupled power and thermal analysis for dynamic application profiles running on different architecture configurations.

ATM will be demonstrated at the Design, Automation & Test (DATE) conference in Dresden, Germany, March 12 to 16, 2012.

Docea Power develops and commercializes power and thermal modeling tools for system-level architectues. Learn more at www.doceapower.com.

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