Category Archives: Materials and Equipment

Researchers at the University of Melbourne are the first in the world to image how electrons move in two-dimensional graphene, a boost to the development of next-generation electronics.

Capable of imaging the behaviour of moving electrons in structures only one atom in thickness, the new technique overcomes significant limitations with existing methods for understanding electric currents in devices based on ultra-thin materials.

“Next-generation electronic devices based on ultra-thin materials, including quantum computers, will be especially vulnerable to contain minute cracks and defects that disrupt current flow,” said Professor Lloyd Hollenberg, Deputy Director of the Centre for Quantum Computation and Communication Technology (CQC2T) and Thomas Baker Chair at the University of Melbourne.

A team led by Hollenberg used a special quantum probe based on an atomic-sized ‘colour centre’ found only in diamonds to image the flow of electric currents in graphene. The technique could be used to understand electron behaviour in a variety of new technologies.

“The ability to see how electric currents are affected by these imperfections will allow researchers to improve the reliability and performance of existing and emerging technologies. We are very excited by this result, which enables us to reveal the microscopic behaviour of current in quantum computing devices, graphene and other 2D materials,” he said.

“Researchers at CQC2T have made great progress in atomic-scale fabrication of nanoelectronics in silicon for quantum computers. Like graphene sheets, these nanoelectronic structures are essentially one atom thick. The success of our new sensing technique means we have the potential to observe how electrons move in such structures and aid our future understanding of how quantum computers will operate.”

In addition to understanding nanoelectronics that control quantum computers, the technique could be used with 2D materials to develop next generation electronics, energy storage (batteries), flexible displays and bio-chemical sensors.

“Our technique is powerful yet relatively simple to implement, which means it could be adopted by researchers and engineers from a wide range of disciplines,” said lead author Dr Jean-Philippe Tetienne from CQC2T at the University of Melbourne.

“Using the magnetic field of moving electrons is an old idea in physics, but this is a novel implementation at the microscale with 21st Century applications.”

The work was a collaboration between diamond-based quantum sensing and graphene researchers. Their complementary expertise was crucial to overcoming technical issues with combining diamond and graphene.

“No one has been able to see what is happening with electric currents in graphene before,” said Nikolai Dontschuk, a graphene researcher at the University of Melbourne School of Physics.

“Building a device that combined graphene with the extremely sensitive nitrogen vacancy colour centre in diamond was challenging, but an important advantage of our approach is that it’s non-invasive and robust – we don’t disrupt the current by sensing it in this way,” he said.

Tetienne explained how the team was able to use diamond to successfully image the current.

“Our method is to shine a green laser on the diamond, and see red light arising from the colour centre’s response to an electron’s magnetic field,” he said.

“By analysing the intensity of the red light, we determine the magnetic field created by the electric current and are able to image it, and literally see the effect of material imperfections.”

Chroma ATE Inc., a supplier of precision Test and Measurement Instrumentation, Automated Test Systems, Intelligent Manufacturing Systems, Turnkey Test and Automation Solutions, has recently released the newest semiconductor test solution for the IoT IC market.

The Chroma 3680 is an advanced SoC test system with data rate up to 1Gbps. The Chroma 3680 is capable of conducting parallel tests on multiple chips to meet the digital and analog IC testing requirements, with applications including MCU, digital audio, digital TV, set-top box, DSP, network processor, field programmable gate array (FPGA) and consumer electronics.

Newly developed this year, the Chroma 33010 PXIe Digital IO Card provides automatic test functions based on PXIe architecture to excel in the heavy demands of PXI testing. To satisfy smaller IC channels and increasingly complex test functions especially on IoT and automotive electronics IC, the PXI/PXIe architecture in semiconductor testing offers unparalleled advantage in diversity and flexibility, which includes MCU, MEMS, RF IC and PMIC testing. It can also be ported to Chroma 3380D (256 channels) and Chroma 3380P (512 channels) for mass-production as they have high similarity in both software and hardware.

The Chroma 3260 Tri-Temperature SLT Handler is equipped DTC (Dynamic Temperature Control) function by leading Nitro TEC technology, which can support more excellent temperature performance range from -40°C to 125°C with +/- 1°C accuracy. It is suitable for parallel tests on multiple module boards, and the test sockets embedded can accommodate various types of package (QFP, TQFP, μBGA, PGA and CSP). The Chroma 3260 (Tri-Temp.) can change kit quickly as changing different DUT (Device Under Test) to significantly reduce the downtime and improve efficiency. Applications include the IC components for IoV (Internet of Vehicle) and the cloud-computing industry.

The Chroma 3111 Table Top Single Site Handler is designed for system function testing especially during engineering experimental phase. It has electrical terminal test capability to support various packaged wafers sizes, ranging from 5x5mm to 45x45mm.The Chroma 3111 will be the best choice to effectively minimize time and cost during engineering test due to its tiny size (60cm2 space) feature.

The Chroma semiconductor test equipment integrated with the MP5800 RF ATE tester can cover 6GHz test range and provide 4/8 RF port with 120MHz bandwidth. Its applications include WiFi , BT, GPS, other IoT connectivity ICs and RF components (PA / LNA / Converter, etc.) to satisfy the requirements of a total RF/Digital ATE (CP/FT/SLT) test solution.

Chroma’s semiconductor test solution also provides a variety of software suites for different testing applications.

North America-based manufacturers of semiconductor equipment posted $2.03 billion in billings worldwide in March 2017 (three-month average basis), according to the March Equipment Market Data Subscription (EMDS) Billings Report published today by SEMI.

SEMI reports that the three-month average of worldwide billings of North American equipment manufacturers in March 2017 was $2.03 billion. The billings figure is 2.6 percent higher than the final February 2017 level of $1.97 billion, and is 69.2 percent higher than the March 2016 billings level of $1.20 billion.

“March billings reached robust levels not seen since March 2001,” said Dan Tracy, senior director, Industry Research and Statistics, SEMI. “The equipment industry is clearly benefiting from the latest semiconductor investment cycle.”

The SEMI Billings report uses three-month moving averages of worldwide billings for North American-based semiconductor equipment manufacturers. Billings figures are in millions of U.S. dollars.

Billings
(3-mo. avg)

Year-Over-Year
 October 2016

$1,630.4

20.0%
 November 2016

$1,613.3

25.2%
 December 2016

$1,869.8

38.5%
 January 2017

$1,859.4

52.3%
 February 2017 (final)

$1,974.0

63.9%
 March 2017 (prelim)

$2,026.2

69.2%

Source: SEMI (www.semi.org), April 2017

SEMI ceased publishing the monthly North America Book-to-Bill report in January 2017. SEMI will continue publish a monthly North American Billings report and issue the Worldwide Semiconductor Equipment Market Statistics (WWSEMS) report in collaboration with the Semiconductor Equipment Association of Japan (SEAJ). The WWSEMS report currently reports billings by 24 equipment segments and by seven end market regions.

According to the latest market study released by Technavio, the electrostatic discharge (ESD) packaging market is projected to grow to USD 5.42 billion by 2021, at a CAGR of more than 8% over the forecast period.

Global_ESD_Packaging_Market

This research report titled ‘ESD Packaging Market 2017-2021’ provides an in-depth analysis of the market in terms of revenue and emerging market trends. This market research report also includes up to date analysis and forecasts for various market segments and all geographical regions.

Communication network infrastructure

“The communication network infrastructure end-user segment occupies a significant 26% of the global ESD packaging market. The high rate of deployment of next-generation wireless networks such as Wi-Fi, WiMAX, 3G/4G, and ultra-wideband is responsible for the dominance of the market segment,” says Sharan Raj, a lead analyst at Technavio for packaging research.

The growth in the wireless network infrastructure market drives the demand for printed circuit boards (PCBs), which require ESD protection. Also, the increase in virtualization and cloud computing have resulted in increased Internet traffic worldwide, which is also indirectly boosting the market growth.

Consumer electronics industry

The consumer electronics segment includes smartphones, PCs, audio systems, video systems, and TVs, all of which incorporate sophisticated and high-performance printed circuit boards (PCBs) and semiconductors for efficient working. These electronic devices, combined with the rapid adoption of 3G and 4G networks, are driving the growth of ESD packaging in the market segment. Currently, APAC is showcasing an impressive growth curve in the market segment, driven by an extremely high mobile phone subscription rate.

Computer peripherals

“The computer peripherals segment is expected to reach a value of around USD 1,141 million by 2021. This segment includes products such as a mouse, keyboards, printers, hard drives, flash drives, scanners, webcams, and digital cameras which require ESD protection,” says Sharan.

This end-user segment is expected to be driven by the increased demand for tablets, notebooks, ultrabooks, and digital cameras. Further, the introduction of Windows 10 and lightweight ultrabooks will add a boost to the growth of the market segment.

The top vendors highlighted by Technavio’s research analysts in this report are:

  • BASF
  • Desco Industries
  • Dow Chemical
  • PPG Industries

Technavio is a global technology research and advisory company.

NXP Semiconductors N.V. (NASDAQ:NXPI) today announced a new laterally diffused metal oxide semiconductor (LDMOS) technology for RF power transistors designed for operation up to 65 volts (V). This extra-high voltage LDMOS process will give rise to a new generation of products: the MRFX series.

As RF becomes more pervasive in various industrial applications, NXP is providing RF power engineers with a means to reduce design cycle time:

  • More power – Higher voltage enables higher output power, which helps decrease the number of transistors to combine, simplifying power amplifiers complexity and reducing their size.
  • Faster development time – With higher voltage, the output power can be increased while retaining a reasonable output impedance. This simplifies the matching to 50 ohms, especially in wideband applications. Faster matching dramatically speeds up the development time.
  • Design reuse – This impedance benefit also ensures pin-to-pin compatibility with current 50 V LDMOS transistors, making it possible for RF designers to reuse existing printed circuit board (PCB) designs for even shorter time to market.
  • Manageable current level – A higher voltage lowers the current in the system, limiting the stresses on DC power supplies and reducing magnetic radiation.
  • Wide safety margin – The NXP 65 V LDMOS technology has a breakdown voltage of 182 V, which improves reliability and enables higher efficiency architectures.

The first product in the MRFX series is the MRFX1K80, the industry’s most powerful continuous wave (CW) RF transistor. It is designed to deliver 1800 watts (W) CW at 65 V for applications from 1 to 470 megahertz (MHz) and is capable of handling 65:1 voltage standing wave ratio (VSWR).

“The drop-in compatibility between our 1250, 1500 and our new 1800 W transistors enables our customers to create a single scalable platform for multiple end products,” said Pierre Piel, senior director and general manager for multi-market RF power at NXP. “With this new generation, we help our customers deliver on their commitment of higher performing, more rugged products in a shorter amount of time.”

The MRFX1K80 is targeted for industrial, scientific and medical (ISM) applications such as laser generation, plasma etching, magnetic-resonance imaging (MRI), skin treatment and diathermy, as well as particle accelerators and other scientific applications. The MRFX1K80 is also designed for radio and very high frequency (VHF) TV broadcast transmitters. Industrial heating, welding, curing or drying machines currently using vacuum tubes will also benefit from the higher level of control that solid state enables.

2016 was the year of strong consolidations in the semiconductor industry. Yole Développement (Yole) highlights many mergers and acquisitions with several billions of dollars transactions.

“And 2017 seems to be following the same path,” said Jérôme Azemar, Technology & Market Analyst, Advanced Packaging at Yole.

Year after year, the advanced packaging industry has attracted more and more of the spotlight.

ic market forecast

“According to our estimates, advanced packaging revenues represented more than US$22 billion in 2016 and will increase to almost US$30 billion by 2020”, confirmed Jérôme Azemar from Yole.

What is the status of the advanced packaging industry? Who is leading the market today? What are the platforms that will drive the tomorrow’s industry? What could we expect in term of technology evolution? NCAP China and Yole propose you a 2-day conference to answer these questions and get the opportunity to meet the advanced packaging leaders. They announced today the 3rd Advanced Packaging & System Integration Technology Symposium. The 2017 edition takes place in Wuxi, China, on April 20 & 21.
   • Click program & registration to discover schedule, list of speakers, abstracts, and much more.
• The 2017 symposium is sponsored by BESI, Plasma-Therm, SPTS Technologies, UnitySC and Simco-Ion
   • This year again, ASTRI is a partner of the Advanced Packaging & System Integration Technology Symposium.

Created in 2014, the Advanced Packaging & System Integration Technology Symposium is attracting more and more attendees each year. The powerful program designed by Yole and NCAP China gathers numerous valuable discussions, meetings and business collaborations.

 This year again, both partners are excited to welcome the leaders of the advanced packaging industry and are expecting a great success. They have announced an impressive list of executive speakers including:
   • Tetsukazu Sugiya, Group Leader, Technology Solutions Group at DISCO Corp.
   • Lianming Tong, Lead Marketing Manager at Dow Electronics Materials
   • Kenji Kawada, Staff Engineer at Infineon Technologies Japan
   • Daquan Yu, CTO & VP, Kunshan Huatian Technology Electronics
   • Howard Huang, Director, Kingyoup Optronics
   • Tae-Hoon Kim, Ex. President, nepes Corporate
   • Dr David Lishan, Principal Scientist at Plasma-Therm
   • Richard Barnett, Etch Product Manager, SPTS, an Orbotech Company …

And much more. List of speakers, biographies and abstracts are available on i-micronews.com website. To download the PDF version, click Program. 2017 edition also includes two keynote speakers from Huawei and Brewer Science.

Partnership between both organizations, NCAP China and Yole has been signed 3 year ago and all benefits of this collaboration are serving the development of the advanced packaging industry in China and all around the world. Based on a strategic thinking, NCAP China and Yole combined their expertise and their brand to support the development of this dynamic industry. Both organizations became indispensable players. And as strong influencer, the NCAP China and Yole Symposium is today the relevant indicator of the status of advanced packaging industry.

“We are very pleased to have the opportunity this year again to host the “Advanced Packaging & System Integration Technology Symposium,” saidDr Cao LiQiang, NCAP’s CEO. And he adds: “Mixing together worldwide companies and laboratories, all experts in the advanced packaging arena is just key for the development of the industrial activities in China. It is a relevant contribution to shape the future of the advanced packaging ecosystem. Under this context, we are looking forward to welcome advanced packaging leaders and get powerful presentations and debates during the Symposium.”

Advanced packaging revenue in China is expected to reach US$4.6 billion in 2020 at an impressive 16% CAGR .

“Indeed we are experiencing a key momentum in the semiconductor industry,” announced Thibault Buisson, Business Unit Manager, Advanced Packaging & Semiconductor Manufacturing at Yole. “Lot of technical challenges are now being transferred from the chip to the package itself. This is why industrial companies from different business models are willing to get involved in the exciting advanced packaging field. Under a highly competitive landscape, innovative platforms such as FO packages, 3D & 2.5D interposers and SiP are getting more and more interest from the end users and therefore are changing the packaging ecosystem. NCAP China & Yole Symposium is the place to get a clear understanding of the status of this industry and get answers to future market evolutions, the industry will face tomorrow.”

The symposium represents an exciting opportunity for advanced packaging companies to develop, exchange and expand their activities in China and also in all other countries. NCAP and Yole are very enthusiastic about this 3rd edition. Make sure you will attend the Symposium and book your place right now on i-micronews website or click: Registration. To see the full schedule, please click here: Program.

IEEE, the world’s largest technical professional organization dedicated to advancing technology for humanity, this week announced the next milestone phase in the development of the International Roadmap for Devices and Systems (IRDS)—an IEEE Standards Association (IEEE-SA) Industry Connections (IC) Program sponsored by the IEEE Rebooting Computing (IEEE RC) Initiative—with the launch of a series of nine white papers that reinforce the initiative’s core mission and vision for the future of the computing industry. The white papers also identify industry challenges and solutions that guide and support future roadmaps created by IRDS.

IEEE is taking a lead role in building a comprehensive, end-to-end view of the computing ecosystem, including devices, components, systems, architecture, and software. In May 2016, IEEE announced the formation of the IRDS under the sponsorship of IEEE RC. The historical integration of IEEE RC and the International Technology Roadmap for Semiconductors (ITRS) 2.0 addresses mapping the ecosystem of the new reborn electronics industry. The new beginning of the evolved roadmap—with the migration from ITRS to IRDS—is proceeding seamlessly as all the reports produced by the ITRS 2.0 represent the starting point of IRDS.

While engaging other segments of IEEE in complementary activities to assure alignment and consensus across a range of stakeholders, the IRDS team is developing a 15-year roadmap with a vision to identify key trends related to devices, systems, and other related technologies.

“Representing the foundational development stage in IRDS is the publishing of nine white papers that outline the vital and technical components required to create a roadmap,” said Paolo A. Gargini, IEEE Fellow and Chairman of IRDS. “As a team, we are laying the foundation to identify challenges and recommendations on possible solutions to the industry’s current limitations defined by Moore’s Law. With the launch of the nine white papers on our new website, the IRDS roadmap sets the path for the industry benefiting from all fresh levels of processing power, energy efficiency, and technologies yet to be discovered.”

“The IRDS has taken a significant step in creating the industry roadmap by publishing nine technical white papers,” said IEEE Fellow Elie Track, 2011-2014 President, IEEE Council on Superconductivity; Co-chair, IEEE RC; and CEO of nVizix. “Through the public availability of these white papers, we’re inviting computing professionals to participate in creating an innovative ecosystem that will set a new direction for the greater good of the industry. Today, I open an invitation to get involved with IEEE RC and the IRDS.”

The series of white papers delivers the starting framework of the IRDS roadmap—and through the sponsorship of IEEE RC—will inform the various roadmap teams in the broader task of mapping the devices’ and systems’ ecosystem:

“IEEE is the perfect place to foster the IRDS roadmap and fulfill what the computing industry has been searching for over the past decades,” said IEEE Fellow Thomas M. Conte, 2015 President, IEEE Computer Society; Co-chair, IEEE RC; and Professor, Schools of Computer Science, and Electrical and Computer Engineering, Georgia Institute of Technology. “In essence, we’re creating a new Moore’s Law. And we have so many next-generation computing solutions that could easily help us reach uncharted performance heights, including cryogenic computing, reversible computing, quantum computing, neuromorphic computing, superconducting computing, and others. And that’s why the IEEE RC Initiative exists: creating and maintaining a forum for the experts who will usher the industry beyond the Moore’s Law we know today.”

The IRDS leadership team hosted a winter workshop and kick-off meeting at the Georgia Institute of Technology on 1-2 December 2016. Key discoveries from the workshop included the international focus teams’ plans and focus topics for the 2017 roadmap, top-level needs and challenges, and linkages among the teams. Additionally, the IRDS leadership invited presentations from the European and Japanese roadmap initiatives. This resulted in the 2017 IRDS global membership expanding to include team members from the “NanoElectronics Roadmap for Europe: Identification and Dissemination” (NEREID) sponsored by the European Semiconductor Industry Association (ESIA), and the “Systems and Design Roadmap of Japan” (SDRJ) sponsored by the Japan Society of Applied Physics (JSAP).

The IRDS team and its supporters will convene 1-3 April 2017 in Monterey, California, for the Spring IRDS Workshop, which is part of the 2017 IEEE International Reliability Physics Symposium (IRPS). The team will meet again for the Fall IRDS Conference—in partnership with the 2017 IEEE International Conference on Rebooting Computing (ICRC)—scheduled for 6-7 November 2017 in Washington, D.C. More information on both events can be found here: http://irds.ieee.org/events.

IEEE RC is a program of IEEE Future Directions, designed to develop and share educational tools, events, and content for emerging technologies.

IEEE-SA’s IC Program helps incubate new standards and related products and services, by facilitating collaboration among organizations and individuals as they hone and refine their thinking on rapidly changing technologies.

IC Insights has raised its worldwide IC market growth forecast for 2017 to 11%—more than twice its original 5% outlook—based on data shown in the March Update to the 20th anniversary 2017 edition of The McClean Report. The revision was necessary due to a substantial upgrade to the 2017 growth rates forecast for the DRAM and NAND flash memory markets.

IC Insights currently expects DRAM sales to grow 39% and NAND flash sales to increase 25% this year, with upside potential from those forecasts.  DRAM market growth is expected to be driven almost entirely by a huge 37% increase in the DRAM average selling price (ASP), as compared to 2016, when the DRAM ASP dropped by 12%. Moreover, NAND flash ASPs are forecast to rebound and jump 22% this year after falling by 1% last year.

The DRAM market started 2017 the way it ended 2016—with strong gains in DRAM ASP.  In April 2016, the DRAM ASP was $2.41 but rapidly increased to $3.60 in January 2017, a 49% jump.  A pickup in DRAM demand from PC suppliers during the second half of 2016 caused a significant spike in the ASP of PC DRAM.  Currently, strengthening ASPs are also evident in the mobile DRAM market segment.

With total DRAM bit volume demand expected to increase by 30% this year and DRAM bit volume production capacity forecast to increase by 20%, IC Insights believes that quarterly DRAM ASPs could still surprise on the upside in 2017. Furthermore, DRAM output is also being slowed, at least temporarily, by the ongoing transition of DRAM production to ≤20nm feature sizes by the major DRAM producers this year.

At $57.3 billion, the DRAM market is forecast to be by far the largest IC product category in 2017, exceeding the expected MPU market for standard PCs and servers ($47.1 billion) by $10.2 billion this year.  Figure 1 shows that the DRAM market has been both a significant tailwind (i.e., positive influence) and headwind (i.e., negative influence) on total worldwide IC market growth in three out of the past four years.

Figure 1

Figure 1

Spurred by a 12% decline in the DRAM ASP in 2016, the DRAM market slumped 8% last year.  The DRAM segment became a headwind to worldwide IC market growth in 2016 instead of the tailwind it had been in 2013 and 2014. As shown, the DRAM market shaved two percentage points off of total IC industry growth last year.  In contrast, the DRAM segment is forecast to have a positive impact of four percentage points on total IC market growth this year. It is interesting to note that the total IC market growth rate forecast for 2017, when excluding the DRAM and NAND flash markets, would be only 4%, about one-third of the current worldwide IC market growth rate forecast including these memory devices.

The March Update to the 2017 edition of The McClean Report further describes IC Insights’ IC market forecast revision, updates its 2017-2021 semiconductor capital spending forecast, and shows the final 2016 top 10 OSAT company ranking.

Synopsys, Inc. (Nasdaq:  SNPS) today announced that its IC Validator physical verification product has been successfully used for signoff on more than 100 tapeouts at advanced FinFET nodes. These tapeouts were completed with process technologies from multiple foundries at 16nm, 14nm, 10nm and 7nm. IC Validator’s massively parallel scalability to more than 200 CPUs has proven a critical factor in its ability to deliver overnight run times for today’s highly complex technology rules and very large designs. Synopsys has cooperated closely with foundries for several years to ensure the uncompromising accuracy of IC Validator’s results. This dependable accuracy has been key to IC Validator’s growing list of successful adoptions by industry leaders in many markets ranging from top CPU and GPU design companies in the US to leading fabless SoC designers in Taiwan and Japan.

IC Validator, part of the Synopsys Galaxy Design Platform, is a comprehensive and highly scalable physical verification tool suite including DRC, LVS, programmable electrical rule checks (ERC), dummy fill and DFM enhancement. IC Validator is configured to meet the challenges of today’s extremely large designs by enabling 8 CPUs with a single license. It uses both multi-threading and distributed processing over multiple machines to provide scalability benefits that extend to more than 200 CPUs. IC Validator enables coding at higher levels of abstraction and is architected for near-linear scalability that maximizes utilization of mainstream hardware, using smart memory-aware load scheduling and balancing technologies.

IC Validator is a companion product to the IC Compiler II place-and-route system for In-Design physical verification. In-Design is enabled by the intelligent integration of IC Validator and IC Compiler II place-and-route, making it possible for engineers to perform independent signoff-quality analysis earlier, before the design is finalized and while correction can be automated. In-Design technology also enables new high-productivity functionality within the place-and-route environment, including automatic DRC repair, improved quality of timing results with timing-aware metal fill, and rapid ECO validation. In-Design physical verification eliminates expensive iterations with downstream analysis tools and maintains a convergent design flow to physical signoff.

“As manufacturing complexity is placing increased challenges on designers to deliver within schedule, it is extremely important that we continue to collaborate closely with leading foundries to deliver high-performance solutions,” said Bijan Kiani, vice president, product marketing, Design Group at Synopsys. “This milestone confirms our mature ecosystem strategy that has led to strong growth in IC Validator’s market share.”

Ultratech, Inc. (Nasdaq: UTEK), a supplier of lithography, laser­ processing and inspection systems used to manufacture semiconductor devices and high-brightness LEDs (HBLEDs), as well as atomic layer deposition (ALD) systems, today announced that it has received follow-on, multiple system orders from several outsourced semiconductor assembly and test (OSAT) companies in Taiwan, Korea and China. The AP300E lithography stepper will be used for leading-edge copper pillar and wafer-level packaging (WLP) in high-volume manufacturing (HVM). Ultratech plans to begin shipping the systems in Q2 and Q3 of this year.

Ultratech General Manager and Vice President of Lithography Products Rezwan Lateef stated, “OSATs are rapidly expanding their advanced packaging capabilities to capture the strong demand for copper pillar and fan-out package solutions. These customers look to their equipment suppliers to provide highly reliable, flexible, extendible and cost-effective solutions coupled with excellent application-specific knowledge. The AP300E lithography stepper delivers on all these aspects coupled with outstanding regional support. Ultratech believes that success in the OSAT market requires local, on-site support and has greatly expanded its presence (both in personnel and infrastructure) in the Asia Pacific region with a focus on Taiwan, China and Korea. These repeat, multiple system orders across the broad OSAT spectrum are a clear validation of our market leadership position and a strong statement of continued partnership from our customers.  We look forward to working with these valued customers to meet their current production needs and to develop the applications of tomorrow.”

The AP300 family of lithography systems is built on Ultratech’s customizable Unity Platform, delivering superior overlay, resolution and side wall profile performance and enabling highly-automated and cost- effective manufacturing. These systems are particularly well suited for copper pillar, fan-out, through-silicon via (TSV) and silicon interposer applications. In addition, the platform has numerous application-specific product features to enable next-generation packaging techniques, such as Ultratech’s award winning dual-side alignment (DSA) system, utilized around the world in volume production.