Category Archives: Materials and Equipment

Technology forecasts for 22nm
Addressing defectivity will require new surface-engineering processes at 22nm
RoHS, device shrinks will continue to drive packaging technology
Tooling and process technology vital for thin packages
More collaboration is needed to improve process integration
22nm brings maskmakers, end users closer
22nm: The era of wafer bonding
Failure analysis challenges at 22nm drive the need for turn-key failure analysis solutions
A materials evolution and revolution for 22nm devices
Enabling lithography for the 22nm node
Keys to CMP and cleans: Defect reduction and process customization
Gate structure/3D stacking "winners" will determine industry direction

This is an online exclusive essay in SST‘s Forecast for 2011: Back to Reality series.

Nick Pugliano, Marketing Director, Advanced Patterning Technologies, Dow Electronic Materials, Marlborough, MA, USA

Click to EnlargeJanuary 11, 2011 — Though single-exposure patterning schemes are unable to meet 22nm specifications, advanced patterning technologies using ArF immersion allow us to continue shrinking critical dimensions in semiconductor devices. However, the use of ArF immersion at 22nm requires multi-step patterning processes and elaborate pitch-doubling schemes such as litho-etch-litho-etch (LELE) and self-aligned double-patterning (SADP) technologies. Although these technologies are more costly than any single-exposure process, they persist as a standard patterning solution for today’s 22nm device architectures in the absence of viable alternatives.

Yet the 22nm node also represents an inflection point, because additional shrink strategies will require further multiplication of these technologies. For example, quadruple-patterning is needed to extend these techniques beyond 22nm, but a simple multiplication of double-patterning would be costly and extremely difficult to deploy in mass production. The semiconductor industry is keenly aware that a single-exposure solution such as EUV will not be ready for 22nm due to its own set of challenges. Thus, the 22nm node has emerged as a proving ground for various innovative patterning processes geared toward on-track, low cost of ownership technologies.

Many approaches for printing critical contacts are currently under development and expect to see wide adoption at the 22nm node and beyond. Some approaches use shrink processes in new ways, but are not promising when printing the highest density patterns. Others explore tone reversal technologies that capitalize on improvements in aerial image contrast for certain feature types when using a negative, rather than positive, tone mask. Resist freezing via a track-applied, surface-curing solution or a high-temperature thermal curing step continues to be developed with the hope of reducing the number of vacuum-based CVD or etch steps, but these technologies still suffer from pattern fidelity issues and are not yet ready to displace SADP or LELE schemes.

For all immersion patterning processes, top coat use has been mainstream; however, top-coat-free technologies have been proven in foundry and memory applications. These technologies use self stratifying, surface active ingredients that control the properties of a photoresist to enable high scan speed immersion patterning, while simultaneously serving as an immersion barrier layer. On-track technologies utilizing spin-on silicon hard masks will extend as a way of lowering back-end processing costs. Finally, the use of spin-on anti-reflection coatings with precisely tuned optical properties will be important for the most critical layers, as these are needed to work in tandem with the underlying device stack to suppress back-reflected radiation from the large range of off-axis light that is present in high-NA imaging systems.

These approaches highlight the critical role that track applied materials have in enabling next-generation approaches to cost-effective patterning — a trend that is expected to continue as the semiconductor industry attempts to follow its shrink trajectory toward 22nm and beyond.

(January 6, 2011) — Cornell University researchers have unveiled striking, atomic-resolution details of what graphene "quilts" look like at the boundaries between patches, and have uncovered key insights into graphene’s electrical and mechanical properties.

Researchers focused on graphene — a one atom-thick sheet of carbon atoms bonded in a crystal lattice like a honeycomb or chicken wire — because of its electrical properties and potential to improve everything from solar cells to cellphone screens.

 

Click to Enlarge

Figure 1. A false-color microscopy image overlay depicting the shapes and lattice orientations of several grains in graphene. Source: Cornell

But graphene doesn’t grow in perfect sheets. Rather, it develops in pieces that resemble patchwork quilts, where the honeycomb lattice meets up imperfectly. These "patches" meet at grain boundaries, and scientists had wondered whether these boundaries would allow the special properties of a perfect graphene crystal to transfer to the much larger quilt-like structures.

To study the material, the researchers grew graphene membranes on a copper substrate (a method devised by another group) but then conceived a novel way to peel them off as free-standing, atom-thick films.

 

Click to Enlarge

Figure 2. Another graphene sheet with different lattice orientations. Source: Cornell

Then, with diffraction imaging electron microscopy, they imaged the graphene by seeing how electrons bounced off at certain angles, and using a color to represent that angle. By overlaying different colors according to how the electrons bounced, they created an easy, efficient method of imaging the graphene grain boundaries according to their orientation. And as a bonus, their pictures took an artistic turn, reminding the scientists of patchwork quilts. (Published in Nature, Jan. 5, 2010.)

"You don’t want to look at the whole quilt by counting each thread. You want to stand back and see what it looks like on the bed. And so we developed a method that filters out the crystal information in a way that you don’t have to count every atom," said David Muller, professor of applied and engineering physics and co-director of the Kavli Institute at Cornell for Nanoscale Science.

Muller conducted the work with Paul McEuen, professor of physics and director of the Kavli Institute, and Kavli member Jiwoong Park, assistant professor of chemistry and chemical biology.

Further analysis revealed that growing larger grains (bigger patches) didn’t improve the electrical conductivity of the graphene, as was previously thought by materials scientists. Rather, it is impurities that sneak into the sheets that make the electrical properties fluctuate. This insight will lead scientists closer to the best ways to grow and use graphene.

The work was supported by the National Science Foundation through the Cornell Center for Materials Research and the Nanoscale Science and Engineering Initiative. The paper’s other contributors were: Pinshane Huang, Carlos Ruiz-Vargas, Arend van der Zande, William Whitney, Mark Levendorf, Shivank Garg, JonathanAlden and Ye Zhu, all from Cornell; Joshua Kevek, Oregon State University and Caleb Hustedt, Brigham Young University.

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(January 5, 2011) — SmartKem Ltd, developer of novel printable semiconductor materials for flexible electronics, announced that the Welsh Assembly Government has awarded the company £335,000 in funding to further develop its flexible printed electronics solutions.

Based in Denbighshire, Wales, SmartKem is a high-technology enterprise delivering and generating a novel range of organic semiconductor molecules and ink formulations compatible with printed electronic processes. This is an inexpensive, low weight, low energy, alternative to silicon semiconductors and can be used to print organic circuits and devices onto thin flexible substrates such as plastics and paper.

Initial Venture Capital funding from Finance Wales allowed SmartKem to relocate to the world class OpTIC Technium facility in North Wales and accelerate its growth in the flexible printed electronics industry.

SmartKem has now received further recognition as an innovative company and has been awarded a grant of £335,000 from the Welsh Assembly Government. The grant will help advance the company’s vision to deliver world-leading printable semiconductor technology to the microelectronics industry for applications such as electronic displays, thin-film RFID, smart sensors and printed logic circuits. 

The Welsh Assembly Government is committed to encouraging businesses to invest in R&D to stimulate innovation, which is a key driver of productivity and economic growth. Ieuan Wyn Jones, Minister for the Economy and Transport, said the Assembly Government’s strategy, "Economic Renewal: a new direction," focused support on businesses like SmartKem working in key sectors with high growth potential.

"We are extremely keen to increase the amount of innovation and R&D carried out in Wales, particularly in our key sectors, and pleased to hear how our support is helping SmartKem. It is also welcome news to hear that SmartKem was singled out for a gold award in the Venturefest 2010 Best of British Innovation Award, which recognized the company as one of the year’s most exciting technology businesses."

Steve Kelly, CEO SmartKem, comments: "We are delighted to be awarded with this grant and extremely pleased that the Welsh Assembly Government has decided to support SmartKem at such an exciting time. This is a huge boost for the company and allows us to continue our breakthrough research and development projects and further penetrate the rapidly growing printed electronics industry."

SmartKem is focusing on high-performance/high-value organic semiconductor materials that can be printed to form electronic circuits onto lightweight, rugged and low-cost polymer films. For more information on SmartKem, visit www.smartkem.com.

(January 4, 2011 – BUSINESS WIRE) — Nautic Partners LLC, a private equity firm with more than $2.5 billion of capital under management, has partnered with management to acquire Aavid Thermalloy LLC (Aavid). Aavid designs and manufactures high-performance thermal management products used in a wide range of electronics systems and energy supplies.

Aavid is headquartered in Concord, New Hampshire, and has global manufacturing facilities across China, North America, Europe, and India. Aavid’s products are used to dissipate heat and maintain optimal temperatures of high-performance electronic components used in servers, telecommunications equipment (base station controllers and devices that amplify signals at cell sites), alternative energy equipment (wind and solar power inverters), and industrial and medical electronics.

"Aavid is a market leader known for its high quality, engineered thermal management solutions," said Doug Hill, managing director of Nautic. "We believe there are considerable opportunities for growth, both within our existing customer base, geographies, and industry verticals, as well as through penetration of new end markets. Aavid will also continue to benefit from the trend of electronic systems becoming increasingly smaller and more powerful. This trend is resulting in higher temperatures in smaller spaces, leading to the need for more sophisticated thermal management solutions."

The Prudential Insurance Company of America provided financing for the transaction. Terms of the transaction were not disclosed.

Aavid is Nautic Partners’ eighth investment from its most recent fund, Nautic Partners VI, LP.

Nautic Partners is a middle-market private equity firm with over $2.5 billion of equity capital under management. Nautic targets equity investments of $25-$75 million, representing majority ownership in companies with proven business models, defensible market positions, and strong growth potential. Areas of focus include business services, manufacturing, healthcare, and communications. For more information, please visit www.nautic.com.

Aavid’s products are used in a wide variety of applications including enterprise systems, telecommunications equipment, power generation, industrial applications and a wide range of other uses. For more information, please visit www.aavid.com.

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(January 3, 2011 – PR Newswire) — CoorsTek Inc., technical ceramics manufacturer, completed its purchase of the advanced ceramics business of Saint-Gobain. CoorsTek adds manufacturing facilities and product lines such as silicon carbide for semiconductors.

CoorsTek now owns and operates 44 facilities on four continents. Specifically, CoorsTek adds six manufacturing facilities in Europe, four in the United States, one each in Canada, Mexico, and Brazil, and distribution and sales offices in Japan, China, Taiwan, and Singapore.

Product lines and materials added include: silicon carbide for use in semiconductor processing equipment; proprietary silicon carbide ceramic blends used in hot surface ignition systems; silicon nitride used to make extremely durable bearings; mullite used in molten metal filtration; steatite for electrical appliance markets; and specialty ceramics for custom, critical-duty applications.

CoorsTek is familiar with acquisitions, buying Gaiser Tool in 2007.

Celebrating its 100th year in business, CoorsTek is a technical ceramics manufacturer supplying critical components and complete assemblies for defense, medical, automotive, semiconductor, aerospace, electronic, power generation, telecommunication, and other high-technology applications. For more detailed information about the expanded product offerings post-buy, visit http://www.coorstek.com/sgb-acquisition.asp.

Saint-Gobain designs, manufactures and distributes building materials. For more information, please visit http://www.saint-gobain.com.

Copyright 2011 PR Newswire Association LLC All Rights Reserved

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Pete Singer
Editor-in-Chief

Each year, we ask a variety of industry executives for their viewpoints on what they consider to be the main technical challenges in the year head. You’ll find their complete responses on our website, www.electroiq.com, but here’s a compilation of some of their comments.

Andy Antonelli, Director of External Research & Development, Novellus Systems, Inc., sees a range of challenges at the 22nm node, transistor structure liners with step coverage better that what can be achieved with conventional PECVD, and ALD is not an option. When it comes to interconnects, copper will not replace tungsten as the contact metal, but a substantial shift in the deposition process is needed to lower the resistance. "A multi-step deposition process including a pre-treatment, nucleation layer, and bulk fill, perhaps at different temperatures, can be shown to substantially increase the grain size and thus decrease the resistance of the contact," Antonelli said.

David Hemker, VP, New Product Development, Lam Research Corp., sees "no obvious disruptive changes" with the 22nm generation, he said the ongoing evolution of device technology involves increasingly complex multi-layered structures. "As the number of layers continues to grow, device architectures are becoming more sensitive to the interactions of film interfaces. This dynamic is beginning to have significant influence on process integration," he said.

Weimin Li, Deposition Director, Advanced Technology Development, ATMI, Inc., agrees that while 22nm still has a number of challenges, many of the changes are evolutionary, not revolutionary. Moving beyond 22nm, however, is the start of the revolution as DRAM makers face replacing ZrO2-based dielectrics. "After decades of research on SrTiO3-based (STO) dielectrics, is it finally time to make it reality?" Li asks. Delivering the right ratio of Sr-to-Ti throughout a3 -D capacitor structure with extreme aspect ratios – across hundreds of billions of structures per wafer and millions of wafers per year – is a significant challenge.

Nick Pugliano, Marketing Director, Advanced Pattering Technologies, Dow Electronic Materials, sees major challenges at the 22nm node in the area of lithography. "The industry is keenly aware that a single-exposure solution such as EUV will not be ready for 22nm due to its own set of challenges," he said. "Thus, the 22nm node has emerged as a proving ground for a variety of innovative patterning processes geared toward on-track, low cost-of-ownership technologies." For example, quadruple-patterning is needed, but a simple multiplication of double-patterning would be costly and extremely difficult to deploy in mass production.

Franklin Kalk, CTO, Toppan Photomasks Inc., adds that, for mask manufacturers, the conditions and challenges at the 22nm (32nm half-pitch) technology node are becoming clear. "Immersion argon fluoride (ArF-i) will remain the preferred critical-layer lithography. Double patterning (DP) and source-mask optimization (SMO) methods will both become pervasive for image features at sub-80nm pitch. While extreme UV (EUV) lithography is not yet production-ready, several pre-production EUV scanner deliveries are scheduled for 2011, with production tools following within two years. We expect a concerted effort to employ EUV for memory production at 32nm half-pitch, even if only in a limited fashion," he said.

Arthur W. Zafiropoulo, Chairman & CEO, Ultratech, Inc., sees many challenges surrounding the materials selection for 22nm. "As we see the 20/22nm structures begin to be implemented, there will be a larger percentage of those wafers packaged by using (flip-chip) bump. There is an increase in demand for bump in a larger percentage of wafers, as the industry shifts from wire bonding to bump packaging, he said. "

Doug Dixon, Marketing Communications Director, Henkel, says environmental concerns are not the only thing keeping packaging specialists awake at night. "Without question, the smaller, thinner, more powerful paradigm is here to stay and is challenging traditional design and assembly rules, ultimately putting greater demands on the materials needed to enable their function. Much thinner wafers (≤50µm) and the ability to stack die to unprecedented heights (32 die stacks) has driven die attach materials innovation to address these new requirements," he said.

A common theme among our respondents: tackling 22nm technical challenges will require closer collaboration between IC manufacturers and their suppliers. See www.electroiq.com for the full comments from these and many others, and see page 20 of this issue for a roundup of what analysts are saying about the business outlook for 2011.

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(December 29, 2010) — Cohu Inc. (NASDAQ:COHU) appointed Luis A. Müller president of its newly formed Semiconductor Equipment Group, which encompasses Cohu subsidiaries Delta Design Inc. and Rasco GmbH.

Müller has fourteen years experience in the semiconductor equipment industry, including from July 2005 as VP of the high speed handling group for Delta Design Inc. and additionally since January 2009 as managing director of Rasco GmbH in Kolbermoor, Germany. Previously, Müller spent nine years at Teradyne, where he held executive positions in engineering and business development. Müller has a PhD in mechanical engineering from Massachusetts Institute of Technology (MIT).

James A. Donahue, Cohu chairman, president, and CEO said, "The establishment of the Semiconductor Equipment Group is a logical next step in the integration of our two IC test handler companies, Delta Design and Rasco. Under Luis’ leadership Rasco has established new records for sales, orders and net income."

Donahue concluded, "Luis is exceptionally well-prepared for this assignment and I look forward to working with him to extend our market-leading position in IC test handlers and deliver increased profitability to our shareholders."

Cohu is a supplier of test handling, burn-in and thermal solutions used by the global semiconductor industry as well as a supplier of microwave communications and video equipment. For more information, visit Cohu’s website at www.cohu.com.

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(December 27, 2010) — Nanoscience Instruments, a distributor of nanotechnology instrumentation and supplies, announced a new benchtop carbon nanotube (CNT) synthesis device. The Nanotech Innovations SSP-354 is a low-cost system for producing high-quality, multi-walled carbon nanotubes. The device uses an injection CVD process developed at NASA and is integrated into an instrument small enough to fit in a fume hood. The system can produce research-quality, multi-wall carbon nanotubes within a few hours.

The SSP-354 CNT system was designed for affordability and ease of use. The user injects Nanotech Innovations’ organometallic precursor solution into a two-zone furnace where iron catalyst particles are formed. Once growth is catalyzed, the nanotubes form on the surface of a quartz process tube, which is later removed to collect the material. The nanotubes average 50nm in diameter and can be anywhere from several micrometers to a few hundred micrometers in length, depending on operating parameters.

Because the design eliminates many of the steps normally required in producing CNTs, the system suits educational environments where students may be trained to both produce and characterize CNTs. "The SSP-354 CNT system is a great complement to our easy to use AFMs," says Mark Flowers, director at Nanoscience Instruments. "We can now provide simple and cost-effective nanomaterial fabrication along with our line of characterization tools."

Nanoscience Instruments Inc. provides products and services for nanoscience and supports research and engineering at universities, government laboratories, and industrial R&D facilities around the world. More information can be found at www.nanoscience.com

Nanotech Innovations LLC was formed in 2005 to commercialize the NASA technology that is at the heart of the SSP-354 system and process. The company received the patent in July 2010 and continues to produce systems for sale to the educational and research markets as well as investigate the production of new nanomaterials.

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(December 27, 2010 – PR Newswire) — S&P Equity Research semiconductor and semiconductor equipment analysts Clyde Montevirgen and Angelo Zino have issued their 2011 forecasts for the industry.

"The year 2010 is expected to close strong for the semiconductor and semiconductor equipment industries, as sales growth for both are forecasted to reach decade highs," said Montevirgen. "Consequently, we anticipate that most chip and equipment companies will experience multi-year high margins and exceptional earnings increases." Added Zino, "While we think there is still some room to grow, we project more modest advances ahead."

They forecast that semiconductor industry sales will rise 7% in 2011. Considering recent forecasts from S&P Economics, research from industry and trade groups, and bottom-up analysis of sales trends for the companies in their coverage universe, the analysts see increasing unit shipments for key end-markets, such as computers, smartphones, and communications. These account for a large percentage of the semiconductor industry’s demand.

They expect industry sales to rise to nearly $320 billion in 2011 from an anticipated $299 billion in 2010. For 2011, semiconductor equipment sales growth should slow; sales will rise less than 10%, after their projection for industry revenues to increase more than two-fold for 2010. Although the industry is experiencing a sharp rebound in sales this year, following an extended period of under-investing by semiconductor manufacturers, the analysts forecast that growth will slow going forward, as companies digest recent capital expenditure purchases. Zino and Montevirgen expect most demand for semiconductor equipment to come from more advanced technology nodes, as well as from larger memory customers and foundries looking to expand capacity.

Memory

They project that capacity purchases will be driven by flash memory manufacturers, such as Toshiba and Samsung, given expectation for stronger demand and tight supply in this sub-industry. Robust unit shipments for smartphones and tablets will be a major catalyst for these manufacturers, which should keep customer profitability at high levels. Unlike Dynamic Random Access Memory (DRAM), which relies heavily on PC demand, the flash memory market depends on a number of different applications and looks to be in better shape than DRAM on a comparative basis. The flash memory industry has emerging technologies, such as solid-state drives (SSDs), which should drive new demand.

The S&P analysts see DRAM segment sales declining in 2011, following projection for a more than doubling in capital spending in 2010. They believe the biggest growth catalyst for the DRAM segment in 2010 has been the transition from DDR2 (double data rate) technology to DDR3 (both DDR2 and DDR3 are types of DRAM chips that are found in personal computers). DDR3 technology is the successor to DDR2 and offers advantages such as lower operating temperatures, greater speed, and reduced power consumption. Now that DDR3 has become mainstream, Montevirgen and Zino do not see any major catalyst boosting segment spending in 2011.

Asia

They forecast that the Asia-Pacific region will make up 55% of semiconductor sales by the end of 2011, and see more semiconductor companies trying to make cost structures more variable by outsourcing manufacturing to third-party foundries. Leading Taiwanese foundries, such as Taiwan Semiconductor manufacturing (TSM 12 ***), have invested heavily in sub 40nm manufacturing processes, which will attract chip companies that do not have the capital to invest in such high-end manufacturing technology. Also assuming softer sales growth and less favorable tax incentives in Europe, as austerity measures continue, they see Asia continuing to gain global share.

Capacity and adjacent markets

They expect the semiconductor industry’s plant utilization rate to be around 90% by the end of 2011. Capacity utilization rates will fall from the current mid-90% range to the mid-to-high 80% range early in 2011, as chipmakers allow excessive inventory in the supply chain to digest. Although the analysts foresee increasing capacity from recent capital expenditures, they believe that seasonal strength and a rebound in end-market demand in the second half will help keep plants busy through the fourth quarter of 2011.

They forecast that the semiconductor industry’s gross margin will widen modestly throughout 2011. Chipmakers will start the new year by burning off excessive inventory, the analysts say, so expect first-quarter gross margins in the low-50% range, given lower plant utilization rates. However, orders will return to more seasonal patterns starting in the second quarter, and margins should expand to the mid-50% area by the end of the year.

Semiconductor equipment manufacturers are moving further into higher-growth, adjacent industries, namely solar, given that the semiconductor equipment industry is in the midst of a long-term secular decline, say Vino and Montevirgen. They believe pursuing new growth avenues makes sense given the similar processes and technology used within both industries. In addition, the solar industry has higher growth opportunities versus the more mature semiconductor industry. Small and large companies will be looking to enter the solar arena, whether organically or through merger and acquisition activity. The analysts expect Advanced Energy Industries (AEIS 14 *****) and Varian Semiconductor Equipment Associates (VSEA 37 ****) to be major beneficiaries of this trend because of their high investment in R&D within this arena.

They think the semiconductor equipment back-end industry (packaging and automatic test equipment) will experience pressure to consolidate, given the segment’s lower growth rates, high fixed costs, and lower profitability relative to other areas of the supply chain. Further consolidation of test equipment companies would facilitate cost savings through economies of scale and drive more effective factory utilization.

Intel (INTC)

The analysts also predict that Intel (INTC 21 ****) will finally gain some traction in the handset and tablet markets. With Intel’s proposed acquisition of Infineon’s wireless business unit (expected in early 2011), Intel will instantly become a formidable competitor in the baseband segment of the handset market. Intel will successfully be able to cross-sell its Atom processor with the baseband chips, and Montevirgen and Vino expect even more progress once it creates a single chip solution that integrates both functions. Additionally, they believe that Atom will find some success in the lower-end segment of the tablet market.

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(December 22, 2010) — North America-based manufacturers of semiconductor equipment posted $1.51 billion in orders in November 2010 (three-month average basis) and a book-to-bill ratio of 0.96, according to the November 2010 Book-to-Bill Report published by SEMI. A book-to-bill of 0.96 means that $96 worth of orders were received for every $100 of product billed for the month.

The three-month average of worldwide bookings in November 2010 was $1.51 billion. The bookings figure is 5.3% lower than the final October 2010 level of $1.59 billion, and is 90.6% above the $791.8 million in orders posted in November 2009.

The three-month average of worldwide billings in November 2010 was $1.57 billion. The billings figure is down 3.4% from the final October 2010 level of $1.62 billion, and is 110.7% above the November 2009 billings level of $744.2 million.

Source: SEMI December 2010

Billings (3-month avg.)

Bookings (3-month avg.)

Book-to-Bill

June 2010 

1,466.2

1,729.8

1.18

July 2010 

1,495.8

 1,836.6

1.23

August 2010

1,554.6

1,816.1

1.17

Sept 2010

1,610.9

1,651.2

1.03

Oct 2010 (final) 

1,623.3

1,593.7

0.98

Nov 2010 (prelim)

1,567.8

1,509.1

0.96

"Following a historic growth period and 18 months of sequential growth, and in accordance with seasonal trends, sales of semiconductor equipment eased in November," said Stanley T. Myers, president and CEO of SEMI. "This tracks the bookings trend, which peaked in July." Q3 numbers had started to show signs of the peak cracking, according to many analysts, and reflected in the table above.

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars. 

The data contained in this release were compiled by David Powell, Inc., an independent financial services firm, without audit, from data submitted directly by the participants. SEMI and David Powell, Inc. assume no responsibility for the accuracy of the underlying data.

The data are contained in a monthly Book-to-Bill Report published by SEMI. The report tracks billings and bookings worldwide of North American-headquartered manufacturers of equipment used to manufacture semiconductor devices, not billings and bookings of the chips themselves. The Book-to-Bill report is one of three reports included with the Equipment Market Data Subscription (EMDS).

SEMI is the global industry association serving the manufacturing supply chains for the microelectronic, display and photovoltaic industries. For more information, visit www.semi.org

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