Category Archives: Materials and Equipment

(October 26, 2010) — Nanoplas, supplier of HDRF plasma processing equipment for MEMS, 3D through-silicon via (TSV), IC packaging and III-V compounds, introduced a fully automatic dry-processing batch system for high-volume 200mm production. The DSB 9000A is based on Nanoplas’s High Density Radical Flux (HDRF) technology.

The DSB 9000A performs key production steps in microelectronic manufacturing, including removal of Bosch-process polymers, residues and photoresist from 80-250°C; isotropic etching of organic sacrificial layers; and pre-wafer bonding activation.

The DSB 9000A outperforms conventional radio-frequency (RF) plasma and microwave systems, while greatly reducing the risk of surface damage, said Gilles Baujon, CEO of Nanoplas. With 100 percent gas disassociation, the DSB 9000A ICP source produces free-radical concentration levels of up to 1,000 times greater than conventional plasma sources, thus providing enhanced process performance, including higher cleaning performance for high aspect ratio structures. The system’s proprietary technology eliminates the charging effects and UV radiation normally associated with conventional plasma, allowing stiction-free processing and low-temperature operation.

HDRF offers 3 modes of operation covering a wide range of processes, from ultra-sensitive surface cleaning to removal of non-reactive residues. Typical throughput for photoresist stripping is 60-70 WPH, and greater than 100 WPH, per process module, for post-Bosch cleaning and surface activation.

Nanoplas is an innovator of specialized production solutions that deliver low-cost, green alternatives for treating wafer surfaces in next-generation devices, advanced MEMS, 3D TSVs, advanced packaging, power ICs, optoelectronic components and III-V compounds. Visit www.nanoplas.eu for more information.

Subscribe to Solid State Technology/Advanced Packaging.

Follow Advanced Packaging on Twitter.com by clicking www.twitter.com/advpackaging. Or join our Facebook group

October 22, 2010 – SEMI’s August numbers indicated the possible beginnings of a peak in equipment demand — and the September numbers sure like a pullback, with orders declining -11% in a quarter-closing month.

Inside SEMI’s September statistics:

  • Bookings: $1.62B in September, the industry’s first two-month sequential decline since early 2009. Orders are now at levels seen before June.
  • Billings: $1.58B, inching up (~1%) from August, a 17 consecutive month of rising. But that’s three straight months of ≤3% sales growth, and five out of six in low- to mid-single digits.
  • Both orders and sales remain well above the same period a year ago, but falling noticeably: now ~113% and 143%, instead of the nearly 200% in August. The further we pull away from the downturn, of course, the closer those Y/Y comparisons will come to normalcy — and eventually we’ll be comparing them on the upside, too.
  • The Book-to-bill, which had spent most of the year in the "teens" and "twenties" range (1.13-1.23), suddenly drops to 1.03, meaning $103 worth of orders was received for every $100 of product billed during the month. It’s still above the 1.0 parity mark (barely) for a 15th consecutive month — but the last time it was this low was last July, when it leapfrogged into parity (0.80 to 1.06). Generally speaking, sales trail orders by six months or more (litho tools closer to a year, some say), so look for this downward tumble in bookings to eventually be reflected in the sales column.
  • With September numbers in, we can calculate preliminary 3Q10 totals: $5.27B in bookings and $4.63B in billings, growth of 12% and 13% respectively — but well below the 25%-33% growth in 2Q10.

 

The trend carried over to Japan as well, according to the SEAJ’s monthly statistics. Semiconductor equipment sales in September climbed about 21% to ¥112.07B (US $1.37B), but bookings were basically flat for a third straight month, now at ¥127.96B ($1.57B), pushing the B:B down to 1.14.

 

 

(October 21, 2010) — Speaking at the bi-monthly IMAPS luncheon (Santa Clara, CA; 10/6/10), Dr. Meyya Meyyappan, chief scientist for exploration technology at the Center for Nanotechnology at NASA Ames Research Center, discussed his group’s research in carbon nanotubes (CNTs), nanowires, and phase-change memories (PCM), as well as a next-generation non-volatile resistive switching memory.

Podcast: Download or Play Now

Slides from Dr. Meyyappan’s presentation

In the podcast interview with Debra Vogler, senior technical editor, ElectroIQ, Meyyappan summarizes research results – including the “electronic nose” and simulation and modeling activities.  With respect to commercialization of nanotechnology, he advises the industry to be patient. It takes 10-15 years, he said, to take something from the lab to a reliable, robust product that can be produced at high volumes and at a reasonable cost. Still, he believes that the next decade will see more nanotechnology products emerge. 

Follow Small Times on Twitter.com by clicking www.twitter.com/smalltimes. Or join our Facebook group

(October 21, 2010) — SABIC Innovative Plastics launched three new sustainable additions to its Valox* ENH resin series that deliver advanced flame retardance (FR) with desirable mechanical and electrical performance. These innovative materials help customers comply with global environmental regulations, including the European Union (EU) Waste Electrical and Electronic Equipment (WEEE) directive that is now also being applied in Korea and China.

The new Valox ENH resin grades are:

  • Valox ENH 3500 PBT resin, unfilled
  • Valox ENH 4530 PBT resin, 15 percent glass fiber reinforced
  • Valox ENH 4560 PBT resin, 30 percent glass fiber reinforced

The three new Valox ENH resins meet the UL94 V0 standard at 0.8mm. With a comparative tracking index (CTI) of 500 volts for Valox ENH 4530 resin and a CTI of 600 volts for Valox ENH 3500 and Valox ENH 4560 resins, these grades far surpass the CTI performance of standard glass-filled brominated PBT, which is typically around 200 volts.

These unfilled and glass-filled grades have potential for use in electric cooling fans, relays, connectors, switches and fuser applications in printers.

Reducing halogen content in flame-retardant polybutylene terephthalate (PBT) is a challenge because substituting a non-brominated, non-chlorinated FR chemistry usually degrades mechanical performance. But SABIC Innovative Plastics’ highly experienced scientific and technical team achieved this goal. The three new Valox ENH PBT resin grades, with different glass reinforcement levels, not only utilize non-brominated and non-chlorinated FR technology but also provide a better balance of high-performance properties than competitive non-brominated FR PBT resins. They deliver excellent elongation, chemical resistance and impact, and actually offer better electrical and flammability performance than brominated FR grades. Overall, they provide a better balance of properties than other non-brominated FR PBT resins.

“Environmental regulations and guidelines regarding acceptable flame-retardant chemicals for the electrical and electronics industry are continuing to tighten,” said Jos Braat, global product market director, SABIC Innovative Plastics. “Our dynamic R&D program focused on sustainable solutions continues to yield technological breakthroughs. Our new Valox ENH grades are just the latest deliverables in a strategic effort to evolve our flame-retardant plastics portfolio to be in line with global regulations and voluntary eco-labels that are important to our customers’ growth.”

To make applications even more sustainable, Valox ENH resin grades can be enhanced by combining them with other SABIC Innovative Plastics PBT technologies, particularly Valox iQ* resins. This iQ technology is referred to as “upcycled technology” because it incorporates high levels of post-consumer polyethylene terephthalate (PET) bottles into PBT resin through a proprietary chemical process. Upcycling not only diverts waste from landfills but also reduces carbon dioxide (CO2) emissions and energy usage when producing PBT resin. Valox iQ NH 4550 is made from upcycled post consumer PET and is currently in SABIC innovative Plastics’ product portfolio.

The addition of the new materials increases the Valox ENH resin portfolio to five commercial grades applicable to many different E/E applications currently made of brominated FR PBT and/or PET. SABIC Innovative Plastics is also planning to launch PBT/PET alloys within the Valox ENH resin family by the end of this year.

SABIC Innovative Plastics supplies engineering thermoplastics. SABIC Innovative Plastics is a wholly owned subsidiary of Saudi Basic Industries Corporation (SABIC), petrochemicals manufacturer. For more information on SABIC Innovative Plastics’ environmental resin portfolio, please visit the company website at www.sabic-ip.com.

Subscribe to Solid State Technology/Advanced Packaging.

Follow Advanced Packaging on Twitter.com by clicking www.twitter.com/advpackaging. Or join our Facebook group

by Laura Peters, contributing editor

IEDM Previews:
Intel fabs highest mobility pFET with Ge channel
University of Tokyo first to demo III-V self-aligned source/drain
IBM, Macronix identify phase-change memory failure mode
Record photodiode quantum efficiency from Taiwan lab
How strain can protect devices from ESD
SEMATECH tipping III-V MOSFET, FinFET, and resistive RAM
TSMC anneal for gate-last HKMG process
Imec IEDM presentations to cover More than Moore, ITRS
When do TSV stresses affect device operation?
Multi-threshold-voltage flexibility in FDSOI
CMOS imager works from light to night
Carbon nanotube vias approach production densities
IBM Alliance simplifies pFET HKMG
IM Flash details 25nm NAND

October 20, 2010 – Researchers will soon report they are close to achieving the density of (CNTs) needed to manufacture carbon nanotube interconnect vias for production applications.

At the upcoming International Electron Devices Meeting (IEDM, 12/6-8 in San Francisco, CA), a group from Grenoble, France-based CEA LITEN and CEA LETI, École Polytechnique Fédérale Lausanne in Switzerland, and the UK’s Cambridge University will present its methods used to achieve vias with a density of 2.5 × 1012 tubes/cm2 — equivalent to 8 × 1012 walls/cm2, nearing the value of 3 × 1013 walls/cm2 required for interconnect vias. This density is an order of magnitude beyond the previous state of the art.

Carbon nanotubes are ideal as interconnect vias because they can carry currents of over 108 A/cm2. However, there are two key challenges preventing CNT incorporation in interconnect vias: reaching the necessary density and having a viable integration scheme. These researchers grew CNTs on metal alloy (99.5% aluminum, 0.5% copper) or polysilicon substrates using an iron catalyst. The AlCu alloy was chosen due to its low resistance at very small linewidths. Using a root-growth method at 580°C, 200mm wafers, and the process flow shown in Figure 1, the result was double- and triple-walled CNTs with via geometries from 250nm to 1μm (Figure 2).

Figure 1. Process flow for CNT fabrication: wet etch is followed by catalyst deposition, CNT growth, encapsulation with Al2O3 by ALD, CMP, then top contact. (Source: CEA/École Polytechnique/Cambridge U.)

To measure the density achieved, the researchers dipped the CNTs in alcohol, yielding a filling factor as high as 64%. The group was also able to measure the density as a function of via diameter, which varied from 5 × 1012 to 8 × 1012 walls/cm2.

Cross-section of a 250nm CNT via on AlCu after CMP. (Source: CEA LITEN)
 High-density CNT growth in 500nm vias on AlCu line. (Source: CEA LITEN)

 

(October 18, 2010) — SET unveiled a patented system enabling a thorough removal of oxides before or during the semiconductor packaging bonding sequence. Addressing the challenges of the oxidation of metal surfaces in device bonding, this machine system encompasses a substrate chuck and a bond head with a non-contact localized confinement chamber that operates safely with reducing gases such as forming gas or formic acid vapor. It can be implemented on any new SET bonder models FC150 and FC300.

 

To preserve the standard capabilities of SET’s bonding tools and especially the low contact force measurement applied to the components, the "Semi-Open" Confinement Chamber has no hardware sealing. A non-contact virtual seal of the micro-chamber enables gas confinement for chip-to-chip or chip-to-wafer bonding under controlled atmosphere; it ensures gas collection and prevents oxygen intrusion while preserving the alignment of the device with respect to its substrate. Consequently, it ensures an excellent wetting and a higher quality of solder joints at reduced bonding forces and temperatures as well as higher yield as no cleaning step is required.

This technology breakthrough is a perfect answer to overcome the bonding challenges of demanding applications using AuSn and Indium, such as optoelectronics assembly (laser bar, VCSELs) and imaging sensors (IR-FPA).

SET, Smart Equipment Technology, is a supplier of high-accuracy die-to-die, die-to-wafer bonding and nanoimprint lithography solutions. SET is a wholly owned subsidiary of Replisaurus Technologies. Further information is available on www.set-sas.fr.

Subscribe to Solid State Technology/Advanced Packaging.

Follow Advanced Packaging on Twitter.com by clicking www.twitter.com/advpackaging. Or join our Facebook group

(October 15, 2010) — NY Governor David A. Paterson and Assembly Speaker Sheldon Silver joined SEMATECH president and CEO Daniel Armbrust and College of Nanoscale Science and Engineering (CNSE) SVP and CEO Dr. Alain Kaloyeros to announce that the International SEMATECH Manufacturing Initiative Inc. (ISMI) will relocate its headquarters and operations to CNSE’s Albany NanoTech Complex beginning in January 2011.

Editor James Montgomery’s "A day at CNSE" series from UAlbany

Leading-edge techs, innovation vs. efficiency

Mapping EUV’s progress

Nanofab tour, future plans, and unearthing Washington

Drilling down into packaging

ISMI’s move will create more than 100 high-tech jobs, bringing advanced manufacturing technologies for next-gen computer chips to New York state.

ISMI’s relocation to the UAlbany NanoCollege – already home to the headquarters and operations of International SEMATECH – was spearheaded by a $10 million investment from the New York State Assembly, which was matched by a $10 million grant from the Empire State Development Corporation (ESDC). ISMI and its private industry partners will invest $80 million in capital and operational funding as part of the $100 million initiative, which is expected to attract additional technology investments, high-tech jobs and corporate participants to upstate New York.

The ISMI move will be launched in January 2011 and will be completed within 12 months. At the conclusion of the ISMI move, SEMATECH will have relocated its entire operation to the UAlbany NanoCollege. The global consortium was founded in Austin, TX in 1988 as a collaboration of the world’s leading nanoelectronics companies to drive innovative research, development and commercialization for next-generation computer nanochips.

"This is a major investment in NY’s economy and ensures the long-term future of New York as an international leader in nanotechnology and nanoelectronics," Governor Paterson said. "Continuing this partnership with SEMATECH is a perfect example of New York investing in companies at the forefront of their industry, as well as leaders in technology and innovation that hold promise for the future. I commend everyone involved with this historic investment, and I look forward to the many opportunities this will bring to SUNY Albany Nanocollege and the entire Empire State."

"When the Assembly partnered with Dr. Kaloyeros and made the first of many investments in the Albany NanoTech Complex, it was with the express intention of transforming New York State into the world center of nanotech innovation, opportunity and jobs. ISMI’s decision to relocate here sends a clear message that this is the place to be for cutting-edge computer chip manufacturing, commercialization and fabrication," said Speaker Silver. "University/industry partnerships are how we will build a 21st Century economy and create good jobs in our state. I commend our Capital Region delegation – Assembly Members Ron Canestrari, Jack McEneny, Bob Reilly and Tim Gordon – for their continuing leadership in ensuring the growth of Tech Valley."

The world’s top technology leader responsible for the development and implementation of international nanoelectronics manufacturing roadmaps and standards, ISMI will partner with CNSE on advanced manufacturing technologies that are critical to enabling fabrication of multi-functional computer nanochips, which drive nearly every facet of society, from the electronics, information technology, automotive and military sectors to emerging opportunities in clean energy and health care, among many others.

SEMATECH President and CEO Dan Armbrust said, "Today marks the important addition of SEMATECH’s unique manufacturing collaboration initiative called ISMI to complement the long standing partnership between SEMATECH, New York State and the College of Nanoscale Science and Engineering. Our objective is to enhance ISMI’s ability to improve manufacturing productivity and reduce costs in today’s manufacturing facilities and in the factories of the future. By locating ISMI at CNSE’s Nanotech complex in Albany, we will enable the integration of advanced manufacturing technologies with the leading-edge research of SEMATECH and CNSE, allowing us to accelerate the development and introduction of new cost-competitive chip technologies to serve the critical needs of our members and the worldwide nanoelectronics industry."

CNSE Senior Vice President and CEO Dr. Alain Kaloyeros said, "The relocation of ISMI to New York State is testament to, and a direct result of, the groundbreaking vision, unparalleled leadership, and proactive investment of Assembly Speaker Silver and Governor Paterson, who have ensured that in the global competition to lead the 21st century nanotechnology revolution, all roads truly point to New York State. The UAlbany NanoCollege is delighted to build its partnership with SEMATECH through the addition of ISMI’s world-class capabilities at CNSE, as we work together to drive cutting-edge research, development and manufacturing technologies to enable today’s innovation-driven society, and firmly establish New York as the world’s ?go-to’ location for technology investment, corporate location and high-tech job creation."

"The growing presence of our research and development firms and our cutting edge high technology companies right here in New York State is unmatched, setting us apart from other state and countries across the globe," said Empire State Development Chairman and CEO Dennis M. Mullen. "I’m pleased that we can now add world renowned International Sematech to that list. The company’s decision to choose and invest in New York State is a testament to all this region has to offer-an educated workforce, a strategic location and, of course, the partnerships with our premier academic institutions. This new joint venture with the unsurpassed College of Nanoscale Science and Engineering will create jobs, starting with the 100 new positions that will come with the SEMATECH relocation, and will enhance our state’s ability to compete on an international scale. Today’s exciting announcement is a critical piece of Governor Paterson’s New Economy initiative and I applaud his administration for their unwavering commitment to what we know is the foundation for our future economic prosperity."

Approximately 14,000 square feet of existing space will be renovated at CNSE’s Albany NanoTech Complex to accommodate ISMI, to include state-of-the-art infrastructure and tooling and the acquisition of leading-edge equipment for processing and prototyping activities.

With over $6.5 billion in high-tech investments, CNSE’s 800,000-square-foot Albany NanoTech Complex is the most advanced research enterprise in the academic world, featuring the only fully-integrated, 300mm wafer, computer chip pilot prototyping and demonstration line within 80,000 square feet of Class 1 capable cleanrooms.

The UAlbany CNSE college is dedicated to education, research, development, and deployment in the emerging disciplines of nanoscience, nanoengineering, nanobioscience, and nanoeconomics. For information, visit www.cnse.albany.edu.

SEMATECH is an international consortium of semiconductor manufacturers. Learn more at www.sematech.org

Subscribe to Solid State Technology/Advanced Packaging. Follow Solid State Technology on Twitter.com via editors Pete Singer, twitter.com/PetesTweetsPW and Debra Vogler, twitter.com/dvogler_PV_semi. Or join our Facebook group

(October 15, 2010 – PRNewswire) — EoPlex Inc. debuted a high-performance, clean-tech lead carrier for semiconductor packaging. EoPlex xLC is reportedly a cost-effective replacement for the leadframes currently used in quad flat pack no-lead (QFN) packages.

QFNs are the fastest growing packaging segment, because they typically are the smallest and least expensive package. However, conventional QFN lead frames are limited in performance due to design restrictions of the current processes. In addition, they require etching and plating steps that create waste chemicals. EoPlex xLC overcomes these design restrictions in a green process that eliminates etching and plating. Size and cost advantages of QFN packages can now be applied to devices that were limited to more expensive and bulkier packaging technology.

EoPlex xLC is a sintered composite with an engineered microstructure that is based on the company’s proprietary materials and processing technology. With EoPlex xLC, complete packages can have from 2 to 500+ leads and still be less than 300um thick. EoPlex supplies xLC carriers to customers in the semiconductor, packaging and assembly industries. Initial applications are in portable electronics including cell phones, laptops, mp3 players, GPS, cameras and wireless devices.

We’ve introduced a product that combines clean technology with performance and cost advantages for our customers, said Arthur L. Chait, CEO of EoPlex. "We see this as part of a growing trend where clean manufacturing actually results in a better product and a lower cost." EoPlex currently has a small factory at its headquarters in Redwood City, CA, and plans to open full-size factories in locations that best support its customers.

EoPlex is a private company backed by Draper Fisher Jurvetson, ATA Ventures, Labrador Ventures and Draper-Richards. More information is at www.eoplex.com. EoPlex will be raising an expansion round of capital in 2011 and interested parties should contact Arthur L. Chait directly at [email protected].

Subscribe to Solid State Technology/Advanced Packaging.

Follow Advanced Packaging on Twitter.com by clicking www.twitter.com/advpackaging. Or join our Facebook group

(October 14, 2010) — The 7th International Conference "3-D ARCHITECTURES FOR SEMICONDUCTOR INTEGRATION AND PACKAGING" will take place December 8-10, 2010 at the Hyatt Regency San Francisco Airport Hotel. Check out the planned keynotes and topics of the conference.

3D integration and packaging is now well known to all in the semiconductor industry. Today the focus has shifted away from trying to understand the technology opportunity to one of understanding the practical challenges of technology adoption and commercialization, including who is getting there first, how, and at what cost.

3D integration and packaging, of both devices as well as systems, represents an industry inflexion point, not just an evolutionary change — thus there is a natural degree of uncertainty as companies scramble to secure market share, obtain new process and design tools, and of course, new customers and new applications.

This conference continues to give a broad, yet thorough perspective on the technomarket opportunity and challenge offered by building devices and systems in the vertical dimension. Industry leaders from around the world are invited to speak at this conference, on a wide range of topics important to the emerging and ongoing 3-D integration and packaging efforts. The format of the conference and its presentations enables speakers to present the most up-to-date and forthright perspectives as possible. 3-D Architectures for Semiconductor Integration and Packaging targets senior-level technologists, managers, and executives as speakers and attendees from leading companies and organizations around the world. The result is a unique forum where one can gain the latest insights to bring clarity in the direction of their own efforts.

This year’s conference sessions include:

  • Meeting the 3-D Opportunity
  • Toward the Frontline of Manufacturing
  • 3D Interposers — Where, When, and Why?
  • Critical Perspectives on 3D IC Standards
  • Facilitating Design of 3D Interposers and Die
  • 3D IC Advancements and the Systems Approach
  • Handling, Bonding, and TSV Manufacturing Capabilities
  • New Routes to Logic

Keynote speakers:

  • Subramanian Lyer, IBM Fellow, IBM
  • Douglas Chen-Hua Yu, Senior Director of Integrated Interconnect and Packaging Division, TSMC R&D Group
  • Ho-Ming Tong, Chief R&D Officer & General Manager of Group R&D, ASE Group
  • Antun Domic, Senior VP and General Manager Implementation Group, Synopsys

Pre-Conference Symposium: Key Topics in Going 3-D
The Evolving 3-D IC Infrastructure
Test in the Third Dimension
Thermal Management of 3D Architectures: Challenges and Opportunities
Taiwan R&D for 3-D ICs

Visit http://techventure.rti.org/Winter2010 for more details

Subscribe to Solid State Technology/Advanced Packaging.

Follow Advanced Packaging on Twitter.com by clicking www.twitter.com/advpackaging. Or join our Facebook group

(October 13, 2010) — AMO GmbH, a private research service provider in the field of nanofabrication, and SUSS MicroTec AG, equipment and process solutions supplier for semiconductor and related microstructuring steps, are developing applications for substrate conformal imprint lithography (SCIL) with UV curing material.

SUSS MicroTec’s SCIL imprint method for sub-50nm structures optimizes standard imprinting processes for wafers up to 6" area full-field imprinting. High resolution nanoimprinting — so far limited to small wafer sizes — can now be successfully applied to large substrates, SUSS’ goal when it adopted the technology in 2008. Large-area soft stamps with repeatable sub-50nm printing capability do not cause any stamp deformation or even damaging as no contact force is applied and soft, flexible material is used. When used with UV curing materials, SCIL is able to combine a high resolution with a high throughput. SCIL can be used with various well-known materials that are commonly used in UV nanoimprinting processes.

Figure 1. Silicon master.

AMO has provided two key components for this development: the master for large-area nanostructures and the UV-curing nanoimprint material AMONIL. The masters, with a size up to 6 inches, are fabricated at AMO by laser interference lithography and plasma etching in silicon. They have perfect binary periodic patterns between 180 to 2500nm. These holographic gratings are characterized by seamless patterns and a low defect density on a large area, due to a special fabrication technology.

Figure 2. 6" silicon master with 2D hole pattern.

Hundreds of flexible stamps can be replicated from one master. With SCIL technology the large-area stamp is brought into contact with the AMONIL resist, which is thereafter cured with UV light. The resist material has already been optimized by AMO for the implementation of Quartz- and soft-PDMS stamps in conventional imprint processes. The imprint resist material is distributed by AMO with a standard thickness from 100 to 800nm. Due to the unique sequential contacting and separation technology a distortion-free replication of the stamp at high throughput is now possible with UV-SCIL.

By unifying the competences of each partner, the UV-SCIL method from this successful cooperation could be demonstrated on a large scale. AMO’s and SUSS MicroTec’s customers are now offered the master, material and tool process technology for application developments, such as in the field of LED/VCSEL, diffractive and refractive optical elements, pattern magnetic media or functional material as well as printed electronics or RFIDs.

AMO, as a research company, realizes nanofabrication technologies for applications in the field of information technology, biotechnology and photonics. To learn more, visit www.amo.de

SUSS MicroTec is a leading supplier of equipment and process solutions for microstructuring in the semiconductor industry and related markets. For more information, please visit www.suss.com/scil 

Subscribe to Solid State Technology/Advanced Packaging. Follow Solid State Technology on Twitter.com via editors Pete Singer, twitter.com/PetesTweetsPW and Debra Vogler, twitter.com/dvogler_PV_semi. Or join our Facebook group