Category Archives: Wafer Level Packaging

Samsung Electronics and Apple remained the top two semiconductor chip buyers in 2016, representing 18.2 percent of the total worldwide market, according to Gartner, Inc. (see Table 1). Samsung and Apple together consumed $61.7 billion of semiconductors in 2016, an increase of $0.4 billion from 2015.

“This is the sixth consecutive year that Samsung Electronics and Apple have topped the semiconductor consumption table,” said Masatsune Yamaji, principal research analyst at Gartner. “While both companies continue to exert considerable influence on technology and price trends for the wider semiconductor industry, their impact has lessened due to falling expectations for future growth.”

Although Samsung Electronics experienced intense competition from Chinese original equipment manufacturers (OEMs) in various markets including smartphones, LCD TV and LCD panel through 2016, the company increased its design total available market (TAM) and came back as the global top design TAM company in 2016 with 9.3 percent share. Apple decreased its design TAM in 2016 for the first time since Gartner started design TAM research in 2007, ending the year with 8.8 percent share of the market. The iPad did not sell well through 2016 and Apple also lost market share in the PC market.

Table 1. Preliminary Ranking of Top 10 Companies by Semiconductor Design TAM, Worldwide, 2016 (Millions of Dollars)

2015 Ranking

2016Ranking

Company

 2015

 2016

Growth (%) 2015-2016

2016 Market Share (%)

2

1

Samsung Electronics

30,343

31,667

4.4

9.3

1

2

Apple

30,885

29,989

-2.9

8.8

4

3

Dell

10,606

13,308

25.5

3.9

3

4

Lenovo

13,535

12,847

-5.1

3.8

6

5

Huawei

7,597

9,886

30.1

2.9

5

6

HP Inc.

8,673

8,481

-2.2

2.5

8

7

Hewlett Packard Enterprises

6,485

6,206

-4.3

1.8

7

8

Sony

6,892

6,071

-11.9

1.8

21

9

BBK Electronics

2,515

5,818

131.4

1.7

9

10

LG Electronics

5,502

5,172

-6.0

1.5

Others

211,736

210,238

-0.7

61.9

Total

334,768

339,684

1.5

100.0

Note: Numbers may not add to totals shown because of rounding.
Source: Gartner (February 2017)

Nine of the top 10 companies in 2015 remained in the top 10 in 2016. Cisco Systems dropped out of the top 10 in 2016 to be replaced by Chinese smartphone OEM, BBK Electronics, which grew rapidly in 2016. The top 10 now consists of four companies from the U.S., three companies from China, two from South Korea and one from Japan. This is the first time that three Chinese companies have ranked in the top 10, proving that even with the slowing macroeconomic situation in China, the importance of the Chinese electronics market is increasing.

“Even though the influence on the semiconductor industry of the top two strongest OEMs is weakening, the combined design TAM of the top 10 companies outperformed the average growth rate of the total semiconductor market in 2016,” said Mr. Yamaji. “However, semiconductor chip vendors can no longer secure their businesses by relying on a few strong customers because market share changes much faster these days. BBK Electronics grew very fast in 2016 and increased its design TAM, but this extraordinarily fast growth also underlines how volatile the businesses in China can be. Technology product marketing leaders at semiconductor chip vendors need to take the risks of their major customers into account, and always try to diversify their customer base.”

(Note: This is Part 2 of a two-part article; Part 1 is here)

By Denny McGuirk, president and CEO, SEMI

“Do not go where the path may lead, go instead where there is no path and leave a trail,” was how I started last week’s article.  In that article we looked back on 2016 and the incredible progress of the industry and how it continually cuts new trail and keeps moving at the speed of Moore’s Law.  In this week’s follow up, I would like to talk about where the industry is going and how SEMI is changing to keep up with it.  As not everyone is aware of all SEMI does, the following is a quick reminder on how SEMI works to represent the industry before looking ahead to 2017, specifically, and beyond.

SEMI, the global non-profit association connecting and representing the worldwide electronics manufacturing supply chain, has been growing with the industry for 47 years.  SEMI has evolved over the years, but it has remained as the central point to connect.  Whether connecting for business, connecting for collective action, or connecting to synchronize technology, SEMI connects for member growth and prosperity.

Our industry is in the midst of a vast change.  To deal with the escalating complexity (making a semiconductor chip now uses the great majority of the periodic table of the elements) and capital cost, many companies have had to combine, consolidate, and increasingly collaborate along the length of the electronics manufacturing supply chain.

Some companies have broadened their businesses by investing in adjacent segments such as Flexible Hybrid Electronics (FHE), MEMS, Sensors, LEDs, PV, and Display.  Lines are blurring between segments – PCBs have morphed into flexible substrates, SiP is both a device and a system.  Electronics integrators are rapidly innovating and driving new form factors, new requirements, and new technologies which require wide cooperation across the length of the electronics manufacturing supply chain and across a breadth of segments.

The business is changing and SEMI’s members are changing.  When SEMI’s members change, SEMI must change, too – and SEMI has, and is.  SEMI developed a transformation plan, SEMI 2020, which I wrote about at the beginning of 2016.  We’re well on our way on this path and I’d like to update you on what we’ve accomplished and what’s to come.

SEMI 2020: “The Only Time You Should Look Back is to See How Far You’ve Come”

SEMI organized its SEMI 2020 transformation into three basic pillars of the SEMI 2020 strategy.  First, “reenergizing the base,” where SEMI focuses on enriching delivered value for the present day needs of its traditionally engaged membership base.  Second, “building communities and collaboration,” where SEMI works to develop specific forums and groups to meet specific needs and focus on specific technologies and products.  Third, “evolving SEMI value propositions for 2020,” which is the work of changing and innovating SEMI products and services for the needs of the industry in the future.

To date, SEMI has made great progress on these three pillars, here are a few examples:

1. Reenergize Base

  • Grew membership to ~2,000 global SEMI member companies
  • Growth in SEMICON expositions:
    • 248,738 global exhibition visitors in 2016 (up 8 percent year-over-year)
    • 4,410 global exhibitors in 2016 (up 5 percent in m2 of exhibition space sold)
  • Realignment of SEMI with organization changes in Americas, China, Europe, and HQ

2. Build Communities and Collaboration

 

  • FlexTech joined SEMI as Strategic Association Partner: SEMI FLEX conferences and programs are now in America, Europe, Korea, SEA and Japan
  • MEMS and Sensors Industry Group (MSIG) joined SEMI as Strategic Association Partner
  • SEMI Special Interest Groups developed and globalized — Chemical and Gases Manufacturers Group (CGMG), SEMI integrated Packaging and Test (SiPAT), Semiconductor Components, Instruments & Subsystems (SCIS), etc. — integrating broad areas of the supply chain
  • Development of SEMI Collaborative Technology Platforms with initial activities in Interconnect, Heterogeneous Integration Roadmap (partnered with IEEE CPMT, EDS, & Photonics Societies), etc.
  • Introduction and co-sponsoring of special interest programs such as FUTURECAR and regional SMC conferences

 

3. Evolve SEMI Value Propositions for 2020

  • SEMI (automation) Standards adapted for Smart Manufacturing (Industry 4.0)
  • Improved channels: new SEMI Global Update, new website, social media (follow SEMI on LinkedIn and Twitter), infographics
  • New data products such as 200mm report, packaging report, mobile version of fab database (FabView)
  • New programs such as SEMI European MEMS conference
  • SEMI Foundation widening scope on Workforce Development
  • Advocacy activities leveraging collective action on trade, industry funding, export control, taxation, and sustainable manufacturing (including regulation of safety, materials, and environmental impact).

 

SEMI 2020: “The Road to Success is Always Under Construction”

 

SEMI continues to conduct surveys, uses multiple means of gathering the voice of the customer, and constantly aligns with guidance from its various committees, regional advisory boards, and International Board of Directors.  Despite its name, SEMI 2020 is a journey and not a destination.  SEMI will continue to evolve, develop, and add critical communities, services, products, and industry advocacy as SEMI’s members evolve.

While many of the SEMI activities captured above will continue, the following provides a sampling of activities more specific to SEMI’s work in 2017.

1. Reenergize Base

  • Increase frequency and depth of SEMI outreach and grow SEMI’s global membership and engagement
  • Launch SEMICON Europa 2017 co-location with productronica in Munich to connect to electronics manufacturing supply chain while preserving SEMI’s core community within its own show
  • Launch new engagement and experiential components at SEMICON West and SEMICON Japan
  • Move HQ headquarters to more member-suited, collaborative, efficient, and smaller building in Milpitas

 

2. Build Communities and Collaboration

 

  • Develop four vertical application collaborative forums:  World of IoT, Smart Automobile, Smart Manufacturing, and Smart MedTech
  • Fully integrate FlexTech and MSIG into SEMI’s global infrastructure and develop regional communities and events for these distinct adjacent communities
  • Provide association services to the Fab Owners Association as a SEMI Strategic Association Partnership
  • Continue to develop and increase global participation in SEMI Special Interest Groups such as SCIS, CGMG, and SiPAT to provide the specific and current needs of SEMI’s members

 

3. Evolve SEMI Value Propositions for 2020

  • Provide greater inbound and outbound member visibility and member services for fast-developing China region
  • Further develop SEMI Standards for Smart Manufacturing including a focus on big data and security
  • Advocate for funding for SEMI member pre-competitive projects in all global regions
  • Develop and improve industry training and education capabilities in all regions
  • Raise visibility for SEMI in securing unrestricted trade for semiconductor manufacturing and extended supply chain

“Roads Were Made for Journeys, Not Destinations”  

This quotation, generally attributed to Confucius, ties the themes of the road of this year’s annual update to my personal journey.  As you may know, at the end of 2016, I announced my intention to retire and while I’ll remain until a successor is identified, this will be my last SEMI update.

My personal journey has definitely not been a straight line and that’s made it all the more interesting – and, I hope, made me a “more skillful driver.”  Instead of the road, the sky used to be my home (although, with trips to Asia and Europe, sometimes it still feels like I’m still there!), with many years flying with the United States Air Force.  After that, my path led to the world of non-profit leadership and eventually, prior to SEMI, leading IPC, the interconnect trade association.  As the industry has blurred the borders of PC boards and substrates and semiconductor packages, maybe it was natural that I would also shift from IPC to SEMI.

I’ve been at SEMI for over five years and have constantly been amazed by the speed of the industry, the exceptional professionals and their astounding innovations, and the tight global cooperation and support.  When I started, there was a flashpoint in the potential jump to pursue the 450mm wafer size.  I got to know our industry and our members very quickly!  But, I almost immediately learned, this is a unique industry where collaboration across the electronics manufacturing supply chain is critical, where global stakeholders are well connected, and where – with Moore’s Law as precedent – industry leaders are used to working together, no matter if collaborators or competitors, for the good of the industry.

I am grateful to call many in our industry friends.  It is with regret that I won’t be seeing these friends as frequently as before, certainly.  However, I am pleased to be leaving behind a sound a valued SEMI organization with the professionals and plans in place to carry SEMI 2020 forward and deliver more valued services, products, and above all connections for its members.  I am happy for my time at SEMI and am grateful to the SEMI staff, SEMI International Board of Directors, and SEMI Members for the opportunity to serve the amazing association

The newly released 2017 20th anniversary edition of The McClean Report contains an analysis of the three phases of China’s attempt to gain a stronger presence in the IC industry (Figure 1).  The analysis of Phase 3 includes a long list of the successes and setbacks that the Chinese have faced since initiating this strategy in 2014.

China’s government has a long-term goal to become self-sufficient with regards to IC devices.  Its “Made in China 2025” (MIC 2025) plan was published by the China State Council in May of 2015. The milestones in MIC 2025 are for China to be 40% self-sufficient in IC devices in 2020 and 70% in 2025.  In reality, it is naive to believe that being 40%, 70%, or whatever percentage less than 100%, is even close to being self-sufficient in the IC industry. In just about every case, the lack of just one low-value IC (e.g., a mixed-signal analog device), process material (e.g., a specific chemical or gas used in fabricating ICs), or package type will stop the entire electronic system from being produced and shipped.

Figure 1

Figure 1

As an example, in the early 1980s, the U.S. government attempted to make sure that every wafer processing and packaging material as well as every piece of semiconductor processing equipment that was used to make military ICs have at least one U.S. source. Even more than 30 years ago, when IC processing was much less complex than it is now, this program had to be abandoned due to the impossible task of making sure there was a U.S. source for literally thousands of items. The bottom line is that anything less than 100% self-sufficiency in the IC industry is not self-sufficient.

The success of MIC 2025 is fundamentally dependent upon two things—funding and technology. The goals of MIC 2025 have almost no chance of success without strong results in both of these areas. IC Insights considers each one to have equal weight on the potential final outcome.

There is near-unanimous consensus that funding will not be a hindrance for the potential success of MIC 2025. China’s National Government has approved approximately $20 billion of funding support for its IC industry programs with almost another $100 billion of possible support coming from local Chinese governments, provinces, and private investors. In total, the tens of billions of dollars of funding now targeting the IC industry is probably sufficient to construct at least 10 high-volume 300mm IC production fabrication facilities. It should be noted that regardless of what happens with China-based IC production in the long run, IC equipment companies are in prime position to benefit from this massive spending spree over the next few years.

IC Insights believes that the huge roadblock standing in the way of the success of MIC 2025 is the ability of the Chinese to acquire the IC technology to be used in the newly funded fabs. Beginning in 2014, the Chinese sought to acquire technology by acquiring existing IC suppliers. The Chinese had some early success in acquiring companies like ISSI and OmniVision, but most governments are now on “high alert” with regard to China’s IC industry ambitions and future foreign IC company acquisitions will be very difficult to complete. Essentially, the window of opportunity for the Chinese to attain IC technology through foreign company acquisitions is now closed.

Although the amount of money reported to be allocated toward constructing the new indigenous Chinese company IC fabs has been massive, the technology announced to be used in these fabs has in every case been at least two generations behind what the market leaders in that segment are currently using or will be using when the fab opens. Some examples are shown below.

  • XMC (purchased by Tsinghua Unigroup in July 2016 and put in a holding company called Yangtze
  • River Storage Technology)—32-layer 3D NAND technology.
  • Fujian Jin Hua Integrated Circuit—32nm DRAM technology.
  • Shanghai Huali (HLMC)—28nm foundry logic capability.

While all of the currently announced China IC fabs seem to be more than adequately funded, none of them appear to possess the IC technology needed to compete with the leaders in their respective product segments.

There have recently been reports that the Chinese companies building the new fabs discussed above are hiring IC engineers from Samsung, SK Hynix, and Intel’s China-based IC facilities. This method has been mentioned as one way for Chinese companies to “develop their own” IC technology as these engineers bring IC process knowledge/experience acquired at their former employer with them. In IC Insights’ opinion, this is a very dangerous way to “develop” IC process technology.

In 2003, in China-based pure-play foundry SMIC’s second year of production, TSMC filed a lawsuit alleging that SMIC hired more than 100 former TSMC employees and asked them to provide SMIC with TSMC trade secrets. Moreover, TSMC alleged that SMIC infringed on five of TSMC’s IC process technology patents (later expanded to eight patents). In early 2005, SMIC and TSMC settled the lawsuit with SMIC paying TSMC $175 million and TSMC gaining an 8% stake in SMIC. Prior to the settlement, a California jury returned a verdict against SMIC in a U.S. lawsuit filed by TSMC.

With the stakes so high, once the newly opened Chinese-owned memory fabs begin production, expect the reverse engineering teams at Samsung, SK Hynix, Micron, Intel, Toshiba, and Western Digital (SanDisk) to shift into high gear by taking apart the new Chinese DRAM and 3D NAND devices to determine which of their patents are being infringed upon by these new memory players. IC Insights believes that with the decades of high-volume DRAM and NAND flash production history of the major memory suppliers, it will be almost impossible to develop new DRAM and NAND flash technology without infringing on numerous patents within these companies’ extensive portfolios.

In 2016, IC production in China (including foreign companies) represented 11.6% of its $112 billion IC market, up less than two percentage points from 9.8% five years earlier in 2011. Moreover, China-based IC production is forecast to exhibit a very strong 2016-2021 CAGR of 18%. However, considering that China-based IC production was only $13.0 billion in 2016, this growth will start from a relatively small base.

Given the sheer size of the expected expenditures for new Chinese IC facilities, as well as an expanding presence of foreign IC producers (e.g., Intel, Samsung, etc.), IC Insights believes there will be a significant improvement in the share percentage of China-based IC production through 2025 (Figure 2), but nowhere near the levels forecast in the MIC 2025 plan. As shown, IC Insights forecasts that this share will increase to 17.0% in 2020 and to 25.0% in 2025, each less than half of the original MIC 2025 goals.

Figure 2

Figure 2

 

By Denny McGuirk, SEMI president and CEO

“Do not go where the path may lead, go instead where there is no path and leave a trail.”  Attributed to Ralph Waldo Emerson, this could be the credo of our industry.  Moore’s Law has created $13 trillion of market value and we’ve been pioneering the way forward – since even before Gordon Moore made the famous “observation” that became Moore’s Law more than 50 years ago.  Our industry paved the road forward with advancements in design, materials, processing, equipment, and integration, traveling at the speed of exponential growth number in transistors per chip (doubling approximately every two years).

Today, globally, we’re shipping more than one trillion ICs per year!  Leading-edge chips boast more than 10 billion transistors at the advanced 10nm (gate length) technology node and are made with 3D FinFET architectures formed by 193nm wavelength immersion multi-patterning lithography.  It’s become a very challenging – and very expensive – road (a single lithography tool alone costs in the tens of millions of dollars).  The companies building the road ahead are bigger and fewer as massive bets now need to be placed on new fabs costing more than $5 billion and even $10 billion and where a new single chip design alone costs more than $150 million to bring into production.

What follows, in Part 1 of this two-part article, is a quick look back at the industry in 2016 and the road ahead in 2017 followed by what SEMI achieved in 2016 and where SEMI’s road will lead in 2017 to keep pace our industry charging forward where there is no path. Part 2 (next week’s Global Update) will focus on SEMI 2020 initiatives.

A look back at 2016: “Straight roads do not make skillful drivers”

2016 was definitely not a straight road; truly it was a wild ride – so, SEMI members have become extremely skilled drivers. The semiconductor manufacturing industry had a slow first half with pessimism building throughout the first quarter, but by April semiconductors bottomed and NAND investment and a slate of new China projects drove a strong second half.  For semiconductor equipment, SEMI’s statistics indicate global sales in 2015 were $36.5 billion and 2016 came in at $39.7 billion, ultimately ending up about 9 percent.  For reference semiconductor materials in 2015 was $24.0 billion and 2016 came in at $24.6 billion, up nearly 2.6 percent year-over year (YoY).

But, it turns out, that’s not half the story.  2016 was full of surprises.  At the geopolitical level, Brexit, an impeachment in South Korea, and a Trump win were wholly unanticipated and leave a lot of questions as to how that road ahead might look.  In technology, the Galaxy Note 7 mobile phone became an airline hazard announcement and stalwarts like Yahoo! faded into the background (now part of Verizon).  In part due to challenges of the road ahead (and because the cost of capital remained low) M&A fever continued in semiconductors with more than $100B in deals announced in 2016.

It was an astonishing year for combinations with huge deal announcements such as Qualcomm buying NXP for $47 billion and SoftBank buying ARM for $32 billion.  Meanwhile, mergers in the equipment and materials space continued, to name a few notables ASML’s acquisition of Hermes Microvision, DuPont and Dow announcing the intent to merge (announced December 2015, but still in the works), and Lam Research and KLA-Tencor ultimately calling off their deal due to complications of regulatory pushback.  The extended supply chain was mixing things up, too, with acquisitions like the announcement by Siemens to acquire Mentor Graphics.  It has been very active, overall.  This was the second year of semiconductor M&A deals valued at more than $100 billion, a signal that size and scale is critical to build the road ahead.

A look ahead: “Difficult roads often lead to beautiful destinations”

With all the talk about roads, it’s no surprise that the automotive segment is gathering momentum as a strong growth driver for the electronics supply chain.  Not only is there increasing electronics content in cars for comfort and infotainment, but also for assisted and autonomous driving and electric vehicles which are ushering in a new era of electronics consumption.

Along with automotive, IoT (Internet of Things), 5G, AR/VR (Augmented Reality and Virtual Reality), and AI (Artificial Intelligence) round out a set of powerful IC and electronics applications drivers (see figure).  Per an IHS Study, 5G alone may enable as much as $12.3 trillion in goods and services in 2035. Gartner’s most recent forecast is cause for optimism further down the electronics manufacturing supply chain.  Gartner see IC revenue growing from 2016’s $339.7 billion to 2017’s $364.1 billion up 7.2 percent and growing further in 2018 at $377.9 billion up 3.8 percent.  For semiconductor equipment, SEMI’s forecast indicates 2015 was $36.5 billion, 2016 will come in at $39.7 billion, and 2017 is projected to be $43.4 billion, pointing to both 2016 and 2017 experiencing approximately 9 percent YoY growth.

In 2017, China investment is projected to continue as a major driver, likely consuming over 16 percent of the total global equipment investment (second only to South Korea).  SEMI is currently tracking 20 new fab projects.  Investments come from both multinationals and local Chinese ventures.  A sign of the rise of China is China’s upward production share trend of its own IC consumption market (IC Insights): 8 percent in 2009, 13 percent in 2015, and 21 percent in 2020. Further down in the electronics supply chain, fab equipment related spending in China will rise to more than $10 billion per year by 2018 and remain at that level or above for subsequent years.

NAND will continue to be a major driver with 3D NAND investment leading the way.  Silicon in Package (SiP) and heterogeneous integration will increasingly be solutions to augment traditional feature scaling to fit more transistors into less space at lower costs.  Materials innovations will be relied upon to solve front-end and packaging challenges while standard materials will be the focus of increased efficiencies and cost reduction. 200mm fab capacity will grow and stimulate new 200mm investment with upside driven by power devices and MEMS segments.  Investment in foundry MEMS will grow by an estimated 285 percent (2015 to 2017).

“There are far better things ahead than any we leave behind”

SEMI, the global non-profit association connecting and representing the worldwide electronics manufacturing supply chain, has been growing with the industry for 47 years.  SEMI has evolved over the years, but it has remained as the central point to connect.  Whether connecting for business, connecting for collective action, or connecting to synchronize technology, SEMI connects for member growth and prosperity.

As a reminder, here are SEMI’s mission, vision, and 2020 strategic focus areas.

  • Mission — our focus for the next five years
    • SEMI provides industry stewardship and engages our members to advance the interests of the global electronics manufacturing supply chain.
  • Vision — what we stand for
    • SEMI promotes the development of the global electronics manufacturing supply chain and positively influences the growth and prosperity of its members.  SEMI advances the mutual business interests of its membership and promotes a free and open global marketplace.
  • Members’ Growth — 2020 strategic focus
    • SEMI enables member growth opportunities by evolving SEMI communities and building new communities across the global electronics manufacturing supply chain via cooperation, partnerships, and integration.
  • Members’ Prosperity — 2020 strategic focus
    • SEMI enables members to prosper by building extended supply chain collaboration forums providing opportunities to increase value while optimizing the supply chain for SEMI members.

Our industry is in the midst of a vast change.  To deal with the escalating complexity (making a semiconductor chip now uses the great majority of the periodic table of the elements) and capital cost, many companies have had to combine, consolidate, and increasingly collaborate along the length of the electronics manufacturing supply chain.

Some companies have broadened their businesses by investing in adjacent segments such as Flexible Hybrid Electronics (FHE), MEMS, Sensors, LEDs, PV, and Display.  Lines are blurring between segments – PCBs have morphed into flexible substrates, SiP is both a device and a system.  Electronics integrators are rapidly innovating and driving new form factors, new requirements, and new technologies which require wide cooperation across the length of the electronics manufacturing supply chain and across a breadth of segments.

The business is changing and SEMI’s members are changing.  When SEMI’s members change, SEMI must change, too – and SEMI has, and is.  SEMI developed a transformation plan, SEMI 2020, which I wrote about at the beginning of 2016.  We’re well on our way on this path and in next week’s e-newsletter Global Update, I’d like to update you on what we’ve accomplished and what’s to come.

According to the latest market study released by Technavio, the global semiconductor chip packaging market is expected to grow at a CAGR of more than 31% during the forecast period.

This research report titled ‘Global Semiconductor Chip Packaging Market 2017-2021’ provides an in-depth analysis of the market in terms of revenue and emerging market trends. This market research report also includes up to date analysis and forecasts for various market segments and all geographical regions.

The global semiconductor chip packaging market is dominated by APAC, which holds more than 71% of the total market share. The presence of many prominent semiconductor foundries is driving the market in the region.

One of the important driving factors of the semiconductor chip packaging market is the high adoption of semiconductor ICs in automobiles. The increasing automation of automobiles is creating high demand for semiconductors for use in automotive products such as GPS, airbag control, anti-lock braking system (ABS), infotainment, and collision detection technology, which is beneficial for the market growth.

Based on packaging techniques, the report categorizes the global semiconductor chip packaging market into the following segments:

  • 3DIC TSV stacks
  • Flip-chip wafer bumping
  • 2.5D interposers
  • 3D WLP
  • Fan-in WL CSP
  • FO WLP/Sip

The top three revenue-generating packaging technique segments in the global semiconductor chip packaging market are discussed below:

3DIC through-silicon via (TSV) stacks

“The 3DIC through-silicon via stacks packaging technique will be responsible for generating almost 75% of the market revenue by 2021, posting a CAGR of 45% through the forecast period. This high adoption of TSV platforms is pushed by the growing need to increase functionalities, performance, and integration,” says Sunil Kumar Singh, one of the lead analysts at Technavio for semiconductor equipment research.

Form factor and cost reduction of the TSV platforms also play an important part in its rising adoption. This technology is emerging as one of the most crucial platforms for high-end memory applications, heterogeneous interconnection with micro-electro-mechanical systems (MEMS), sensors, radio frequency (RF) filters, and performance applications.

Flip-chip wafer bumping

Flip-chip or controlled collapse chip connection (C4) is used to solder connections between semiconductor devices, such as IC chips and micro-electro-mechanical systems (MEMS), and an external circuit. This technology reduces power consumption by a great extent and also offers high-frequency transmission, which attracts a higher number of end-users to adopt this technology.

2.5D interposers

The increasing number of devices with access to the internet is creating additional bandwidth needs, which supports high-performance computing and cloud infrastructure. The growing popularity of connected cars is also a major driver of streaming bandwidth. Silicon interposer packaging architectures are being developed and manufactured to meet these continually increasing bandwidth requirements.

“2.5D silicon interposers manufactured using four-metal layer back-end-of-line process has achieved data rates up to 11.5 Gbps. These impressive statistics are pushing for the high adoption of the 2.5D interposers packaging technique,” says Sunil.

The top vendors highlighted by Technavio’s research analysts in this report are:

  • Applied Materials
  • ASM Pacific Technology
  • Kulicke & Soffa Industries
  • TEL
  • Tokyo Seimitsu

Each year, Solid State Technology turns to industry leaders to hear viewpoints on the technological and economic outlook for the upcoming year. Read through these expert opinions on what to expect in 2017.

Driving the industry forward with materials engineering

Raja_Prabu_fullPrabu Raja, vice president and general manager, Patterning and Packaging Group, Applied Materials, Inc.

Over the past few years, the industry has made remarkable progress in bringing 3D chip architectures to volume production. In 2017, we will continue to see exciting technology innovations for scaling 3D NAND devices to 64 layers, ramping the 10nm process node into volume manufacturing and increasing the adoption of highly integrated chip packages.

With the transition to the 3D and sub-10nm era, the semiconductor world is changing from lithography-based scaling to materials-enabled scaling. This shift requires multiple new materials and capabilities in selective processing.

The magnitude and pace of these changes are truly disruptive. For example, with 3D NAND materials innovations for hard mask deposition and hard mask etch are essential. The challenge is to build high aspect ratio vertical structures with uniform profiles from the top to the bottom as more layers are added. Selective removal processes can remove targeted materials in vertical and horizontal structures without damage or residue throughout the stack.

For logic/foundry, the introduction of the 10nm process node in volume manufacturing brings significant growth in the number of patterning steps. This trend will increase even more for 7nm and below designs. Patterning these advanced nodes requires innovative etch capabilities to deliver feature-scale uniformity with low line edge roughness. Selective processes and alternative manufacturing schemes will also be needed as the industry seeks solutions for layer-to-layer vertical alignment. We expect this to result in a two-fold increase in the number of materials to be deposited and removed.

Finally, the industry will continue to adopt new and improved packaging schemes for enabling increased device performance, lower power consumption and to deliver desired form factors. In 2016, we saw the volume adoption of Fan-Out packaging in mobile devices and this trend is expected to grow further in 2017. The high performance computing segment will pursue 2.5D interposer and/or 3D TSV packaging schemes for higher memory bandwidth, lower latency and better power efficiency.

Applied Materials is focused on delivering game-changing selective process technologies and materials innovations to help solve the industry’s toughest challenges.

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Following economic leaders meeting in Switzerland for the World Economic Forum, electronics manufacturing executives will attend Europe’s SEMI Industry Strategy Symposium (ISS Europe) in Munich, Germany on 5-7 March. Hosted by SEMI Europe, the Symposium brings together leading analysts, researchers, economists, and technologists for critical insights on the forces shaping the electronics manufacturing supply chain. ISS Europe 2017 is the three-day flagship business event that discusses how to cope with the rapid changes and growing challenges of the digital revolution.

“ISS Europe is the leading European strategic platform where industry thought leaders across the electronics manufacturing value chain share the latest analysis and outlooks.  The conference covers global industry trends and challenges and opportunities from innovation, materials, design, and manufacturing – with a focus on end-applications in automotive, health care and smart manufacturing,” said Laith Altimime, president, SEMI Europe.

Twenty industry leaders will present insights into the current market developments in automotive, smart manufacturing, and health, including:

  • TSMC Europe: Maria Marced, president, High Performance Applications to Drive Innovation and Collaboration
  • Mentor Graphics: Wally Rhines, CEO, Semiconductor Consolidation versus Specialization: What’s the Driving Force for Mergers?
  • AUDI AG: Berthold Hellenthal, Robust Design / Komponentenerprobung Elektronik, Cross-Industry Collaboration Networks Accelerate Innovations
  • Dresden University Hospital: Christopher Piorkowski, professor at the Heart Center, Digital Health in Cardiovascular Medicine: Patients, Sensors, and Clinical Care
  • Bosch: Birte Lübbert, senior VP, Smart Manufacturing by Bosch in Reutlingen Plant 2
  • Imec: Ann Stegen, executive VP, Transformation into a 7nm Logic Node Solution with Fundamental Advantages

Join Europe’s strategic thinkers and business drivers at ISS Europe 2017 in Munich (Germany) from March 5-7, 2017!  Register here. For more information visit: www.semi.org/eu/iss-europe-2017

STATS ChipPAC Pte. Ltd., a provider of advanced semiconductor packaging and test services, announced today that it has been ranked among the world’s top 10 semiconductor equipment manufacturing companies in the 2016 Patent Power Scorecards published by the Institute of Electrical and Electronics Engineers (IEEE), the world’s largest professional association for the advancement of technology. This is the seventh consecutive year that STATS ChipPAC has been recognized in the annual scorecards.

The 2016 Patent Power Scorecards are based on objective, quantitative benchmarking of U.S. Patent and Trademark Office records by 1790 Analytics, an Intellectual Property (IP) evaluation firm. The patent portfolios of more than 6,500 leading commercial enterprises, academic institutions, nonprofit organizations, and government agencies worldwide were reviewed through the end of 2015.  The scorecards rate the most valuable IP portfolios based on several factors including the size of an organization’s patent portfolio, quality, impact, originality and general applicability.

STATS ChipPAC was ranked eighth in the Semiconductor Equipment Manufacturing scorecard, the highest ranking received by an Outsourced Semiconductor Assembly and Test (OSAT) provider for the year. As of the end of 2015, STATS ChipPAC had been granted more than 1,500 patents by the U.S. Patent and Trademark Office (USPTO). STATS ChipPAC has been the leading U.S. patent holder among OSAT providers worldwide since 2011 and has built up a patent portfolio in which advanced or future technologies comprise more than 65% of its IP, significantly higher than other OSATs in the industry.

“Year after year we have continued to focus on technology innovation and prioritized our investments in key areas such as wafer level packaging, flip chip interconnection, System-in-Package (SiP), 2.5D and 3D integration. By driving technology development in these areas, we are able to provide innovative integration solutions that enable our customers to differentiate their products in the marketplace,” said Shim Il Kwon, Chief Technology Officer, STATS ChipPAC. “With the combined strength of the JCET Group, we offer our customers an IP portfolio that is unmatched in the OSAT industry.”

At the 2017 European 3D Summit in Grenoble (France, Jan 23-25), research and innovation hub for nano-electronics and digital technology imec and supplier of wafer-bonding equipment EV Group (EVG) announce an extension to their successful collaboration, achieving excellent wafer-to-wafer overlay accuracy results in both hybrid bonding and dielectric bonding. Expanding this collaboration, EVG will become a partner in imec’s 3D integration program through a joint development agreement to further improve overlay accuracy in wafer-to-wafer bonding.

Wafer-to-wafer bonding is a promising technique for enabling high-density integration of future ICs through three-dimensional (3D) integration. This is achieved by aligning top and bottom wafers that are then bonded, thus creating a stacked IC. An important advantage is that wafers/ICs with different technologies can be stacked, e.g. memory and processor ICs.

Many of the alignment techniques and bonding methods for 3D integration have evolved from microelectromechanical system (MEMS) fabrication methods. The fundamental difference between MEMS and 3D integration is that the alignment or overlay accuracy has to be improved by 5–10 times. Accurate overlay is needed to align the bonding pads of the stacked wafers and it is essential to achieving a high yield with wafer-to-wafer bonding. Imec and EVG have realized excellent results on overlay accuracy.

Firstly, the hybrid (via-middle) wafer-to-wafer bonding technique was improved by using EVG’s high quality bonding system with integration definition of bonding pads, resulting in a high yield and a 1.8µm pitch, which is significantly better compared to recently published results at recognized conferences such as ECTC and 3DIC reporting 3.6µm pad size,.

Secondly, the dielectric (via-last) wafer-to-wafer bonding technique was tackled. This technique requires extremely good overlay accuracy to align the copper pads from both wafers, which are then contacted by through-silicon vias (TSVs). In this case, 300nm overlay across the wafer was achieved.

“By joining forces, we achieved these excellent results on overlay accuracy,” explains Eric Beyne, fellow at imec. “We are excited that we can expand our collaboration with EVG with a JDP and the installation of EVG’s GEMINI FB XT wafer bonder in our cleanroom. The GEMINI FB XT has the potential to further reduce the wafer-to-wafer overlay errors and therefore allow for the development of sub-micron wafer-to-wafer interconnects technologies.”

“Further improving the overlay accuracy for wafer-to-wafer bonding into the sub-200nm range requires optimization of the interaction between the wafer bonding tool and processes as well as pre-and post-processing and the wafer material,” explains Markus Wimplinger, corporate technology development & IP director at EVG. “We are excited to partner with imec in an effort to advance overlay accuracies for wafer-to-wafer bonding to meet the needs of future 3D IC designs that rely on high density interconnects”

Imec’s 3D integration program explores technology options to define innovative solutions for cost-effective realization of 3D interconnect with TSVs. Imec’s 3D integration processes are completely executed on 300mm. Imec also explores 3D design to propose methodologies for critical design issues, enabling effective use of 3D interconnection on system level.

imec wafer to wafer

Analog Devices, Inc. (NASDAQ: ADI), a developer of high-performance semiconductors for signal processing applications, today announced that Mark M. Little, former Senior Vice President, GE Global Research and Chief Technology Officer of General Electric Company, has been elected as a Director of the Company, and that the Board of Directors of the Company intends to elect Robert H. Swanson, Executive Chairman of Linear Technology Corporation, as a Director following the closing of the Company’s acquisition of Linear Technology Corporation. Richard Beyer and John Hodgson will retire from the Company’s Board of Directors, effective as of the Company’s 2017 Annual Meeting of Shareholders.

“We are very grateful to Rich and John for their years of dedicated service to ADI, and for their wise counsel as members of our Board,” said Ray Stata, ADI Chairman of the Board. “We are pleased to welcome Mark Little as a new Director, and we are also looking forward to Bob Swanson joining the Board following our acquisition of Linear Technology Corporation.”

Dr. Little is the former Senior Vice President, GE Global Research and Chief Technology Officer of General Electric Company, a global digital industrial company. Dr. Little joined GE in 1978, and during his 37-year tenure, held management positions in engineering and business, culminating with his most recent position, which he held from 2005 to 2015. In addition to his technology leadership, Dr. Little led several multi-billion dollar business units at GE including GE Energy’s power-generation segment. Dr. Little holds bachelor’s and master’s degrees in mechanical engineering from Tufts and Northeastern universities, respectively, and a Ph.D. in mechanical engineering from Rensselaer Polytechnic Institute.

Mr. Swanson, a founder of Linear Technology, has served as Executive Chairman of the Linear Technology board of directors since January 2005. Prior to that time, he served as Chairman and Chief Executive Officer of Linear Technology since its incorporation in 1981. Mr. Swanson has a B.S. degree in Industrial Engineering from Northeastern University.

On July 26, 2016, ADI and Linear Technology entered into an agreement and plan of merger that provides for the acquisition of Linear Technology by the Company. The Company and Linear Technology currently expect the acquisition to be completed by the end of the Company’s second fiscal quarter of 2017, subject to receipt of the remaining required regulatory approvals and subject to the satisfaction or waiver of the other conditions contained in the merger agreement. The Board of Directors of the Company intends to elect Mr. Swanson to the Board at the later of the completion of the acquisition or the Board of Directors meeting following the Company’s 2017 Annual Meeting of Shareholders, currently anticipated to be held on March 8, 2017.