Category Archives: Wafer Level Packaging

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing and design, announced that worldwide sales of semiconductors reached $23.48 billion for the month of March 2013, an increase of 1.1 percent from the previous month when sales were $23.23 billion. Global sales for March 2013 were 0.9 percent higher than the March 2012 total of $23.28 billion, and total sales through the first quarter of 2013 were 0.9 percent higher than sales from the first quarter of 2012. All monthly sales numbers represent a three-month moving average.  

“Through the first quarter of 2013, the global semiconductor industry has seen modest but consistent growth compared to last year,” said Brian Toohey, president and CEO, Semiconductor Industry Association. “Sales have increased across most end product categories, with memory showing the strongest growth. With recent indications that companies could be set to replenish inventories, we are hopeful that growth will continue in the months ahead. Regionally, the Americas slipped slightly in March after a strong start to the year, but Asia Pacific and Europe have seen impressive growth recently.” 

Year-over-year sales increased in Asia Pacific (6.9 percent) and Europe (0.7 percent), but decreased slightly in the Americas (-1.5 percent) and sharply in Japan (-18 percent), reflecting in part the devaluation of the Japanese yen. Sales in Europe increased by 5.7 percent compared to the previous month, the region’s largest sequential monthly increase since March 2010.  Sales also increased from the previous month in Asia Pacific (1.7 percent), but fell in Japan (-1.6 percent) and the Americas (-1.9 percent).

Silex Microsystems, the world’s largest pure-play MEMS foundry, today announced that it has joined an international European Union-funded program aimed at developing a new MEMS manufacturing platform based on advanced inkjet-based printing technologies. The program, “Processes for MEMS by Inkjet Enhanced Technologies,” or PROMINENT, is leveraging the proven benefits of inkjet technologies to enable higher manufacturing efficiencies, increased product innovation, faster time-to-market, and lower costs throughout the entire MEMS manufacturing process. Silex’s contributions in this effort will include new low-cost technologies for through-wafer vias, hermetic high-vacuum seals for wafer-to-wafer bonding including advanced material deposition, advances in piezo-MEMS fabrication, and other functional materials processing.

As an innovation-driven industry, MEMS manufacturing depends on continuous innovation and exploitation of new technologies such as ink-jet processes. Ink-jet technology is one of the most mature MEMS technologies, having been in production since the late ‘70s and a mainstream of the digital printing industry since the early ‘80s. Similar to the impact that inkjet printing has had on the printing industry, the technology offers the promise of direct-to-wafer digitally-based patterning of wafer processing which can allow highly flexible prototyping and low-volume production for MEMS devices. In addition, advances in materials, electronics, and thin film compounds in recent years have opened up new avenues to apply ink-jet techniques to traditional manufacturing challenges such as metallization patterning using metallized inks. PROMINENT has been formed to exploit these new techniques and to advance the competitiveness of the European technology community.

“As a key partner in the PROMINENT project, Silex brings its extensive experience in metal TSVs and wafer bonding which will help end-users, partners in the consortium, and future customers advance the use of inkjet technologies for production purposes,” says Dr. Thorbjörn Ebefors, chief technologist at Silex Microsystems. “These new technologies have the potential to reduce costs and speed development time of new MEMS products, at no loss of performance for the customer.”

“Printed electronics have recently achieved considerable progress due to new printing technologies and the introduction of nanoparticle inks, paving the way towards integrating these capabilities within silicon-based nanoelectronics,” says Dr. Markku Tilli of Okmetic Oyj, PROMINENT project coordinator.  “The objective of the ENIAC JU project PROMINENT is to demonstrate significant cost reduction in MEMS manufacturing by using printing technologies to reduce materials, chemicals and energy consumption, waste water production, processing cycle time and capital investments.”

PROMINENT will develop novel low-cost, digitally controlled additive manufacturing methods that can radically change the manufacturing methods for MEMS and bring a substantial competitive edge to the European MEMS industry. The objective is not to replace the whole MEMS manufacturing process, but rather to introduce a new way of making its selected steps flow in a different, more flexible and cost-efficient way using methods developed in the printed electronics field.

By using maskless, digitally controlled, localized additive processes instead of the subtractive processes currently in use, selected steps in MEMS manufacturing can be done with a simplified process sequence. This will result in:

  • Lower initial investment costs for a MEMS line, making it easier for manufacturers to introduce new products.
  • New features in the MEMS devices, new application areas.
  • Greatly increased flexibility in production, allowing for smaller batches, mass customization and fast changes in the production process.
  • Increased flexibility, easier prototyping and shorter time-to-market for new MEMS devices.
  • Greatly reduced production costs and environmental impact.

Silex TSV and wafer-bonding

MOSIS, a provider of low-cost prototyping and small volume production services for custom ICs, has teamed up with imec, Ireland’s Tyndall National Institute and ePIXfab, the European Silicon Photonics support center providing low-cost prototyping services for photonic ICs. The partnership gives MOSIS’ customers access to imec’s state-of-the-art fully integrated silicon photonics processes and Tyndall’s advanced silicon photonics packaging technology.

Packaged passive silicon photonics chip, showing imec’s silicon photonic chip andTyndall’s fiber array packaging.

Imec’s silicon photonics platform enables cost-effective R&D of silicon photonic ICs for high-performance optical transceivers (25Gb/s and beyond) for telecom, datacom, and optical sensing for life science applications. The offered integrated components include low-loss waveguides, efficient grating couplers, high-speed silicon electro-optic modulators and high-speed germanium waveguide photo-detectors. A comprehensive design kit to access imec technologies will be provided. Moreover, the Tyndall National Institute, being a partner of ePIXfab, offers the ability to provide packaged silicon photonics devices. This includes the design and fabrication of custom photonic packages, fiber coupling (single and arrays) and electrical interconnects. Design rules to support these packaging capabilities will also be provided.

“Imec’s Silicon Photonics platform provides robust performance, and solutions to integrated photonics products. Companies can benefit from imec silicon photonics capability through established standard cells, or explore the functionality of their own designs in MultiProject Wafer runs,” stated Philippe Absil, program director at imec. “With this collaboration, MOSIS will offer its first access to a mature Silicon Photonics infrastructure, with the option for follow-on production,” added Wes Hansford, MOSIS Director.

The first ePIXfab-Europractice run for passive silicon photonics ICs is open for registration from June 2013 with design deadline September 9th 2013. MOSIS’ customers can register for this run and obtain the design kit via MOSIS in June 2013.

Imec’s Si Photonics 200mm wafer platform includes:

  • Tight within-wafer silicon thickness variation 3sigma < 2.5nm
  • 3-level patterning of 220nm top Si layer (193nm optical lithography)
  • poly-Si overlay and patterning (193nm optical lithography)
  • 3-level n-type implants and 3-level p-type implants in Si
  • Ge epitaxial growth on Si and p-type and n-type implants in Ge
  • Local NiSi contacts, Tungsten vias and Cu metal interconnects
  • Al bond pads
  • Validated cell library with fiber couplers, polarization rotators, highly efficient carrier depletion modulators and ultra-compact Ge waveguide photo-detectors with low dark current.
  • Design kit support for IPKISS framework, PhoeniX Software and Mentor Graphics software

Tyndall’s Si Photonics Packaging Technology enables:

  • Passive device packaging, single and multi-fiber arrays to grating couplers
  • Active device packaging, modulators and detectors with electrical ports and fiber arrays
  • Custom packaging requirements (mechanical, thermal stability etc.)

EI


May 2, 2013

Endicott Interconnect Technologies, Inc. (EI) announced that its System-In-Package (SiP) technology performed successfully as a key subsystem of Lockheed Martin’s Extended Area Protection and Survivability (EAPS) Program during a test on March 22 at White Sands Missile Range, N.M. EI’s technology acts as the command center of a very small hit-to-kill interceptor designed to defeat rocket, artillery and mortar attacks.  

El

The worldwide semiconductor assembly and test services (SATS) market totaled $24.5 billion in 2012, a 2.1 percent increase from 2011, according to final results from Gartner, Inc.

"After experiencing relatively mild 1.8 percent growth in 2011, the SATS market remained in a slow-growth mode for 2012," said Jim Walker, research vice president at Gartner. "Weakness in the PC market, which started in 2011 and carried into 2012, and lower overall consumer demand were contributors to the slow growth. This weak demand for semiconductor devices resulted in inventory buildup for much of the year."

ASE remained No. 1, with revenue of $4.4 billion (see Table). Packaging accounted for 80.5 percent of the company’s total assembly/test/materials (ATM) revenue. As the No. 2 vendor, Amkor Technologies’ 2012 total revenue was down slightly (0.6 percent), at $2.8 billion, due partially to the aggressive strategy in the copper wire-bonding transition by ASE, SPIL and others. Third-place SPIL was able to achieve revenue of $2.2 billion, with 90 percent of the revenue from packaging and 10 percent from test. At No. 4, STATS ChipPAC is the last of the top four broad-based package supplier companies in Gartner’s top five. In the fifth spot, Powertech Technology (PTI) is differentiated from the others in that the majority of its revenue comes from servicing the memory segment of the semiconductor market.

Another factor for the slow growth in the market in 2012 was the overinvestment in both SATS and integrated device manufacturer (IDM) packaging capacity in 2010 and 2011. This oversupply of both advanced and traditional packaging capability by many device makers created a weaker pricing environment for outsourcing services in 2012 and left the industry in an oversupply condition with lower factory utilization.

Nevertheless, even in this slow-growth environment, the SATS market saw the continuation of the rapid transition from gold to copper wire bonding, resulting in lower-cost packaging processes. It was also a year in which flip-chip and wafer-level packaging (WLP) technologies continued to be an increasing part of the revenue contribution for the top companies in the SATS market.

Additional information is provided in the Gartner report "Market Share Analysis: Semiconductor Assembly and Test Services, Worldwide, 2012." 

Amkor Technology, Inc. today announced that Stephen D. Kelley has been appointed to serve as president and chief executive officer and as a director of the company, effective May 8, 2013. Kelley succeeds Ken Joyce, who previously announced his intention to retire. Kelley’s appointment follows a comprehensive, six month search process conducted by the Board of Directors with the professional assistance of a global executive recruiting firm.

 “We have been investing significant resources in the key packaging and test technologies that support the rapidly growing market for smartphones and tablets, and today we are well-positioned to take advantage of significant growth opportunities in mobile communications and our other end markets,” said James J. Kim, Amkor’s executive chairman of the board of directors. “Steve Kelley has a wealth of experience helping major global semiconductor companies grow revenues and increase profitability. With his strong record of success, deep customer knowledge and great drive, Steve is the ideal CEO to lead Amkor.”

Most recently, Kelley served as chief executive officer of Scio Diamond Technology Corporation, an industrial diamond technology company, and as a senior advisor to Advanced Technology Investment Company, the Abu Dhabi-sponsored investment company that owns GLOBALFOUNDRIES, a full service semiconductor foundry. Kelley, 50, has more than 25 years of experience in the global semiconductor industry, including as executive vice president and chief operating officer of Cree, Inc. from 2008 to 2011, as vice president/general manager of display, standard logic, linear and military businesses at Texas Instruments, Inc. from 2003 to 2008, in various positions with Philips Semiconductors from 1993 to 2003 including senior vice president and general manager, and in various positions with National Semiconductor Corporation and Motorola Semiconductor. Kelley holds a B.S. in chemical engineering from Massachusetts Institute of Technology and a J.D. from Santa Clara University.

“I’m very excited to join the Amkor team,” said Kelley. “Throughout its history, Amkor has been a pioneer and technology leader, and I look forward to the opportunity to build on that success.”

Kim also commented on the retirement of Joyce.

“Ken has had a remarkable career, including over 15 years of service to Amkor,” he said. “Today, Amkor is well-positioned for success with industry-leading technology in our key end markets, and the entire Board of Directors joins me in thanking Ken for helping to lead us here. We are fortunate that Ken has agreed to be available to work with Steve over the coming months to ensure a smooth transition.”

Amkor is a leading provider of semiconductor packaging and test services to semiconductor companies and electronics OEMs.

North America-based manufacturers of semiconductor equipment posted $1.14 billion in orders worldwide in March 2013 (three-month average basis) and a book-to-bill ratio of 1.14, according to the March Book-to-Bill Report published today by SEMI.  A book-to-bill of 1.14 means that $114 worth of orders were received for every $100 of product billed for the month.

The three-month average of worldwide bookings in March 2013 was $1.14 billion. The bookings figure is 5.9 percent higher than the final February 2013 level of $1.07 billion, and is 21.3  percent lower than the March 2012 order level of $1.45 billion.

The three-month average of worldwide billings in March 2013 was $1.00 billion. The billings figure is 2.8 percent higher than the final February 2013 level of $974.7 million, and is 22.2   percent lower than the March 2012 billings level of $1.29 billion.

“Continued improvement in three-month average bookings for new semiconductor manufacturing equipment is reflected in the March figures, which indicate a 23 percent improvement over the prior quarter," said Denny McGuirk, president and CEO of SEMI.  “While the overall expansion of new manufacturing capacity remains muted, we see continued investment in technology upgrades by the world’s chip makers.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

  Billings
(3-mo. avg)		 Bookings
(3-mo. avg)		 Book-to-Bill
October 2012 985.5 742.8 0.75
November 2012 910.1 718.6 0.79
December 2012 1,006.1 927.4 0.92
January 2013 968.0 1,076.0 1.11
February 2013 (final) 974.7 1,073.5 1.10
March 2013 (prelim) 1,001.6 1,137.1 1.14

The data contained in SEMI’s release were compiled by David Powell, Inc., an independent financial services firm, without audit, from data submitted directly by the participants. SEMI and David Powell, Inc. assume no responsibility for the accuracy of the underlying data.

SEMI is the global industry association serving the nano- and micro-electronic manufacturing supply chains.

Glass is everywhere: from MEMS, CMOS image sensors and power to memory, logic IC and microfluidics

Glass is widely used in everyday life and found in large quantities in many industries, such as flat panel display applications. Over the last few years, glass has gained considerable interest from the semiconductor industry due to its very attractive electrical, physical and chemical properties, as well as its prospects for a relevant and cost-efficient solution. The application scope of glass substrates in the semiconductor field is broad and highly diversified.

The demand for glass is growing, and glass has already been adapted for various and unique wafer-processing functionalities and platforms supporting a wide range of end-applications. For example, WLCapping is driven mainly by MEMS and CMOS image sensors. In the coming years, the availability of other glass functionalities such as 3D TGV/2.5 D interposer in conjunction with end-applications like memory and logic IC will be the driving force for growth, creating new challenges and new technical developments along the way.

Mainly driven by the wafer-level packaging industry, the glass wafer market is expected to grow from $158 million in 2012 to $1.3B by 2018, at a CAGR of ~41 percent over the next five years

“Initially driven by CMOS image sensor and MEMS applications, this growing industry will be supported by relevant end-applications such as LED, memory and logic IC, where glass is on its way to being commercialized. In terms of wafers shipped, a 4x glass wafer growth is expected in the semiconductor industry over the next five years, achieving more than 15 million 8 inch equivalent wafer starts per year by 2018,” explains Amandine Pizzagalli, market and technology analyst, Equipment & Materials Manufacturing, at Yole Développement.

Glass substrate: a key enabler of various functionalities in the semiconductor field

The glass WLCapping platform is a mature functionality already adopted with significant volume in CMOS Image Sensors, where more than 3.3 million glass caps were shipped in 2012. This market is expected to grow slowly, with a CAGR of 14 percent from 2012-2018, mainly supported by MEMS devices impacted by the request for further miniaturization. On the flip side, the glass market for WLOptics will likely decline from 2015-2018 due to the development of competing technologies.

All of this said, we expect to see strong growth in the glass market, mainly supported by two emerging WLP platforms: with a CAGR of 110 percent and 70 percent respectively, the glass-type 2.5D interposer emerging platform and the carrier wafer will be glass’s fastest-growing fields over the next five years, since glass offers the best value proposition in terms of cost, flexibility, mechanical rigidity and surface flatness.

If glass is qualified for 2.5D interposer functionality, the glass market could exceed $1B revenue by 2018. However, it’s still unclear how BEOL wafer fabs will choose glass over the current silicon technology used for logic IC applications (for the 2.5D/3D SOC and system partitioning areas), but the glass variety of 2.5D interposer substrates is expected to significantly impact future glass wafer demand, and it’s obvious that the 2.5D glass interposer will attract many newcomers.

The use of glass interposers in packaging will certainly be on the HVM roadmap within a few years.

glass wafer market

Glass substrate: The top five players hold almost 80 percent of the market

In the semiconductor industry, the glass substrate market is split amongst five main suppliers. Schott (G), Tecnisco (JP), PlanOptik (G), Bullen (US) and Corning (US) will share more than 70 percent $158M glass substrate market this year, driven mainly by demand for WLCapping.

In the midst of this growing market, semiconductor glass suppliers are trying to differentiate themselves by proposing a variety of glass substrate material properties with a good CTE, solid thermal properties and no polishing/grinding steps required, which would result in reduced costs.

Many glass substrate suppliers such as AGC, Corning and HOYA are expected to increase their business in the next few years since they are quite aggressive in 2.5D interposers and glass carrier wafers, and are expected to ramp-up into high volume production. Since the big players are already deeply entrenched in the glass market, it will be very challenging for a new entrant to break through in the foreseeable future.

Increased spending in NAND and flash by Micron, LEDs by Philips and Osram, and continued investments by GLOBALFOUNDRIES will create new opportunities for equipment and materials suppliers in Southeast Asia. These trends will be explored at the upcoming SEMICON Singapore 2013, which will take place May 7-9 at the Marina Bay Sands Expo and Convention Center. With a focus on new technologies and products for advanced IC packaging, test, and fab efficiency, as well as in new application areas including LEDs and MEMS, the event capitalizes on Southeast Asia’s strong contribution to the global semiconductor market.

For the Southeast Asia region, capital equipment investment will see some pickup in the second half of 2013, followed by a strong recovery in 2014. Overall front-end fab equipment spending is expected to double next year from $810 million in 2013 to $1.62 billion in 2014. Foundry and memory are the two major sectors that invest most in the region. The GLOBALFOUNDRIES expansion plan at Fab 7 will be completed by mid-2014 while UMC continues to upgrade their Fab 12i capacity to 40nm process.

The Southeast Asia region’s capacity growth for front-end fabs shows two percent increase this year and an expectation of  higher growth, eight percent, in 2014, exceeding overall global capacity growth of five percent according to the SEMI World Fab Forecast.  The growth will mainly be driven by memory sector, specifically from NAND flash capacity as Micron gears up for further expansion at its Singapore NAND flash facility next year plus ongoing capacity conversion from DRAM to NAND flash at Fab 7 (Tech). Singapore is emerging to become the third largest NAND flash manufacturing country in the world by the end of 2014.  The conversion and the expansion projects will drive related semiconductor investment in the region in 2013 and 2014.     

For the assembly and test sector, Southeast Asia has long been the focal point of the industry with a large installed capacity from both IDMs and OSATs.  This position contributes to the region being the largest packaging materials consumption market in the world, representing a market size of $6.6 billion in 2013 and $6.8 billion in 2014. The region’s back-end equipment investment remain significant with over $1 billion spending each year throughout 2012 to 2014, accounting for about 17 percent of worldwide share according to SEMI’s WWSEMS.

Aside from manufacturing capacity, Southeast Asia region is now extending its value proposition to IC design and R&D areas with more joint development projects between multi-national corporations (MNC) and local institutes. SEMI expects to see a more robust semiconductor ecosystem arise from the region as a result of these endeavors and as companies seek ready access to customers throughout Asia-Pacific and South Asia.

Currently, Singapore has 14 wafer fabrication plants, including the world’s top three wafer foundries.  Singapore also has 20 semiconductor assembly and test operations, including three of the world’s top six outsourced assembly and test companies. There are about 40 IC design centers, which comprise nine of the world’s “top 10” fabless IC design companies.

SEMICON Singapore, in its 20th year, will feature over 40 programs and forums to highlight the industry’s major technology trends, and investment and expansion opportunities in manufacturing.  Forum themes include: Market Trends Briefing, Lithography Technology, Assembly Packaging Technology, 2.5D/3D-IC, LED Manufacturing Technology, Product Test, and MEMS.  Attendees can save up to 30 percent on programs by registering before April 15.

Other special programs include a job fair, a SEMICON University Program, and both an OEM Sourcing Program ad a Suppliers Search Program. These programs demonstrate SEMI Singapore’s commitment to connecting the global semiconductor manufacturers to Singapore-based resources and professions.

The Temescal Division of Ferrotec Corporation, a global supplier of materials, components, and precision system solutions and a manufacturer of electron beam evaporation systems, today announced the Temescal UEFC-5700, a ultra-high efficiency electron beam metallization system for lift-off compound semiconductor applications. The UEFC-5700 is the first Temescal system to incorporate the Auratus Deposition Process Enhancement Methodology, offering near-perfect uniformity while delivering up to 40 percent increases in material collection efficiency, resulting in significant cost savings on process materials like gold and platinum compared to traditional box coaters.

The Temescal UEFC-5700 is designed for compound semiconductor production environments that use lift-off electron beam evaporation processes. The UEFC-5700 features a unique conical shaped vacuum chamber that reduces volume and surface area, significantly reducing pump-down time. The system also features a patent-pending High-Uniformity Lift-off Assembly (HULA) design that uses a dual-axis motion to optimize collection efficiency.

"With the UEFC-5700, we have significantly improved the throughput efficiency of traditional lift-off coating processes. From the unique chamber design to the HULA carrier system, the UEFC-5700 improves pumping and batch capacity with excellent uniformity across all evaporated materials, enabling the system to run more wafers and more batches per day than any conventional box coater," said Gregg Wallace, managing director of Ferrotec’s Temescal division. "The biggest benefit to users of this system is the improvement in uniformity and collection efficiency of all materials being evaporated. For IDMs and foundries, this equates to improved yields of better devices that cost much less to produce. "

The Temescal UEFC-5700 offers increased wafer production capacity, up to forty-two 150mm wafers in a batch, without a significant change in raw material or energy consumption. In terms of footprint and power consumption, the UEFC-5700 is virtually identical to the FC-4400 system, Temescal’s largest production system.

With its unique conical shaped load-locked chamber and 44,000 liters/second of installed cryogenic pumping capacity, the UEFC-5700 reaches process pressures significantly faster than most conventional box coaters. Systems have reached 5E-07 Torr in under 10 minutes, improving production cycle times and the number of batches that can be run per shift or day.

The system incorporates Temescal’s Auratus deposition process enhancement methodology. Auratus is a patent-pending proprietary optimization methodology for lift-off electron beam evaporative coating that incorporates patent pending technology to achieve unprecedented levels of uniformity, precision, and collection efficiency.

electron beam metallization system