Category Archives: Wafer Level Packaging

August 29, 2012 – STATS ChipPAC, Fremont, CA, says it has expanded its through-silicon via (TSV) capabilities by qualifying a 300mm mid-end manufacturing operation and transition to low-volume manufacturing.

STATS ChipPAC was one of the first outsourced semiconductor assembly and test (OSAT) providers to invest in through-silicon via (TSV) technology for back-end-of-line (BEOL) semiconductor manufacturing, specifically 2.5D (silicon interposers) and 3D TSV on 200mm wafers, with chip/chip and chip/wafer assembly using stealth dicing and fine-pitch microbump bonding down to 40μm. A year ago the company began expanding into TSVs for 300mm mid-end-of-line (MEOL) processing capabilities, steps that occur between wafer fabrication and back-end assembly. These include microbump technology down to 40μm, temporary bond/de-bonding, backside via reveal, isolation, and metallization.

"During the implementation phase of our mid-end TSV operation, we investigated multiple process options and identified key cost variables that would affect the commercialization of this technology," said Dr. Han Byung Joon, STATS ChipPAC’s EVP and CTO. "We now have mid-end manufacturing capacity in place in Singapore and are actively engaged with multiple strategic customers on the production qualification of 2.5D and 3D packaging designs."

The company says it is "firmly engaged with multiple strategic customers" in TSV development programs. Current 3D TSV development and customer qualification activities include devices at the 28nm silicon node, application processors and graphic processors utilizing TSV to match the needs of higher-bandwidth applications for the mobile market.

(Image via Stats ChipPAC)

Hesse & Knipps, Inc., the Americas subsidiary of Hesse & Knipps Semiconductor Equipment GmbH, added the HBK08 Loop Former Bondhead to its BONDJET BJ935 and BONDJET BJ939 fully automatic heavy wire bonders. It is designed to support growing requirements for high density module bonding, enabling extremely long wire loops, special wire loop formations and minimal wire distances for fine pitch bonding in addition to multi-stitch bonding. 

The HBK08 Loop Former Bondhead enables the formation of loops or wire bridges with lengths up to 40mm and low loop heights with considerably higher wire stability than previously possible on any heavy wire bonder. A controlled bend induced into the wire by the loop former of the bondhead during the loop trajectory within <50 ms creates a considerably steeper loop fall in the back part of the wire bridge compared to conventional loop forms. With this loop formation, the distance of the wire bridge to the neighboring live circuit paths can be increased, creating a positive influence on the design rules of power modules.

Fine pitch heavy wire bonding – for example 600 µm pitch for 400 µm wire – requires a significantly smaller wire guide. The HBK08 Bondhead incorporates a symmetrical (closed) wire guide with a 70° guide angle to implement considerably larger loops with minimal distances.

Other key features of the HBK08 Bondhead include:

•  Boxlight – a coaxial illumination source attached directly to the bondhead minimizes the distance to the object being illuminated, allowing homogenous illumination of highly reflective surfaces up to a 5° tilt.

•  Slim “Wire” Cutter – a specialized wire cutter developed for fine pitch heavy wire bonding incorporates a considerably steeper front-cut angle.

•   Air “Wire” Cut – this feature enables "touch-free" wire cutting that eliminates surface touchdown, enabling the use of front-cut on highly sensitive chip surfaces.

•   3 Mil Wire Capability – Addressing the worldwide increase in demand for 3 mil wire, the new bondhead processes gold, aluminum and copper bonding wire with diameters from as small as 3 mil up to 20 mil (75 μm up to 500 μm).

Hesse & Knipps will demonstrate the new features available on the BJ935 Fully Automatic Heavy Wire Bonder at the upcoming 45th International Symposium on Microelectronics (IMAPS) in Booth No. 210. IMAPS 2012 is scheduled for September 9 – 13, 2012 at the San Diego Town & Country Convention Center in San Diego, California, USA.

August 27, 2012 – Microsemi has a new die packaging technology with a 75% smaller footprint vs. current implantable radio modules, for implantable medical devices such as pacemakers and cardiac defibrillators.

The company says its new die packaging technology has passed an internal qualification regime typical for active implantable medical devices consisting of thermal and mechanical stressing to MIL-STD-883 test standards, such as pacemakers and cardiac defibrillators. It can also be used in wearable devices such as hearing aids and intelligent patches, as well as nerve stimulators and drug delivery products.

The new internal die packaging technology continues a drive to develop miniaturized wireless medical products — it can be paired with Microsemi‘s ultralow-power ZL70102 radio to enable wireless healthcare monitoring, noted Martin McHugh, business and technology development manager of advanced packaging for Microsemi. Smaller and lighter-weight wireless medical devices will enable less invasive medical procedures and lower healthcare costs; for patients it means faster recovery times, greater mobility, and improved comfort.

"Moving forward, we plan to apply our size-reduction techniques and radio technologies to other markets such as smart sensing and applications where size and weight are critical success factors," McHugh added.

Visit the Advanced Packaging Channel of Solid State Technology, and sign up for our Advanced Packaging News e-newsletter!

August 21, 2012 — Heptagon, wafer-level optics maker, ordered an advanced DWL 2000 maskless lithography system from Heidelberg Instruments. The tool has sophisticated Gray Scale Exposure capability. 

Heptagon will use the system for production of micro optical components for applications in smart phones, mobile devices, gaming consoles, telecoms equipment and supercomputers.

“Gray Scale lithography technology can produce complicated, random, and smoothly or discontinuously contoured material surfaces with a variety of applications in modern optical systems. This order is a significant step to solidify our position as a global leader in production of direct write systems for applications in Gray Scale Lithography,” said Alexander Forozan, head of global sales and business development, Heidelberg Instruments

Heptagon is a developer and manufacturer of advanced micro-optics solutions, making wafer-level micro optics in large volumes for sophisticated applications in smart phones, mobile devices, gaming consoles, telecoms equipment and supercomputers.  

Heidelberg Instruments GmbH produces high-precision maskless lithography systems for direct writing and photomask production in the areas of MEMS, BioMEMS, Nano Technology, ASICS, TFT, Plasma Displays, Micro Optics, and many other related applications. Internet: www.himt.de.

Visit the MEMS Channel of Solid State Technology, and subscribe to our MEMS Direct e-newsletter!

August 21, 2012 – BUSINESS WIRE — Tessera Technologies, Inc. (NASDAQ:TSRA) received an initial payment of approximately $20 million from semiconductor packaging company Amkor Technology Inc. to Tessera, Inc., related to the interim award the International Court of Arbitration of the International Chamber of Commerce (ICC) issued on July 6, 2012, in favor of Tessera, Inc. in its dispute with Amkor.

"As previously announced, we intend to seek an amount in excess of $125 million in connection with the ICC’s interim award," stated Richard Chernicoff, president of Tessera Intellectual Property Corp., adding that his company will

August 17, 2012 — Deca Technologies, wafer-level packaging (WLP) services to the semiconductor industry, added Iain Meikle its executive management team, as VP of operations and managing director in the Philippines.

Also read: Flooding in the Philippines threatens microelectronics facilities

Meikle joins Deca from Carsem, a semiconductor packaging and test services provider, where he was VP of manufacturing for Malaysia and China. He has almost three decades experience in the semiconductor industry, including time with leadframe maker Dynacraft Industries; GEC Plessy Semiconductors, Seagate

August 15, 2012 — The MEMS Industry Group (MIG) is planning webinars on micro electro mechanical systems (MEMS) from packaging challenges to how MEMS can benefit healthcare.

MEMS Packaging — Transforming the Challenges into Solutions will take place August 21 with Charles Richardson, director of roadmapping, iNEMI and Bill Bottoms, 3MTS and International Electronics Manufacturing Initiative/International Technology Roadmap for Semiconductors (iNEMI/ITRS) & Packaging TWG Chair. Register today!

Learn more about MEMS in the ITRS in these articles:

2012 ITRS update: Back-end packaging and MEMS

Roadmapping More than Moore: When the application matters

Health Care is Brimming with Opportunities for MEMS will take place September 11, with Mehran Mehregany, Ph.D., director of the Wireless Health Program & Goodrich Professor of Engineering Innovation at Case Western Reserve University. Register today!

MIG will also present 2012 Status of the MEMS Industry on October 3. Eric Mounier, Ph.D., senior analyst, MEMS Devices & Technologies, Yole Développement will speak, with moderators Jeff Perkins, president of Yole Inc. and Karen Lightman, managing director, MEMS Industry Group. Details on this webinar will be released shortly.

Read Karen Lightman’s blog!

Visit the MEMS Channel of Solid State Technology, and subscribe to our MEMS Direct e-newsletter!

by Tony Christian, Director, Cambashi, Ltd., Cambridge, UK

The field of power electronics, the application of electronics for the control and conversion of electric power, is underpinned by basic electrical principles that were established in the distant past by the pioneers of electrical science. But today, the need to supply, modify and control the voltage, current or frequency of electric power arises in a vast number of applications and products spanning a huge range in terms of power handling capability. The industry has generated numerous technological advances to address the ever growing spectrum of requirements; in its 30th anniversary edition, Power Electronics Technology described some of the most important developments of the past three decades.

In the limit, the requirements for power electronics systems range from those designed to handle a few milliwatts such as the DC/DC converters designed to maintain constant voltage as the battery power declines in mobile phones and portable hand held devices, to those handling many megawatts in the large power converters used in the electrical generation and distribution industry. Naturally, the challenges for power electronics designers vary considerably according to application and scale. Those challenges now cover not only electrical function (particularly the drive to maximize efficiency for the power and frequency range in question), but a host of practical and, especially in consumer products, even aesthetic design constraints. For example, the developers of devices like mobile phones or PCs seek to pack ever more functionality into smaller spaces and their power supplies must not consume a disproportionate amount of that space. At the same time, the ever-closer proximity of the components imposes increasing constraints on electromagnetic radiation and limits the ability to dissipate heat. But that kind of challenge is not limited to what is usually regarded as the high tech sector – it seems that even purchasers of auto battery chargers want them to be small and attractive!

For applications of larger scale involving supplying power to electromechanical devices, the design of the power electronics must take into account and adapt to the behavior of the load (usually a motor or drive system) across its operating range. Considerations will include factors such as power factor optimization and minimizing losses, dealing with harmonic currents and eliminating any electromagnetic torque oscillation that might give rise to electromechanical vibrations.  In many applications, including at the high end the power generation and distribution industry, achieving the electrical functionality often requires the design effort to extend to customizing the characteristics of individual system components. There is then the challenge of balancing optimization of the performance of individual elements with the behavior of the overall system.

Power electronics is therefore one of the most multi-disciplinary design problems in the modern industrial landscape. The sheer range of considerations and the differing emphasis between them according to application has led to the development of numerous design tools, each targeted at specific aspects of the design problem.  The design of a power electronics solution will involve using some combination of:

  • ‘Whole system’ simulation technologies based on setting up the circuit logic using component manufacturers’ data for off the shelf components and sub-systems. Here the goal is to understand the system current and voltage levels and frequency components under the range of operating conditions. The analysis is often rendered more complex by the need to incorporate the behaviors of any electromagnetic and /or electromechanical elements. The goal will be to optimize the characteristics of the power electronic system (in terms of the balance of efficiency and cost, size and/or weight) for the application.
  • Systems to analyze individual component or sub-system performance for device types in given applications. For example, since inductors and transformers have a significant impact on power losses and the volume and weight of the system, in many applications optimizing their individual characteristics and performance will be a focus of the design effort.
  • Systems that analyze electro-magnetic emissions. In the majority of applications the power electronics system is in close proximity to other electronic equipment or there are stringent EMC limits such as in defense applications. It is necessary to understand the electro-magnetic signature of the system in order to develop mitigation strategies in terms of electrical filters and/or physical shielding.
  • Thermal analysis technologies. Since the electrical performance of power system components varies with temperature and the function of the system by its nature will involve the need to dissipate waste power in the form of heat, temperature control is a central aspect of power electronics design. Indeed, studies have shown that temperature issues are a major source of failure in electronic systems and avoiding excessive temperatures is therefore a vital aspect of achieving high reliability and extending operating life. Accurate simulation of not only the heat generated by the system but the heat dissipation performance of the options for cooling requires both heat transfer and fluid dynamics capabilities to support the development of the optimum approach to temperature control.
  • Structural analysis technologies. Many power electronics systems operate in hostile environments, for example in aerospace and automotive applications they may be subjected to extremely high levels of vibration, requiring that the structural strength of the system is assured under the target operating conditions.

Caption: Combining Analysis of Circuit Behavior and Thermal Simulation in Power Electronics. Source: www.gecko-research.com.

While adequate technologies for each of these aspects of power electronics design have been around for ten years and in some areas longer, there remain a number of significant challenges in terms of achieving maximum exploitation of the capabilities. The first is ensuring that the design technologies can accurately model the characteristics of the more recent (and continuing) semiconductor and ancillary component advances – we have already noted that recent decades have seen substantial progress. This requires a combination of high flexibility in the system modelling logic and continuous software development.

The second issue has been how to integrate the different design technologies into a coherent and efficient design workflow. Traditionally, the electrical performance was the dominant aspect and once the circuit was confirmed as being able to do the job, the ‘packaging’ – not only size and weight but including the means of controlling temperature and EMC emissions – could be developed to accommodate the electronics. In the last decade, the emphasis has been on how to integrate the various areas of simulation and analysis technology into a unified design environment. For example, data should be able to be exchanged seamlessly between the thermal simulation of a power circuit and the electrical circuit simulator to enable transient junction temperatures to be calculated directly. Not only would such comprehensive integration enable a better balance between the all of the system characteristics to be achieved, but it would also provide the opportunity to reduce the design timescale dramatically.

The third challenge arises from the fact that the recent history of using the sophisticated design tools available for power electronics design has enabled the capture of all kinds of knowledge regarding power electronics performance – electrical, thermal, EMC, reliability and so on. As a result, adequate designs for the majority of applications can be developed relatively easily based on the knowledge and rules encapsulated in the modern design tools. The drive for improved designs is therefore focused on the 1% efficiency improvement or the small reduction in size or weight, making the use of leading edge simulation and analysis tools essential. For the developers of those tools, the challenge then becomes how to make them accessible to a much broader community of users than the traditional market of specialist analysts in companies with large R&D budgets. 

Caption: 3D Electromagnetic FilterSimulation and the Calculated Frequency-Dependent Filter Insertion Losses. Source: www.gecko-research.com.

Developments in recent years in both the electrical and mechanical design software tools, assisted by continued advances in IT hardware and infrastructures, have made substantial progress in addressing these issues. The ability to exchange data between different solutions for different disciplines from different vendors has improved enormously.  Companies like Ansoft, Zuken and Gecko Research now offer integrated suites with the ability to perform complete multi-domain simulations and analyses of power electronics systems, including the full time and frequency performance of the circuit, the thermal behavior, the electromagnetic and electro­mechanical behavior and mechanical stress analysis. The fourth challenge for both multi-discipline analyses and greater accessibility has been the computing power required – even a single-discipline analysis for a moderately complex power electronics design is a highly computing intensive problem. Typically, a simulation is run for each step in a time/frequency series so that many thousands, if not hundreds of thousands, of simulation runs can be required to fully validate all aspects of system performance. The computing requirement is heightened by the fact that many control systems now involve software control and the additional variable of the software set up introduces yet further dimensions to the analysis problem. The promise of ‘infinite’ computing resources in the cloud and the growth in power of dedicated processors that can be added locally mean that there is now sufficient processing power available to the engineer’s desktop to run even quite complex simulations for thousands of time steps.

Give that good progress has been made in addressing the issues of multi-discipline integration and sufficient desktop computing power, the remaining challenge for broadening the user constituency for power electronics design technologies is that of being able to address a suitably wide range of applications while achieving ease of use. The spectrum of applications covers a huge range of power handling requirements (milliwatts to megawatts), frequencies (DC to GHz), temperatures (-55°C to 275°C) and physical scale (µm to m). In the past, as with almost all analysis and simulation systems, the design engineer needed strong expertise and knowledge in modelling and simulation techniques as well as in the technology being modelled in order to ensure that the results represented reality with a reasonable degree of accuracy. Now, to fully exploit the workflow benefits of an integrated suite of design tools, we need the design engineer to be confident in not only the electrical simulation at both the component and system level, but also those for the thermal and electromagnetic behaviors, as well as possibly structural aspects too. The tools therefore need to sufficiently easy to use to be handled by an engineer who is not a specialist in a particular discipline while still providing confidence in the results. There is no doubt that the leading vendors have made invested substantial effort in this aspect of integrated power electronics design and it continues to be a priority area.

For many applications, power electronics forms part of the final product and a likely significant further step in the development of power electronics design technology will be full integration with the product lifecycle management (PLM) environments in use by most large manufacturing companies. The data volumes resulting from larger numbers of design simulations by greater numbers of engineers will put pressure on the data management capabilities of existing PLM deployments, but, in parallel with the increased accessibility of multi-discipline power electronics design tools, we are seeing a similar effort to exploit cloud and web technologies to extend the reach of PLM solutions to smaller companies.  As a result there is an opportunity to move the two forward to support even better management of the power electronics design workflow.

About the author

Tony Christian has a wide-ranging experience in engineering, manufacturing, energy and IT. His early career was in technical R&D roles, after which he moved into computer-aided engineering. His subsequent roles included divisional head of the IT subsidiary of a major international engineering and construction company and leadership of teams developing and implementing state of the art manufacturing control systems at British Aerospace. More recently, Tony was a director of the UK Consulting and Systems Integration Division of Computer Sciences Corporation (CSC), leading a consulting and systems practice for manufacturing industries, and then Services and Technology Director at AVEVA Group plc where he was responsible for all product development and the company’s worldwide consulting and managed services business. Tony has a BSc degree (Mechanical Engineering) and MSc degree (Engineering Acoustics, Noise and Vibration) from the University of Nottingham.