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Tektronix, Inc., a global manufacturer of oscilloscopes, today announced the expansion of its DPO70000SX Performance Oscilloscope Series to include 50 GHz and 23 GHz models. By extending the flagship 70 GHz model, the new 50 GHz product is targeted for engineers and researchers who want to take advantage of the superior low-noise performance of the patented asynchronous time interleaving (ATI) architecture for technologies such as 28 GBaud PAM4 and Kband frequency testing. The 23 GHz instrument joins the existing 33GHz models which feature compact dimensions and built-in scalability using the UltraSync synchronization technology.

The growing family of DPO70000SX Series Performance Oscilloscopes deliver some of the lowest-noise and highest fidelity of any ultra-high bandwidth real-time oscilloscope available on the market today. As speeds go up and amplitudes go down, system noise has become a major challenge because it obscures important details in signal behavior. Tektronix’s 50 GHz and 70 GHz ATI oscilloscopes allow engineers to more accurately capture and measure higher frequency signals with up to 30% less system noise than legacy frequency interleaving approaches.

“The DPO70000SX Series is setting the new standard for performance leadership. We are quickly expanding the family in direct response to customer demand,” said Brian Reich, general manager Performance Oscilloscopes, Tektronix. “With our flagship model offering 10% more bandwidth, 25% higher sample rate and 30% lower noise than the nearest major competitor, we wanted to extend our portfolio to cover a broader variety of engineers and researchers who are serious about signal integrity.”

Symmetrical signal paths for lower noise

Current real time scope solutions for digitizing ultra-high bandwidth signals distribute signal energy to two digitizing paths then use DSP to reconstruct the input signal. Unlike legacy schemes, Tektronix’s unique ATI architecture uses a symmetrical technique that delivers all signal energy to both digitizing paths resulting in an inherent noise advantage when signals are reconstructed. The 50 GHz instrument’s ATI channel offers 200 GS/s sample rate for 5 ps/sample resolution. It also has two standard (non-ATI) 33 GHz channels with 100 GS/s sample rate for 10 ps/sample resolution.

To further enhance signal fidelity, DPO70000SX oscilloscopes use a compact 5 1/4 inch form factor so the instrument can be positioned very close to the device under test (DUT) for shorter cable lengths and cleaner signals. The low height means each unit fits in a single 3U rackmount space, or two oscilloscopes can be stacked in the same space as a single standard bench oscilloscope.

Precise multi-instrument timing synchronization is required for test applications such as validation of high-speed networking technologies used in long-reach fiber systems (DP-QPSK Coherent Modulation) and shorter-reach (PAM4) data center networks. The DPO70000SX oscilloscopes meet these needs through the patent-pending UltraSync architecture that provides precise data synchronization and convenient operation of multi-unit systems. UltraSync uses a 12.5 GHz sample clock reference and coordinated trigger for inherent channel-to-channel skew stability superior to channels within a single instrument.

Multi-level signaling is being planned for deployment in future 56GBaud Datacom standards for transmission of distances up to 10km using a technique known as PAM4. The multi-level signaling presents unique measurement challenges for today’s design engineers. To provide testing insight on this new technology, Tektronix is rolling out PAM4 Analysis support on the DPO70000SX family. The low noise acquisition system in the DPO70000SX 50 GHz and 70 GHz models enables very accurate characterization of PAM4 signaling with this latest analysis toolset.

Rounding out the DPO70000SX Series, Tektronix is also introducing a new 23 GHz model that takes advantage of the compact form factor and supports UltraSync. It features four 23 GHz non-ATI channels with a 50 GS/s sample rate on each, for 20 ps/sample resolution.

Tektronix, Inc., a worldwide provider of test, measurement and monitoring instrumentation, today announced the release of a major system software update (KTE version 5.6) for the Keithley S530 Parametric Test System that can reduce measurement speed by as much as 25 percent. This translates into increased wafer-level test throughput and directly improves the S530’s cost of ownership (COO) for semiconductor production and R&D departments.

Lower manufacturing costs and increased yields are key goals for semiconductor production companies who must also deal with evolving materials and device structures. In-line parametric test throughput and overall COO are directly related to the time it takes to complete all necessary measurements across semiconductor wafers. This new release of the Keithley Test Environment (KTE) software for the popular S530 steps up to these demands by delivering a significant improvement in test performance.

“When it comes to manufacturing and testing modern IC devices, driving down the cost-of-ownership is the name of the game,” said Mike Flaherty, general manager, Keithley product line at Tektronix. “With this latest release, we’ve taken the parametric test system with the best COO and reduced measurement time even further for improved in-line wafer test throughput. This will help our customers improve the bottom line and stay competitive in a fast-moving industry.”

The software upgrade for the S530 includes enhancements to system SMUs that reduce settling time associated with low current measurements. Faster current measurements result in faster overall system measurement speeds. New system measurement settings and streamlined software execution further improve system speed. The upgrade also includes integration of Tektronix’s newest Keithley digital multimeter (DMM) for faster low voltage and low resistance measurements.

Alcatel-Lucent has announced the acquisition of Mformation, a leading provider of mobile and “Internet of Things” security and device management solutions for mobile operators, service providers and enterprises. Terms of the deal were not disclosed.

Mformation, headquartered in Woodbridge, NJ, will be incorporated into Alcatel-Lucent’s IP Platforms organization, providing service providers and enterprises with a secure, scalable, application-independent IoT security and control platform for use across multiple industries including automotive, healthcare, utilities, manufacturing and the digital home.

Additionally, Mformation’s software products will extend and enhance the capabilities of Alcatel-Lucent’s Motive Customer Experience Management (CEM) solution to provide service providers with an end-to-end, integrated and cost-efficient device management solution across home, mobile and enterprise networks. These end-to-end capabilities can address the increasing importance of the effective management and security for the 70 billion devices expected to connect to the Internet by 2020, and will simplify the management of converged networks expected to grow exponentially with the implementation of 5G.

Security concerns are on the rise as networks become increasingly virtualized, wireless devices become mainstay components of complex machines pervasive in every aspect of life, and unmanned connected devices begin to outnumber the world’s population ten fold. In the past six months alone more than 50 million IoT devices have been hacked or recalled. The combination of Alcatel-Lucent’s Motive portfolio and Mformation together will allow network operators to manage any endpoint (or gateway), establishing an end-to-end IoT “chain of trust” built on industry best practices for authentication and data and network security.

By Zvi Or-Bach, Contributor

The upcoming IEEE S3S Conference 2015 in Sonoma, CA, on October 5-8, will focus on key technologies for the IoT era. It is now accepted that the needs for the emerging IoT market are different from those that drive the high-volume PC and smart-phone market. The Gartner slide below illustrates this industry bifurcation where traditional mass products follow the ever more expensive scaling curve, while IoT devices, with their focus on cost, power, flexibility and accessibility, will seek a place near its minimum.


The current high-volume market is focused on a few foundries and SoC vendors driving a handful of designs at extremely high development cost each, processed at the most advanced nodes, with minimal processing options. In contrast, the emerging IoT market is looking for older nodes with lower development costs and a broad range of process options, and has many more players both at the foundry side and the design side.

The key enabling technologies for the IoT market are extremely low power as enabled by SOI and sub-threshold design, integrated with multiple sensor and communication technologies that are both enabled by 3D integration. All of these combine in forming the IEEE S3S unified conference.

This year’s conference includes many exciting papers and invited talks. It starts with three plenary talks:

  • Gary Patton – CTO of Global Foundries: New Game Changing Product Applications Enabled by SOI
  • Geoffrey Yeap – VP at Qualcomm.: The Past and Future of Extreme Low Power (xLP) SoC Transistor, embedded memory and backend technology
  • Tsu-Jae King Liu – Chair of EE Division, Berkeley University: Sustaining the Silicon Revolution: From 3-D Transistors to 3-D Integration

The following forecast from BI Intelligence suggest that the semiconductor technologies that are a good fit for the future market of IoT should be of prime interest for the semiconductors professional.


Jim Walker, Research VP at Gartner, argued at the “Foundry vs. SATS: The Battle for 3D Wafer Level Supremacy” market symposium that 3D ICs are the key enabler of performance and small form factor of products required for IoT.

The upcoming IEEE S3S conference provides an important opportunity to catch up and learn about these technologies.

Let me share with you some nuggets from the monolithic 3D integration part of the conference:

Prof. Joachin Burghartz of the Institute for Microelectronics Stuttgart will deliver an invited talk on “Ultra‐thin Chips for Flexible Electronics and 3D ICs” which will present a process technology to fabricate flexible devices 6-20 microns thin. This process flow is currently in manufacturing in their Stuttgart fab, as depicted below:


Another interesting discussion will be presented by NASA scientist Dr. Jin-Woo Han who will describe “Vacuum as New Element of Transistor”. These transistors are made of “nothing” and could be constructed within the metal stack, forming monolithic 3D integration with silicon-based fabric underneath.

In his invited talk “Emerging 3DVLSI: Opportunities and Challenges” Dr. Yang Du will share  Qualcomm’s views on monolithic 3D IC, which they term 3DVLSI and illustrate below, which seems very fitting for IoT applications.


Globalfoundries will present joint work with Georgia Tech on “Power, Performance, and Cost Comparisons of Monolithic 3D ICs and TSV-based 3D ICs”. This work again shows that monolithic 3D can provide a compelling alternative to dimensional scaling as illustrated by the following chart.


Monolithic 3D will present “Modified ELTRAN (R) – A Game Changer for Monolithic 3D” that shows a practical flow for existing fabs to process monolithic 3D devices using their exiting transistor process and equipment. This flow leverages the work done by Canon about 20 years back called ELTRAN, for Epitaxial Layer Transfer. The following slide illustrates the original ELTRAN flow.


By deploying the elements of this proven process, a multilayer device could be built first by processing a multilayer transistors fabric at the front end of line, and then process the metal stacks from both top and bottom sides.

The conference includes many more interesting invited talks and papers covering the full spectrum of IoT enabling technologies. In addition, the conference offers short courses on SOI application and monolithic 3D integration, and a fundamental class on low voltage logic.

New technologies are an important part of the future of semiconductor industry, and a conference like the S3S would be a golden opportunity to step away for a moment from the silicon valley, and learn about non-silicon and silicon options that promise to shape the future.

STMicroelectronics, a global semiconductor company, and a manufacturer and supplier of MEMS for consumer and mobile applications, has introduced a six-axis motion-sensing device fully supporting image stabilization in smartphones, tablets, and digital still cameras. The latest addition to ST’s iNEMO (TM) range of inertial motion sensors, the LSM6DS3H combines a 3-axis gyroscope, a 3-axis accelerometer, and an ultra-low-power processing circuit in a System-in-Package solution that offers the industry’s lowest power consumption and smallest package size.

Electronic Image Stabilization (EIS) and Optical Image Stabilization (OIS) techniques help minimize image blurring caused by camera motion while the snapshot is being captured. Initially developed for professional cameras, these techniques are being increasingly deployed in smartphones and tablets, where blurring is most likely to occur when the user takes a photograph with an outstretched arm.

Key technical features of the LSM6DS3H include:

  • Ultra-low power consumption of the motion sensors (0.85mA in normal mode, 0.4mA in low power mode), allowing the gyroscope to be “always on”;
  • Accelerometer power consumption in low-power mode down to 10 uA, 60% less compared with the previous-generation 6-axis module (LSM6DS3);
  • Supports both EIS and OIS applications with a choice of I2C or SPI for the primary interface and a dedicated auxiliary SPI interface to the camera module;
  • Compact package measuring 2.5mm X 3mm X 0.83mm;
  • Accelerometer ODR (Output Data Rate) up to 6.66 kHz, Gyroscope ODR up to 3.33kHz;
  • Smart FIFO for dynamic data batching and smarter power management: 4kbyte FIFO + 4kbyte flexible (FIFO or programmable);
  • Full-scale acceleration range +/- 2 / +/- 4 / +/- 8 / +/- 16g;
  • Full-scale angular rate range +/- 125 / +/- 245 / +/- 500 / +/- 1000 / +/- 2000 dps;
  • Supply voltage from 1.71 to 3.6V, independent IOs supply down to 1.62V;
  • SPI/I2C serial interface data synchronization feature;
  • Embedded temperature sensor.

“Very often people use the phone camera with outstretched arms, which can degrade the image quality,” said Andrea Onetti, General Manager, Volume MEMS and Analog Division, STMicroelectronics. “Our new multi-function motion sensor sets to minimize blurring in any photo situation while extending battery life because of the ultra-low power consumption.”

In what may be a first for the MEMS industry, CEA-Leti has manufactured micro-accelerometers on 300mm wafers, a development that could lead to significantly lower MEMS manufacturing costs.

“With more than 200 people involved on micro-systems R&D, Leti is one of the world’s leading research institutes on MEMS, and this demonstration that our 200mm MEMS platform is now compatible with 300mm wafer fabrication shows a significant opportunity to cut MEMS production costs,” said Leti CEO Marie Semeria. “This will be especially important with the worldwide expansion of the Internet of Things and continued growing demand for MEMS in mobile devices.”

Leti is a pioneer and leader in MEMS research and development for sensors and actuators. Building on more than 30 years of MEMS R&D, Leti continues to focus on innovative sensor technologies.

The most advanced is its M&NEMS technology platform based on detection by piezo-resistive silicon nanowires, which reduce sensor size and improve performances of multi-axis sensors. Leti’s inertial-sensor manufacturing concept enables the design and fabrication of combo sensors, such as three-axis accelerometers, three-axis gyroscopes and three-axis magnetometers on the same chip.  This is a key component for Internet of Things (IoT) applications.

Leti’s M&NEMS concept, developed with 200mm technology, is currently being transferred to an industrial partner. Demonstration of this technology on 300mm wafers has shown very promising results.

In addition to lowering costs, manufacturing MEMS with 300mm technology enables 3D integration using MEMS CMOS processes in more advanced nodes than on 200mm, and the use of 3D through-silicon-vias (TSV), which is already available in 300mm technology.

Jean-René Lèquepeys, head of Leti’s Silicon Components Division, will present the latest results in Leti’s MEMS technology R&D at the European MEMS Summit 2015, Sept. 17-18 in Milan, Italy.

GE creates GE Digital

September 17, 2015

GE announced the creation of GE Digital, a move that brings together all of the digital capabilities from across the company into one organization. GE Digital will integrate GE’s Software Center, the expertise of GE’s global IT and commercial software teams, and the industrial security strength of Wurldtech. This new model will be led by Bill Ruh, chief digital officer.

“As GE transforms itself to become the world’s premier digital industrial company, this will provide GE’s customers with the best industrial solutions and the software needed to solve real world problems. It will make GE a digital show site and grow our software and analytics enterprise from $6B in 2015 to a top 10 software company by 2020,” said Jeffrey Immelt, Chairman and CEO of GE.

“With this alignment – backed by sustained investment – we will accelerate our efforts to build GE’s digital strength and win in the Industrial Internet. We are building the playbook for the new digital industrial world by harnessing our horizontal capabilities including Predix, software design, fulfillment and product management, while also executing critical outcomes for our customers. This is the strength of GE.”

Ruh has been leading GE’s Software COE and building the foundation of software experience for GE since 2011. Under his direction, GE has grown to over 1,200 software experts at the Software Center in San Ramon, CA. He is leading the team as they work on a diverse set of projects to deliver better outcomes for customers.

To advance research in nanoscale science, engineering and technology, the National Science Foundation (NSF) will provide a total of $81 million over five years to support 16 sites and a coordinating office as part of a new National Nanotechnology Coordinated Infrastructure (NNCI).

The NNCI sites will provide researchers from academia, government, and companies large and small with access to university user facilities with leading-edge fabrication and characterization tools, instrumentation, and expertise within all disciplines of nanoscale science, engineering and technology.

The NNCI framework builds on the National Nanotechnology Infrastructure Network (NNIN), which enabled major discoveries, innovations, and contributions to education and commerce for more than 10 years.

“NSF’s long-standing investments in nanotechnology infrastructure have helped the research community to make great progress by making research facilities available,” said Pramod Khargonekar, assistant director for engineering. “NNCI will serve as a nationwide backbone for nanoscale research, which will lead to continuing innovations and economic and societal benefits.”

The awards are up to five years and range from $500,000 to $1.6 million each per year. Nine of the sites have at least one regional partner institution. These 16 sites are located in 15 states and involve 27 universities across the nation.

Through a fiscal year 2016 competition, one of the newly awarded sites will be chosen to coordinate the facilities. This coordinating office will enhance the sites’ impact as a national nanotechnology infrastructure and establish a web portal to link the individual facilities’ websites to provide a unified entry point to the user community of overall capabilities, tools and instrumentation. The office will also help to coordinate and disseminate best practices for national-level education and outreach programs across sites.

Funding for the NNCI program is provided by all NSF directorates and the Office of International Science and Engineering.

Atmel Corporation, a microcontroller (MCU) and touch technology solutions provider, today announced the company has expanded its portfolio of automotive-qualified maXTouch (R) touchscreen controllers with the mXT641T family. The new family is optimized for capacitive touchpads and touchscreens from 5 to 10 inches. These mXT641T devices are the industry’s first auto-qualified self- and mutual-capacitance controllers meeting the AEC-Q100 standards for high reliability in harsh environments.

The automotive-qualified maXTouch mXT641T family incorporates Atmel’s Adaptive Sensing technology to enable dynamic touch classification, a feature that automatically and intelligently switches between self- and mutual-capacitance sensing to provide users a seamless transition between a finger touch, hover, or glove touch. It eliminates the need for users to manually enable “glove mode” in the operating system to differentiate between hover and glove modes. Adaptive Sensing is also resistant to water and moisture and ensures superior touch performance even in these harsh conditions.

The new devices support stringent automotive requirements including hover and glove support in moist and cold environments, thick lens for better impact resistance, and single-layer shieldless sensor designs in automotive center consoles, navigation systems, radio interfaces and rear-seat entertainment systems. The single-layer shieldless sensor design eliminates additional screen layers, delivering better light transparency resulting in lower power consumption along with an overall lower system cost for the manufacturer.

“More consumers are demanding high-performance touchscreens in their vehicles with capacitive touch technology,” said Rob Valiton, Senior Vice President and General Manager, Automotive, Memory and Secure Products Business Units. “Atmel is continuing to drive more innovative, next-generation touch technologies to the automotive market and our new family of automotive-qualified maXTouch T controllers is further testament to our leadership in this space. Atmel is the only automotive-qualified touch supplier with over two decades of experience in designing, developing, and manufacturing semiconductor solutions that meet the stringent quality and reliability standards for our automotive customers.”

The Semiconductor Industry Association (SIA), in consultation with Semiconductor Research Corporation (SRC), today presented its University Research Award to professors from the University of Texas at Austin (UT Austin) and Carnegie Mellon University (CMU) in recognition of their outstanding contributions to semiconductor research.

Dr. Grant Willson, professor of chemistry and chemical engineering and the Rashid Engineering Regents Chair at UT Austin, received the honor for excellence in technology research, while Dr. Larry Pileggi, Tanoto Professor of Electrical and Computer Engineering at CMU, was recognized for excellence in design research.

“Research is the lifeblood of innovation and the U.S. semiconductor industry,” said John Neuffer, president and CEO of the Semiconductor Industry Association, which represents U.S. leadership in semiconductor manufacturing, design and research. “Dr. Willson and Dr. Pileggi have spearheaded pioneering research that has moved our industry forward and helped keep America at the leading edge of innovation. It is with great pleasure that we recognize Dr. Willson and Dr. Pileggi for their tremendous and important accomplishments.”

“SRC’s mission is to drive focused industry research to both advance state-of-the-art technology and continue to create a pipeline of qualified professionals who will serve as next-generation leaders for the industry,” said Ken Hansen, SRC CEO and President. “Dr. Willson and Dr. Pileggi exemplify that spirit of innovation, and we’re pleased to honor them for their achievements.”

Dr. Willson joined the faculties of the Departments of Chemical Engineering and Chemistry at UT Austin in 1993. He received his BS and Ph.D. in Organic Chemistry from the University of California at Berkeley and an MS degree in Organic Chemistry from San Diego State University. He came to UT Austin from his position as an IBM Fellow and Manager of the Polymer Science and Technology area at the IBM Almaden Research Center in San Jose, Calif. He joined IBM after serving on the faculties of California State University, Long Beach and the University of California, San Diego.

Dr. Pileggi joined the faculty at CMU in 1996. His professional background includes more than 30 years of experience in IC design, Electronic Design Automation and university education and research. Dr. Pileggi co-founded Extreme DA Corporation in 2003 and served as its advisor. He also co-founded and served as Chief Technology Officer of Fabbrix, Inc in 2007. He received his Ph.D. in Electrical and Computer Engineering from CMU in 1989 and was also a faculty member at UT Austin before returning to CMU.

The University Research Award was established in 1995 to recognize lifetime research contributions to the U.S. semiconductor industry by university faculty.