December 8, 2008: Memscap, a provider of innovative solutions based on micro-electromechanical systems (MEMS) technology, is now offering a Mumps manufacturing and prototyping services platform that can create submicron features on Mumps polysilicon wafers, what the company says is the first such manufacturing/prototyping service to be offered on the nanoscale (below 1μm) for mechanical structures.

Taking place alongside the company’s other existing runs (Poly Mumps, SOI Mumps, Metal Mumps), Nano Mumps will benefit from the more than 16 years experience of Mumps and its track-record of success that led to more than half a million MEMS devices shipped to over 1000 customers. The expertise gained with other runs will also enable to keep the same process length, allocate more space for devices on each run, give customers the possibility to compare the advantages of micro and nano processes before going to volume manufacture, and, offer customers the most cost-effective manufacturing and prototyping services for nanomachines.

The applications for this new process include from mirrors, fuel cells, fluidics, renewable energies, accelerometers, and medical/biomedical applications.

Image of a dual assembled platform from a MUMPS run. (Credit: Rob Johnstone)

December 3, 2008: Siimpel Corp., a supplier of optical microelectromechanical systems (MEMS)-based solutions for the mobile market, has achieved ISO 9001 quality management systems certification. National Quality Assurance, (NQA, USA), an accredited certification body, conducted the compliance assessment evaluation.

Siimpel’s silicon MEMS-based solutions are targeted at cellular phones with high-quality next-generation camera features including autofocus, shutter, zoom, and image stabilization. MEMS technology significantly improves the accuracy of alignment of various mechanical structures and optics in cameras while meeting the size constraints of handset manufacturers globally.

“This prestigious international certification underscores our dedication to providing our customers with the highest-quality products and services,” stated Siimpel CEO Chee Kwan. “Moving forward, we will continue to pursue continuous quality improvements that allow us to deliver innovative, high-performance camera solutions that further enhance customer satisfaction.”

“Siimpel’s ISO 9001 certificate is tangible proof of their commitment to quality and the continuous improvement of their process. I believe Siimpel’s strong focus on process effectiveness, product integrity and customer focus will greatly support their business success,” stated Kevin Beard, president of the National Quality Assurance.

with Tom StepienClick here to enlarge image

Applied Materials is a well-known supplier of processing and inspection equipment to the semiconductor manufacturing industry, and now also the photovoltaics (PV) industry. The company recently received a relatively large order for four tools from Silex, a leading foundry of MEMS devices. We caught up with Tom Stepien, VP and GM of Applied’s 200mm systems business, to get his take on what’s going on in the MEMS market, and what kind of unique equipment and process challenges MEMS devices present.

Q: It seems as though MEMS has been long considered a niche market. With the size of this recent order, is MEMS finally becoming its own industry?

For MEMS specifically, there have been some consumer applications–the Wii, i-phone, Guitar Hero–that have driven some of the increase. In consumer handhelds there are accelerometers and gyroscopes, both of which are MEMS devices. There have also been laws in the US and some pending laws in Europe that are notable. It was September of last year when the US tire pressure sensor law went into effect, and there are now hundreds of millions of units of tire pressure sensors being built worldwide. Meanwhile, Europe is looking at a stability control law to make sure the vehicles stay stable. Both examples, the consumer and automotive applications, have helped increase the volumes.

Q: Those devices can be pretty complicated with beams and moving parts…are there different manufacturing requirements? Do you have to configure the equipment differently and develop different process technologies?

Some MEMS requirements can be more demanding than traditional semiconductor devices. Some of the etches can be more intense; they can be longer and have to be more precise to get cantilevers perfectly aligned, because the mass at the end of the cantilever has to be very balanced for an air bag, for example. On the vias and on the trenches, you have very high aspect ratios, and there are some specifications on the sidewalls and the smoothness of the sidewalls which is often a tradeoff with etch rate. You also have to worry about the uniformity across the entire wafer–it’s pretty easy to get the uniformity in the center of the wafer, but the real trick is to have uniform process results across the whole wafer.

A second area that’s different is wafer handling. Wafers are sometimes thinner for MEMS applications and can require access to the backside, especially for pressure sensors where you have to build a diaphragm. You actually wind up processing on both sides of the wafer–you process one side and then flip it over and etch from the other side. So of course you don’t want any scratches or other defects to be introduced in the processing.

For some MEMS devices you do the micromachining at a wafer level as opposed to a die level. Of course that induces all kinds of stresses and you have to be careful about managing those stresses.

Another difference is inspection and test. You want to try to test MEMS devices in as close to real-world conditions as possible. Unlike traditional semiconductor devices, these have moving parts. The testing at higher temperatures at faster throughput and greater accuracy all make it more difficult on the testing side of things.

Challenging MEMS feature etched with Applied Materials’ Centura DPS DT+ etch system.Click here to enlarge image

Q: Is there interest in moving to a 300mm platform?

The majority of MEMS production today is still at 6 in. and below, but we are seeing migrations to 8-in. [200mm] as a way to reduce costs.

As MEMS volumes are growing, customers are looking to add capacity, and going to 8-in offers several advantages. At 8-in. you have access to technology that doesn’t exist at 6-in. in terms of either hardware or processes. There is also an integration aspect to CMOS where you’re on the same die or at the same package level.

There’s also the reliability factor of the equipment. Applied is continuing to invest in 8-in. If you’re a manufacturer looking to go to 8-in., you have these tools that have much better uptime and much better availability. They have a much more mature design, and you have more process knobs compared to 6-in. That’s where the Applied value proposition really wins, because we have thousands and thousands of these tools out there for the last 20-some odd years. As MEMS starts to become mainstream, we’re getting looked at for some of those requirements.

Q: How many tools does a MEMS manufacturer typically need?

Of course it depends on their business and what they’re making, what steps they’re handling. On the order that you referenced [Silex], that was etch, deposition (CVD and PVD), and planarization tools. Many of the top MEMS foundries as well as the captive guys have Applied tools, but it all depends on the volumes. If you’re making inkjet heads by the millions and maybe even billions, that’s a little bit different than some of the newer applications like the silicon microphones or the microfluidics medical devices which are still pretty early in terms of volumes.

Q: But in any case, you’re seeing this as a growing and important business that’s attractive to you as an equipment supplier?

Absolutely! The other thing that’s interesting to us is that large foundry customers are making big efforts in terms of getting into MEMS, especially integrating with CMOS devices. That’s another encouraging sign of growth.

Q: Are they developing specific processes for MEMS or are they trying to have the fabless guys come up with ways to use the existing process technologies and materials?

Some of the foundries have to adapt some of their processes to meet the needs of the MEMS devices. There are some unique metals that are typically used where they have to try to get the MEMS device to work with the current materials they have available in their foundry. There are unique etch requirements so they are having to either fine-tune what they have or bring in additional equipment to meet those needs.

Maurice J.A. Delafosse, Dalsa Corp.
Gerold Schröpfer, Coventor

Integration of MEMS devices and CMOS electronics on one die can bring powerful capabilities, including reduced system power consumption and improved volume-to-area ratio to automotive, biomedical, RF, photonics, information technology, and other applications. Because MEMS devices require interaction with their environments beyond just electrical signals, the development of fabrication and packaging processes is difficult. Mainstream CMOS IC processes are often insufficient for integrated MEMS/CMOS systems.

To surmount this challenge, developers of integrated MEMS systems often use simulation software to model the process. Simulation is extremely useful at certain points, such as once the full process has been tested and verified, or when a particular step requires improvement, or when it is the first step on a virgin wafer. In general, however, precise simulation of each individual process step is less important as a good, close-approximation overview of the complete integrated process.

To gain that overview, emulation software combined with silicon-accurate 3D visualization capabilities and backed up by experimental calibration is a more productive approach. This is because emulation software enables developers to use a “virtual manufacturing” concept to make process development for integrated MEMS systems more efficient. By taking into account all of the specific information for each process step, the technique efficiently flows that information through the entire process, and also from department to department within the organization. Engineers can know all pertinent information about what has been done previously so they can anticipate what needs to be done for the present fabrication step and for subsequent steps, and so they can react quickly to uncertainties and issues that crop up.

Dalsa Corp. and Coventor Inc. have teamed on several projects that have employed virtual manufacturing methods to develop, produce, and package versatile integrated MEMS devices. Dalsa’s core competencies are in specialized integrated circuit and electronics technology, software, and highly engineered semiconductor wafer processing. Products and services include image sensor components (CCD and CMOS); electronic digital cameras; vision processors; image processing software; and semiconductor wafer foundry services for use in MEMS, high-voltage semiconductors, image sensors, and mixed-signal CMOS chips. Coventor, meanwhile, is the world leader in design automation for micro- and nanoscale devices and systems. Coventor’s MEMulator software uses volumetric pixels technology (“voxels”) to build highly realistic 3D models that show the precise impacts of process changes. These are realistic virtual prototypes, not simply idealized geometries, as can be seen in Figure 1.

Figure 1. MEMulator builds highly realistic 3D models. (Design by U. of Waterloo, Ontario, Canada)Click here to enlarge image

The three following examples show how a virtual manufacturing approach can be of benefit.

Support for process integration/process flow development

Process engineers often know what to expect from a specific process step, such as deposition or etching, and thus can predict its geometrical effects. But this gets tricky when brand-new process flows are created from novel combinations of existing process steps, or when a specific physical design layout needs to be rendered. One example is when multiple etches are performed sequentially, in several mask layers, where each etch strongly depends on the outcome of the previous one. In these cases, even for experienced process engineers, it can be difficult to estimate the outcome without a proper representation of the starting point.

In this case, virtual manufacturing comes in handy–it allows engineers to readily develop and test a large number of process step combinations and novel process flows using multiple physical design patterns, which wouldn’t be possible in a real manufacturing environment or would be costly to perform. The model for each process step can be calibrated through experimental measurements, resulting in very reliable result-models that can be reused in multiple combinations. Emulation software takes these verified models and creates a complete process flow, and variations of it with various physical design layers, in a few hours or less. All of the software code is saved and is used to speed up process development.

An example of the processes Dalsa emulated before building silicon was a fabrication process for an integrated microphone. Dalsa already had emulation-scripts samples for the desired process steps, while the preliminary product’s layout was supplied by the customer. The product required a big cavity in the sensing area. Dalsa used Coventor’s MEMulator emulation software not only to evaluate the impact of various etch methods on the final die size, but also to show the impact of each choice on the previous and following process steps. This was important because there were material stacks needing to be exposed to chemicals in different ways (i.e., dry or liquid etch) and at different etch-rates. Each option could have been modeled by hand by a couple of engineers at a table, but the emulation software provided a formal, reusable way to do the job. In addition, the emulations could have been conducted by a non-engineer since the emulation-scripts samples already existed.

Validate and prepare a design before fabrication

Emulation also gives engineers the ability to do virtual test runs to verify that a device design is compatible with the manufacturing process, and that the 3D result is as expected. Moreover, design mistakes and shortcomings can be identified, even if they are compatible with 2D layout rules. Other pre-production advantages include:

• Ability to efficiently model any design changes,
• Test-run multiple designs and test structures,
• Improve and optimize device design for given process constraints,
• Prepare a mask layout for fabrication,
• Bridge the gap between lithography mask creation and process engineering, and
• Optimize a 2D mask layout, taking into consideration 3D manufacturing aspects.

For example, one project required Dalsa to fabricate the mechanical portion of a one-die tire pressure monitoring system. The processing was complicated because the die was an assembly of three wafers, each wafer processed on both top and bottom, and all of them sequentially bonded one to the other as the overall process reached completion. There were a number of important process recipes of various types to queue: photolithography, oxidation, deposition, etching, implantation, bonding, and grinding. Although the result of each recipe was well-understood and well-controlled by the responsible engineers, they still needed to know what to expect as inputs in order to predict how the device would look when leaving their processing stage. Emulation software enabled that information to flow from one department to the other in a visual format. Corrections and adjustments were done in minutes. Screen captures for PowerPoint presentations enabled the sharing of information via different media with people who had different levels of technical understanding or different domain expertise.

The software enabled Dalsa to present the customer with a visual image of how its product would look after processing, with all the associated impacts of different processing choices clear to see. In fact, upon seeing such presentations, it happens from time to time that a customer will ask Dalsa to modify the proposed process or to modify the product design. Since the process hasn’t been built and launched at this point, both resource and financial cost of those moves is nil compared to what it would be during fabrication–or even worse, after initial devices have been built.

Inspect and control wafers during and after fabrication

An emulation-based virtual manufacturing approach also gives fab personnel a precise degree of control during and after the fabrication process. For example, it allows:

• 3D visualization of each process step,
• The ability to follow wafer processing step-by-step and to anticipate the next step,
• Technical staff/equipment operators to use 3D virtual prototypes (or printouts) for quality control after each critical fabrication step, and
• Comparison of manufacturing output with specified output, for final quality control and sign-off.

Click here to enlarge image

Emulation software also can be used for failure analysis in conjunction with analytical techniques (FIB, SEM, TEM, etc.), and for documentation and training of fab personnel.

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As an example of this control, a key concern at Dalsa and elsewhere is potential contamination by “flying” structures–pieces of products that break off a previous wafer and “fly” around inside the production equipment–created by mismatches between the physical design layout and the fabrication process. Catching these potentially dangerous structures can be done by automated layout verification (i.e., design ruler check) but only after a complete 3D comprehension of the process and product has been achieved.

For example, on one Dalsa project to manufacture a resonator, a deliberate partial release of material was necessary. It was important to identify realistic release and residue patterns in order to calibrate the amount of released material, so as a first approximation Dalsa engineers performed a data-shrinking step using standard layout tools. However, they quickly resorted to emulation software because it gave them realistic release and residue patterns and enabled the creation of a model that took into account the impact of the preceding fabrication steps, all in about the same time as the data-shrinking. Once certain “forbidden” shapes of the released material were identified, a PowerPoint presentation with 2D and corresponding 3D images was created to transfer that information to the process engineering and inspection staff. Being in 3D, it was as if they had actual pieces of silicon to compare with the product. All of this was done in just a couple of hours using the base functions of MEMulator.

Dalsa has used emulation software to do much more than just create models that some might consider “more than average yet still simple.” For example, during fabrication of one device, metal residues were becoming trapped in the corners of the product, and the mechanism by which that happened wasn’t understood. Using emulation software, Dalsa engineers modeled the ripples created by the cycles of a DRIE etch on the edges of a polysilicon layer. With that information, new device shapes and different design rules could be evaluated without having to produce experimental silicon. The models were so realistic that when the MEMulator results in grayscale imagery was compared with SEM images, the differences weren’t obvious (see Figure 2).

Conclusions

Virtual manufacturing–process emulation backed up by experimental calibration–is a more productive way to build integrated MEMS/CMOS systems than process simulation. It provides a link between fab and design, is a lower-cost and faster technique, and provides a unique method to understand and improve design and process interaction, and wafer control/inspection. It leverages the enormous knowledge and tooling that has been developed in CMOS semiconductor fabrication, and transfers that knowledge to the MEMS world.

Figure 2 : Actual SEM images (top) vs. Coventor MEMulator/SEMulator 3D rendering (bottom) of DRIE etched polysilicon edgesClick here to enlarge image

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Integrated MEMS/CMOS development and prototyping can be done at less risk using emulation tools such as MEMulator because new process flows based on existing semiconductor CMOS know-how can be created. Design and process information can be readily shared between fabless design houses and foundries, and the ultimate goal of faster time-to-product can be more easily achieved. Another part of the return-on-investment is the decrease of both development cost and time with less iteration, plus the increase of overall quality, reliability, and efficiency comforting current customers and maximizing the appeal for new customers.

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Maurice J.A. Delafosse is MEMS product engineer, DPFS department, at Dalsa Corp. in Bromont, Canada.
Gerold Schröpfer is director of European operations and foundry partner program for Coventor in Sarl Paris, France.

by Noushin Dowlatshahi and Bob Chanapan, Veeco Instruments Inc.

Microelectricalmechanical systems (MEMS) are taking a whole new role in our day-to-day life, and are much more widely used than ever before, due to a wide range of benefits including their low mass, fast mechanical response, low power consumption, and potential for lowering end costs. Meanwhile, test and quality control of such devices has become more critical to facilitate the insertion of this technology into critical applications. Therefore, it is not surprising that precision metrology has a huge role in this steady advancement of MEMS technology.

Unlike traditional semiconductor devices, today’s MEMS devices require characterization in both their static state and under actuation. Parameters of interest include shape, dimensions, surface roughness, sidewall angles, film thickness, residual stress, feature volumes, response times, thermal properties, resonance frequencies, stiction, environmental compatibility, and more. The greatest difficulty in MEMS metrology is the nearly endless diversity in form and function of the devices. Each type of device has different complexity in the manufacturing process, a different geometry (from tens of microns to tens of millimeters in width), and vastly different performance requirements or designed responses to external stimuli. Thus, while curvature, surface roughness, and switching time may be critical for micromirror arrays, co-planarity of the capacitor parts and linewidths may be the most crucial parameters for an accelerometer. Initial or long-term failure of a device may also be driven by an array of factors, such as geometric errors in production, contamination, improper removal of sacrificial layers, stiction, environmental attack, fatigue, electrostatic clamping, fusing, delamination, or electrical damage.

Figure 1: Wyko NT dynamic measurement reveals a hidden defect in a micro-mirror.Click here to enlarge image

During research and development, there is also a need to map the behavior of devices and materials placed under external stresses (e.g., temperature, pressure, or corrosive agents) in order to fully understand the time-course evolution of these processes. Early detection of failure modes not only enables improvement at the next fabrication cycle and increased yields, but it also identifies whether the problem is isolated or systematic, directly impacting field failure quality control.

Figure 2: Wyko NT profiler image of a MEMS fabricated microphone. Click here to enlarge image

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RF MEMS

MEMS applications in the domain of radio-frequency (RF) circuits serve as a perfect example. For certain capacitive MEMS switches, it is crucial to examine the stiction between the metal layer (top electrode) and the dielectric layer covering the bottom electrode. The charge build-up in the dielectric material can result in what would typically be called a “failure mode.” The actuation voltage is directly affecting this charge build-up. Researchers need to understand how an increase or decrease in the actuation voltage can impact the lifetime of typical MEMS. This actuation voltage is typically related to the device geometry, mechanical and material properties, and residual stresses in the devices. When voltage is applied to a typical capacitive RF MEMS switch, the electrostatic charges cause a distributed electrostatic force, leading to deformation of the micro-structure. Later, due to the storage of elastic energy, the structure tends to return to its original state. Accurate metrology can play a significant role in characterizing such a switch by defining and evaluating the membrane’s deformation and analyzing thermal impact, as well as the material and mechanical properties of the metal.

Micromirrors

Another widely used type of MEMS device that exhibits particular metrology needs is the micromirror array, which is finding use in adaptive optics for both space and consumer electronics, as well as in projectors, televisions, and digital cameras. These mirror devices must be 100% reliable and accurate. Because of variations in device geometry that result from the micro-fabrication process, the performance from one device to the next can vary, making it difficult to reliably ensure accuracy and repeatability of the actuator positions. These arrays typically consist of simple cantilever beams, torsion beams, tethered (piston-style) beams, circular membranes, and oval membranes. One technique of fabricating the micromirrors is to use low-temperature adhesive wafer bonding to deposit a thin layer of monocrystalline silicon device to a CMOS wafer. The digital micromirror device (DMD) developed by Texas Instruments, which incorporates more than 500,000 individually addressable micromirrors, has made great strides in both performance and reliability of such devices. Digital light processing technology based on DMD has been used in such diverse products as projection displays with film-like projected images and photographic-quality printers. Reliability testing of the DMD has demonstrated greater than 100,000 operating hours and more than 1 trillion mirror cycles.

It is crucial for micromirror array manufacturers to examine the uniformity in how the micromirrors tilt in an array, the time it takes them to tilt, and how repeatable this behavior is. This is in addition to the traditional parameters of mirror curvature/deflection angle roughness and surface topography. Moreover, as the devices are packaged in hermetically sealed packages, the encapsulation process can further affect the operational performance. Environmental factors including temperature and humidity also impact on such devices, creating the need of a fourth-dimensional capable, non-contact metrology solution. Inspecting the device in a meaningful manner can monitor and minimize fabrication errors and positively impact the micromirrors components within an array.

Inspection strategies

Manufacturers have relied on a range of methods to identify structural failure modes in MEMS: optical microscopy, stylus profilometrey, infrared (IR) thermal imaging, focused ion beams (FIB), scanning electron microscopy (SEM), digital holography (DH), atomic force microscopy (AFM), and transmission electron microscopy (TEM). Each of these techniques has pros and cons, and selecting the proper solution depends on a number of factors, from device type to stage of manufacturing.

SEMs generally offer the highest lateral resolution available for static MEMS imaging. These systems operate by focusing a beam of electrons on a small area and detecting the electrons that are scattered from the surface. Measurement time is typically between 5–10s after the sample has been loaded into the system. Lateral resolutions down to the nanometer level are possible, and depth-of-focus of such systems can be quite large. SEMs provide an invaluable tool for evaluating sidewall angles and roughness of very steep parts, and are often the only systems capable of these measurements in such applications as microfluidics and capacitive accelerometers. The primary limitations of the technique are that samples must be placed in vacuum, and the penetration depth of electrons is very small, limiting effective analysis on packaged parts. Also, parts must often be cross-sectioned in order to achieve the proper orientation for best measurement, which can be cost prohibitive. Lastly, edges may produce artifacts if they become charged, leading to inaccurate data.

Laser Doppler vibrometers are frequently used for rapid characterization of out-of-plane MEMS motion. These systems employ a beam of modulated laser light that is reflected from the moving test piece. The returned light is Doppler-shifted from the original modulated beam, and the two beams are then compared. A spectrum analyzer or other electronics can be used to determine the magnitude of the shift, and thus the velocity of the moving part. Displacement can also be measured through integration of this signal. These systems are very sensitive to motion, with sub-nanometer resolution in the direction perpendicular to the test beam. More sophisticated systems enable the measurement point to be scanned across the surface, to build up a complete picture of the MEMS out-of-plane motion, though phase information between each of the monitoring points is lost due to the time lag between measurements. The lasers on these systems can also be coupled to other optical systems directly or via fiber options, such as stroboscopic bright-field microscopes, so one can get the in-plane-motion through a separate series of measurements with that equipment. However, all systems are sensitive to the roughness of the surface, requiring enough light to be scattered back into the detector for adequate signal-to-noise. Therefore, very smooth or rough surfaces can degrade accuracy.

Digital holography (DH) has been employed for many years to measure vibrating devices. In this technique, a digital camera is used to record a hologram produced by interfering a high-quality reference beam with a beam reflected from the sample under test. As the test object is later deformed, the modified object beam is compared with the original digitally recorded hologram, and the deformation can be quantified using standard phase-shifting or other interferometric techniques. These systems can therefore achieve nanometer-level measurement of out-of-plane motion of devices. Using high-speed cameras, deformations of up to several thousand hertz can be measured. The systems can also be combined with stroboscopic methods to measure motions up to several megahertz, similar to the strobed systems mentioned previously. Like the other optical methods, digital holographic systems can measure parts through a transparent cover glass. However, as the source employed is a laser with long coherence length, they can suffer speckle problems from diffuse MEMS surfaces and may also have problems with transparent films on a surface.

Atomic force microscopes (AFM) employ nanoscale tips attached to the end of a cantilever that is brought very close to the test surface. Measurement of the tip deflection allows full 3-D characterization of the surface, and van der Waals forces between the tip and sample can be detected. AFMs utilize a variety of measurement modes, including “contact mode” (where the tip lightly touches the sample) and “tapping mode” (where high-frequency tip oscillations are used to minimize contact with the sample while maintaining the high signal-to-noise ratio). AFMs have the highest lateral and vertical resolutions available of any three-dimensional metrology instrumentation, with sub-nanometer features visible in all three dimensions. However, the field of view for a scan is typically only about 120µm₂, and vertical limits are about 10µm in height. In addition, AFM measurements are relatively slow. Due to the scan speed and contact nature of the scan, these systems are incapable of measuring MEMS while under actuation.

Optical profiling (white light interferometry) has long served as a standard technique for measuring surface topography of MEMS and optical MEMS devices. In a white-light optical microscope, the illumination source is traditionally a tungsten-halogen bulb, coupled into an optical system with several interferometric microscope objectives. Light from the source is split in the objective, with part of the beam traveling to the device under test and the other part to a high-quality reference surface. The light recombines to form a pattern of interference “fringes.” The reference surface is then translated relative to the test surface, and multiple frames of data are obtained during the translation. The resulting series of fringe patterns are analyzed to calculate the surface profiler of the device. Optical profilers provide rapid, 3-D, non-contact sample surface characterization. Consequently, this method has proven quite useful for MEMS production processes. However, this method has traditionally also been inadequate for determining a device’s dynamic ability to perform, such as actuation, deformation, rotation, etc.

CalTech overcame this primary limitation of optical profiling by combining it with stroboscopic illumination for dynamic measurement of MEMS devices in motion. Stroboscopic illumination effectively “freezes” the motion of MEMS structures, allowing nanometer-resolution measurement of their surface shape. By varying the amplitude, phase, and frequency of the drive signal, multiple measurements can be taken to describe the device’s full range of actuation/deformation. Moving MEMS structures can then be analyzed for flatness variation, tilt, lateral translation, linearity of motion, stiction, and other key device parameters.

Today’s top-of-the-line optical profilers incorporate this technology along with other advances to provide a best measurement solution for MEMS researchers and manufacturers. Veeco’s ninth-generation Wyko NT profilers incorporate LED illumination for higher light levels and In-Motion capability for measuring devices under actuation from 0–2.4mHz with angstrom-level resolution. Objective modules that can visualize parts through packaging are also commercially available.

Thus, it is now possible to perform non-destructive, rapid, extremely precise MEMS characterization through packaging and under operation on a single measuring tool.

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Noushin Dowlatshahi is marketing product engineer at Veeco Instruments Inc. Bob Chanapan is marketing product manager at Veeco Instruments Inc.

by Roger H. Grace, Roger Grace Associates

In the September/October issue of Small Times (p.32) I introduced a “MEMS Commercialization Report Card” which addressed 14 barriers needed to be overcome to realize a successful commercialization process for MEMS. Three of the “tier one” barriers are marketing, infrastructure, and design for manufacturing and test/calibration (DFM/DFTC). In this article, I will solely address the issues of DFM/DFTC as it relates to the concept of MEMS-based system solutions vs. the issue of individual MEMS devices.

Figure 1: Early version of ADXL accelerometer showing high degree of monolithic functional integration of signal conditioning sharing the same chip with the accelerometer. Click here to enlarge image

MEMS devices and their development have historically been the major focus of interest and resources for MEMS providers. One of the purposes of this article is to provide MEMS designers as well as people who are specifying MEMS into an application some “food for thought” and encourage them to “think outside the chip” (i.e. the MEMS device). Since the “S” in MEMS stands for systems, I believe that we need to look carefully at all of the elements that provide functionalities and support to MEMS devices so that they can be optimally useful in a microelectronic-based solution.

MEMS-based system solution considerations

If one can “think outside the chip” when designing or specifying a system, one quickly realizes that the MEMS device plays a small (but important) role in the overall system solution. The raw physical, chemical, and optical signal with which a MEMS device frequently interacts requires a great deal of signal conditioning applied to it before it becomes a useful source of data/information to the application. Typically, the signal conditioning consists of functions including analog-to-digital conversion, amplification, comparators, programmable memory (E2PROM), filtering, and temperature sensor(s) for compensation. A big decision must be reached at the outset of the design process as to where these functions should reside–whether on the same chip as the MEMS, or on another totally separate chip that will be connected to the MEMS chip. In addition, the system designer needs to understand where the functions of ESD protection, control logic, embedded software, and power management should reside.

Figure 2: Chip stacking of an accelerometer die with signal conditioning ASIC. Click here to enlarge image

Once this partitioning strategy has been established, the designer/system architect needs to look at the need for this “system” to communicate with the outside world either from a wired or wireless format. Finally, all of these system functionalities need to be interconnected, packaged, and tested.

The main point here is that if a MEMS-based system solution is to be commercially viable, the system electronic and mechanical architecture for its creation must be addressed from day one by all the members of the design/development team in order to optimize the price-performance of the resulting solution–which includes provisions for packaging, test, and calibration.

Signal conditioning/functionality partitioning tradeoffs

Looking at current industry examples of system partitioning strategies, it’s clear there exist numerous various opinions and approaches to accomplish this. The main criteria for selecting the optimum partitioning strategy is based on a number of factors including unit cost, NRE, process compatibility, production volume, and–most importantly–performance. Analog Devices and its ADXL line of accelerometers (Figure 1) have historically taken the approach of integrating the signal conditioning functions with the company’s capacitive accelerometer on the same piece of silicon (though not for the entire ADXL product line). This highly integrated monolithically integrated approach was also adopted by MEMSIC in its accelerometer.

Conversely, organizations including Freescale (Figure 2), Kionix, VTI, and STMicroelectronics have adopted a two-chip approach that separates the accelerometer sensor chip from the signal conditioning ASIC.

Figure 3: MEMS CMOS analog microphone (1mm × 1mm) showing high degree of monolithic functional integration of signal conditioning electronics sharing same chip with the microphone. Click here to enlarge image

When we address the MEMS microphones partitioning strategy, we see that Akustica (Figure 3) has adopted the monolithic approach while the new market entrants, Analog Devices and Wolfson as well as Infineon, and market pioneer and leader Knowles Acoustics, have adopted the two-chip approach. Pulse (formerly Sonion) has a three-chip approach in which the microphone and ASIC are side-by-side mounted on a silicon substrate.

Eric Eisenhut, VP of sales and marketing at Kionix, notes that the digital content of ASICs has increased dramatically, evolving rapidly due to market demand. “We offer a number of ASIC options to our customers that provide a broad range of functionalities to best suit their specific application,” he says. “Our ASIC solutions provide the capability to optimize our MEMS device performance …we do not need to have a perfect sensor, since the algorithms that we have developed take into account the tolerances of the manufacturing process.”

Figure 4: Chip-on-MEMS three axis accelerometer (2mm × 2mm) showing SOI accelerometer stacked with ASIC. (Courtesy: VTI)Click here to enlarge image

On the microphone side, Marcie Weinstein, director of strategic marketing at Akustica, touts the company’s “intimate knowledge of the interface between our transducer and the surrounding electronics” as the key to successfully designing a CMOS MEMS microphone, enabling the company to innovate quickly and introduce new products. As we can see, the ASIC and its functionalities provide MEMS suppliers with a great deal of flexibility to satisfy customers’ varied needs.

Packaging issues

Unlike many semiconductors, MEMS devices need to be in contact with the environment they measure. In the case of an accelerometer or rate sensor (gyro), these devices find themselves mounted on a PC board or substrate. With pressure sensors, however, many applications consist of harsh media (e.g., engine oil or human blood) and require mechanical attachments (e.g., screw threads). These conditions require packages that must be robust but at the same time low-cost, and must not influence the measurement of the sensor by imparting stresses to it.

Click here to enlarge image

It is a well-known fact that MEMS packaging and test/calibration typically constitute over 65% of the total cost of the solution. Recently, the wafer-level packaging (WLP) technology popular in the semiconductor industry has migrated into the MEMS area, which is a common phenomenon. While WLP can effectively enclose or encapsulate a MEMS device and provide it with bump solder capability, quite frequently these devices find themselves inside of another “mechanical” package. Most recently, chip-stacking approaches have become popular with MEMS, as in the case of the Freescale line of accelerometers, as well as the “chip-on-MEMS” chip-stacking approach of VTI (Figure 4), which encapsulates a silicon-on-insulator three-axis accelerometer between two glass silicon capping chips. A “redistribution layer” connects the ASIC to the accelerometer via a flip-chip bonding approach and routes the signals from the accelerometer via the solder bumps to the system. As such, this provides a standalone to packaging requiring no additional external package, and associated manufacturing and package cost.

Figure 5: Dual-redundant MEMS pressure sensor module with discrete ICs provides numerous functions including electromagnetic self-calibration, service history recording, and smart sensor recalibration algorithm. (Courtesy: axept/Bitronics)Click here to enlarge image

“Earlier versions of our accelerometers used a side-by-side approach of the accelerometer sensor and its signal conditioning ASIC,” said Ray Roop, member of Freescale’s technical staff. The current Freescale approach has a chip stack with bond wires connecting the accelerometer chip to the ASIC chip. It is interesting to note that Analog Devices selected a two-chip approach for its MEMS microphone, “because we determined that they were not able to achieve the requisite level of performance in dynamic range and frequency bandwidth associated with a single-chip approach because of the single chips’ coupling resonance effects with the package,” stated Harvey Weinstein, manager of ADI’s MEMS applications group. The goal, he added, was to achieve performance levels “much more demanding than those required by portable electronics, which would include high-quality audio applications.” [Stay tuned for upcoming special features in Small Times on MEMS packaging and MEMS testing.]

Testing issues

Testing MEMS devices requires a major set of unique considerations vs. what is typically seen in semiconductor test, according to Dan Popa of the U. of Texas at Arlington’s Automation and Robotics Research Institute (ARRI). “This is due to the fact that MEMS devices tend to operate in a multi-domain environment…e.g. electro-mechanical, electro-fluidic, electro-optic, electro-chemical, etc. Therefore, the MEMS device must have a stimulus representative of the similar stimulus of the intended application to be properly tested.” In the case of an accelerometer, a vibration table is required to “shake” the devices over their measurement range and over their operating temperature range. The creation of this test system is far more complex and tends to be a custom solution approach. These test system designs need to be addressed early in the MEMS development stage, and need to have scalability capability from R&D testing of the devices to full production. Typically, these systems are co-designed by the MEMS device manufacturer and their test systems integrator. Since no existing MEMS test foundries currently exist, facilities responsible for the packaging of these devices use the test systems provided by the MEMS manufactures to conduct final testing and calibration.

It is noteworthy that a recently created organization, MEMUNITY (www.memunity.org), has assumed the role of educating the MEMS industry about the intricacies of wafer-level packaging and how this approach can enable the automated, high-throughput, low-cost testing of MEMS devices. “VTI has extended the wafer-level test strategy to the active calibration of our three-axis acceler-ometer product line,” noted Scott Smyser, VTI’s VP and GM. “We believe that this approach of active calibration is unique in the industry, and helps us to dramatically reduce the cost of calibration and test of our devices while providing a 100% level of testing.”

Conclusions

I have proposed an approach of “thinking outside the chip” in the creation of a MEMS-based system solution, a.k.a. “MEMS modules.” This approach requires a broad-based interdisciplinary team which tends not to exist where the product needs to be developed, and requires competencies in MEMS device design, wafer processing, signal conditioning/ASIC design, packaging, testing/calibration, supply chain management, and electronics system design. With the availability of over 60 MEMS foundries worldwide, this takes the pressure off the MEMS design and wafer process. Many MEMS companies (Analog Devices, Freescale, Kionix, etc.) have internal ASIC device designers. Companies including Si-Ware Systems and Sensor Platforms provide signal conditioning ASIC design. Austria Microsystems provides both ASIC design and ASIC manufacturing capabilities. Backend network chips are available from a broad selection of suppliers.

In my opinion, the real challenge is creating MEMS-based system solutions that exactly address customers’ needs vis-à-vis classical system integration and packaging/testing approaches. Many organizations–including Axept, Crossbow, IMEC, Infotonics, LV Sensors, Tronics, U. of Texas-Arlington/ARRI, and most recently Acuity–have demonstrated the capability to undertake such a systems-based solutions approach. In addition, organizations including Fraunhofer’s Einrichtung Elektronische Nanosysteme Institute (Chemnitz, Germany), the University of Michigan’s Wireless Integrated Microsystems Research Center (WIMS), and ARRI are focusing on this approach. Axept (Figure 5) has integrated two separate pressure sensors along with a number of discrete signal conditioning ICs to create a dual-redundant pressure sensor module. It provides a virtual data acquisition platform providing operational status assessment, sensor-drift compensation, trend analysis, calibration setting by poling and voting, service history recording, smart sensor recalibration algorithm, and sensor status alerting.

Figure 6: Micro-optoelectromechanical (MOEMS) switch using a MEMS die, four optical fibers, and wire bonds in a Kovar metal carrier. The silicon die contains DRIE trenches for optical fibers, along with electrothermal actuators that align the fibers to Au-coated micromirror surfaces in order to switch power through the device. (Courtesy: University of Texas-Arlington/ARRI)Click here to enlarge image

UT Arlington’s ARRI (Figure 6) has created a micro-opticalelectromechanical (MOEMS) switch module that includes a MEMS die, four optical fibers, and wire bonds for interconnects inside of a (hermetically sealed) Kovar metal carrier. Tire pressure monitoring systems currently being produced in large volumes by suppliers including Bosch, Freescale, and TRW are excellent examples of MEMS-based systems solutions.

These systems (a.k.a. “modules”) embrace pressure sensors, motion sensors, temperature sensors, signal conditioning, battery and battery management, software algorithms, wireless communications, and package integration and test–and are projected to be a major “killer application” for MEMS in the very near future, approaching 100 million units worldwide in the early next decade. I believe that there exists many other major opportunities for MEMS-based system solutions in the near future. Carpe diem!

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Roger H. Grace, president of Roger Grace Associates (Naples, FL), is a technology marketing consultant to the MEMS and nano industries with more than 35 years’ experience. Contact him at [email protected] or www.rgrace.com.

November 19, 2008: Omron Electronic Components LLC has released the 2SMES-01 high frequency mechanical relay, utilizing the company’s expertise in microelectromechanical systems (MEMS) technology. Developed to meet the needs of the automated test equipment market, this product has exceptional high frequency characteristics at 10GHz (50Ω) typical: 30dB Isolation; 1dB Insertion Loss; 10dB Return Loss.

The relay is comprised of two, SPST-NO silicon chips, packaged together for SPDT or DPST-NO operation in a compact enclosure measuring only 5.2 × 3.0 × 1.8mm. Driven by an electrostatic drive system, it is rated for 100 Million operations at 0.5 mA @ 0.5VDC resistive load, and has been tested over 1 billion cycles. Additionally its power consumption is extremely low at 10μW max.

“Our MEMS RF switch combines the highly desirable HF characteristics of electromechanical relays with the life expectancy usually only found in solid-state relays,” said Donna Sandfox, product manager, Omron Electronic Components LLC, in a statement.