Category Archives: LEDs

June 8, 2006 – Veeco Instruments Inc. (Nasdaq: VECO), announced that it has received multi-unit orders for its GaNzilla II MOCVD (metal organic chemical vapor deposition) system from three leading Asian manufacturers of high-brightness light emitting diodes (HB-LEDs).

Multi-unit orders have been received from Huga Optotech Inc. of Taiwan, Dalian Meiming Epitaxy Technology Co. Ltd of China, and LG Innotek Co. Ltd. of Korea during the second quarter of 2006.

Piero Sferlazzo, vice president and general manager of Veeco’s MOCVD operations said in a prepared statement that, “The GaNzilla II is rapidly becoming the production workhorse for gallium nitride (GaN)-based LEDs. This strong order pattern from Asia driven by emerging small panel LCD backlighting applications, demonstrates the confidence our customers have in the ability of GaNzilla II to support their capacity expansions.”

May 31, 2006 – Universal Display Corp. (UDC) and Mitsubishi Chemical Corp. have agreed to codevelop materials for phosphorescent organic light-emitting diode (OLED) displays that are processable through solution, or “wet” processing methods, such as inkjet printing.

The technology, which promises high efficiency of phosphorescent technology with lower-cost inkjet printing techniques, is projected for use with large-area OLEDs, seen as a strong growth market in coming years.

Universal Display has developed a proprietary “PHOLED” phosphorescent OLED technology, which it claims offers up to 4x higher efficiency than conventional OLED technology. Late last year, Mitsubishi Chemical and Mitsubishi Chemical Group’s Science and Technology Research Center unveiled a printable high-efficiency blue phosphorescent OLED. Together, the companies aim to accelerate development of printable red, green, and blue phosphorescent materials.

“Collaborating with a world-class chemical company like Mitsubishi Chemical allows us to share ideas and help each other reach the next level of innovation for OLED materials based on our PHOLED phosphorescent OLED technology and Mitsubishi Chemical’s expertise in OLED chemicals and ink formulation,” stated Steven Abramson, president and COO of Universal Display.

By Phil LoPiccolo, Editor-in-Chief, Solid State Technology

In a one-on-one interview at The ConFab, Charles Huang, SVP of SMIC’s Shanghai operation, followed up on his Monday presentation about general strategies foundries can take to produce next-generation semiconductor technology, and outlined his company’s plans to exploit the burgeoning demand for ICs in China — now the world’s largest regional IC market.

Summing up China’s domestic demand for semiconductor products, Huang cited research data from IC Insights showing that IC sales in China soared from approximately US$10 billion in 2000 to about $40 billion in 2005, representing a compound annual growth rate of 33% and a gain in worldwide market share from 6% to 21% (SEE CHART). By comparison, during the same six-year period, the US share of market dropped from 35% to 19%. As a result, last year, China emerged as the world’s largest IC market. If the trend continues, China will soon widen the gap, as its market will more than triple to $124 billion by 2010.

Although the appetite for ICs in China is growing, the country’s supply of domestically produced chips has fallen short. In fact, China’s fabs met only 6% of the country’s demand for ICs, producing less than $3 billion worth of the $40 billion the Chinese spent on IC products in 2005, according to IC Insights. By 2010, that percentage will improve to nearly 10%, with China producing $12 billion worth of the $124 billion its population is expected to spend on ICs. Even so, that means the total unmet demand will have more than tripled to some $112 billion.

This huge demand for ICs in China is leading to a migration of electronics manufacturing into the country. As production cost pressures are passed down to the IC level, Huang said, system houses are hoping to ride the wave by localizing their IC supply and expanding fab capacity in the country.

The adoption of new technology is key to lowering the cost of ICs, and China is benefiting from a rapid migration of advanced technology into the region to rapidly close the technology gap with the rest of world, said Huang. Indeed, while the US and Taiwan moved from commercial production of 0.18µm-node technology in 1999 to 65nm technology in 2006, Shanghai-based SMIC will have moved from 0.18µm-node production in 2002 to 65nm technology in 2007 — that is, in just four years versus seven, according to Huang.

Nevertheless, continued scaling and increasing complexity — for example, of copper/low-k processes — have led Chinese fabs to outsource much of their production work, Huang said. For example, for the 0.18µm node, SMIC licensed technology from Chartered, and for the 0.13µm node it purchased technology from IMEC. In addition, ongoing issues relating to export licenses and government support are major challenges that will determine the ability to move advanced technologies and tools into China.

Despite these challenges, SMIC’s strategy is to become more horizontal in terms of technological capabilities and offer fully integrated turnkey foundry services. Technology transfer is too expensive, Huang said. “Therefore, while we will continue to work with other partners outside of China, our hope is to become more independent in terms of intellectual property and technology patents,” he said, adding that this will result in good opportunities for investors and lower-cost products for customers.

Other factors will help fuel the expansion of semiconductor manufacturing operations in China, Huang believes. While Chinese foundries may be playing catch-up in terms of technology and IP development and services, the country offers advantages and opportunities for manufacturers that outweigh those in Taiwan, Singapore, and the US, he contended. In fact, China is ranked as most advantageous in terms of labor costs and construction and utility costs, he said, and is approached only by the US in local market demand, supply of natural resources, and availability of human resources. — By Phil LoPiccolo, Editor-in-Chief, Solid State Technology

May 23, 2006 – Battelle Ventures announced it led the $4-million Series A financing of BioVigilant Systems. BioVigilant Systems makes microbial detection technology and develops instruments that detect microbes and bio-agents in air and liquid. Innovation Valley Partners (Battelle Ventures’ affiliate fund), Pearl Street Venture Funds, and Community Investment Corporation of Tucson, Arizona, participated in the round.

BioVigilant Systems began in November 2002, funded by $2.4 million in startup financing. It is headquartered in Tucson, Arizona. The company currently offers the IMD-A instrument for microbial detection of airborne contaminants for applications in homeland security and pharmaceuticals manufacturing, and plans to introduce the IMD-L instrument for liquid sampling in pharmaceuticals by the end of 2006.

By Bob Haavind, Editorial Director, Solid-State Technology

Panasonic has developed strategies and business models aimed at vertically integrating its chipmaking with its appliances and electronic equipment. This approach was detailed by Michihiro Inoue, executive engineer with Matsushita Electric Industrial Co. Ltd.’s semiconductor company, in his ConFab presentation on a new IDM business model.

Combining many devices on the same system LSI can create extensive chip design and manufacturing complexity if each end product is developed individually. Instead, within Matsushita, Panasonic aims to create a new value chain by tightly integrating its semiconductor production with electronic appliances, according to Inoue. The key strategy is to “black box” the core system LSI chip technology in “self-manufactured” semiconductors. System evolution is implemented by devising leading edge technology, including materials know-how and manufacturing schemes, and incorporating it into highly integrated system-on-chip (SoC) devices.

In the old approach, semiconductor devices were implemented separately (a horizontal approach), and then redone to fit the specific requirements of different appliances. This often led to lower margins in boundary areas, as chips were force-fit into system designs, leading to yield loss and performance degradation.

The vertical integration approach starts instead with defining the LSI targets for a variety of appliances and semiconductors. This forces designers to face up to technology limitations, and allows them to forecast how well the potential solutions will work in various systems. Performance and key parameters can be investigated with T-CAD as designs are tuned within actual technology limitations. This joint effort can optimize the compromises needed to provide robust devices that meet systems requirements as closely as possible.

It is interesting to note that a few decades ago, vertical integration was considered to be a major strength of giant Japanese electronics manufacturers. The equipment group kept driving semiconductor technology to meet specific product requirements for the future. In recent times, though, the chipmaking groups have become more independent, so this new strategy is actually somewhat of a revival of what worked successful for companies like Matsushita in the past.

Concurrent product development is another benefit cited by Inoue for the vertically integrated approach. In older times, different sectors of the company operated in a “bucket-brigade” fashion. Process development went on independently of fab construction, and then a process transfer phase was needed, and design technology was developed. This was followed by end-product development once chip specification had been defined.

Now all this is done concurrently, with sharing of strategies, plans, and goals, according to Inoue. There is a concurrent start on each aspect on the basis of exchanged data. Now fab construction, process development, fab start-up, design technology, and end-product development all go on simultaneously, greatly compressing the time-to-market.

This shared development allows more competitive semiconductor and electronic appliance designs to be realized because of clear targets for the SOCs involved, Inoue said, along with coordinated technology from the outset of development. One drawback, he noted, is the difficulty of quickly expanding the scale of production, particularly within cost constraints.

Costs are skyrocketing, he said, for R&D and process integration as well as for circuit/system design. To contain process R&D and integration costs, Inoue cited work with consortia, such as IMEC and Selete. Development and integration are also being addressed through alliances with other chipmakers, such as the collaboration between Panasonic and Renesas.

To deal with design costs, Panasonic has devised a new integrated platform for SOCs for digital consumer electronic devices, says Inoue. SOCs for mobile phones, as well as personal, home, and automobile devices are designed on this common platform, he explained. Basic functions are commoditized, and processors are programmed depending on the individual usage. Software is used in multiple systems, achieving five times the development efficiency, according to Inoue.

The result of this high level of vertical integration is the use of a common platform to break down technical barriers across different types of appliances, while improving the efficiency of development as well as design quality. Sharing of technology plus soft and hard assets across the end-product groups, Inoue said, is resulting in new value creation for Panasonic. — B.H.

by Ed Korczynski, Senior Technical Editor, Solid State Technology

With costs soaring to support nanometer-era IC production, has the fabless industry finally come the point where widespread consolidation is imminent? Or, can fabless companies continue to operate much as they have for the last 15+ years? Daniel Gitlin, VP of semiconductor technology for Xilinx, presented ideas for a new business model for fabless companies in his presentation during the first day of The ConFab in Las Vegas, NV.

In the late 1980s, the rising costs of development and manufacturing led to forecasts that the industry would not have room for small companies to exist, and consolidation seemed inevitable. However, with the emergence of dedicated “pure-play” manufacturing foundries and fabless semiconductor companies, the only consolidation that occurred was in commodity chip markets such as DRAM.

Today, Gitlin offered, a primary consideration for a fabless company is the “virtual integration” that can be established with the rest of the industry. How much integration is needed? How much will such integration cost to establish as well as to maintain over time? At present, as the level of complexity that must be managed in nanometer-era production rises, so do the inevitable integration costs.

Fabless companies see themselves not as in the middle of a vertical supply chain, but in the middle of horizontal network including IP-providers, EDA/CAD suppliers, wafer foundries, test and packaging houses, and their own sales force, Gitlin noted. Relationships are dynamic and evolve over time. The fabless business model is inherently “open” in that core competencies are explicitly defined and everything else is open for discussion in terms of sourcing. Consequently, he said, the “confidence space” is much smaller than at an IDM, and dialog with partners can be more innovative.

Fabless companies, then, have the potential to adopt newer technologies from partners sooner than IDMs, Gitlin concluded. One area in which innovation may occur is optimizing the ROI associated with developing ICs for newer nanometer-era manufacturing nodes. To address DFM challenges, new communications channels must be established between foundries and fabless companies, he suggested -or else either the most advanced designs simply will not yield in silicon, or excessive “guard-banding” will eliminate the benefit of manufacturing at the newest node.

Gitlin proposed two fundamental strategies that fabless companies can employ to contain escalating development costs: create “standard” products with high volumes over time, and invest in DFM and yield engineering. The latter strategy is, of course, available to any fabless company regardless of current product mix, so it may be considered as relatively less disruptive to company and to its IP providers and sales force.

The full-flow and short-loop test chips that run through a foundry partner’s fab are the critical link in all of this, Gitlin said (SEE CHART, BELOW). Test chips provide the most rigorous DFM information to all interested parties, including the ability to diagnose physical failure mechanisms that correlate to electrical failure modes. Short-loop test chips for transistors and for interconnects can be iterated through the wafer foundry and the test house, to update yield models and determine if changes should be made to the processor to the design.

In the near future, successful fabless companies must continue to maintain all of their existing partner/supplier relationships, while intelligently embracing new DFM technologies and methodologies. The additional investment in DFM may pay for itself in improved yields, but it may just represent increased costs that must be averaged out across the bottom line. Just as the manufacturing processes needed to produce chips have increased in complexity, so too must the business models used by fabless companies. More complex business models involving flexible, horizontal, cross-functional organizations will allow the fabless industry to avoid the fate of consolidation. — E.K.

May 18, 2006 – Worldwide semiconductor manufacturing equipment sales jumped 20% in 1Q06 from the prior quarter, due to robust growth in North America and South Korea, although Korea’s tool sales have slowed significantly from last year’s levels, according to new data from SEMI.

Global equipment billings topped $9.58 billion in 1Q06, vs. $8.10 billion in 4Q05, and were up 3% from the $9.33 billion in sales in 1Q05. Equipment bookings were $9.94 billion in 1Q06, also showing impressive strength: 30% year-on-year growth, and 10% higher than the previous quarter.

Most regions enjoyed double-digit year-on-year growth in equipment sales, paced by North America (15%), Taiwan (12%), Japan (10%), and China and Rest-of-World (17% and 11%, respectively), while Europe and Korea showed little or negative growth as capacity purchased in 2004 came online, noted Stanley Myers, SEMI president and CEO. Compared with the fourth quarter, North America and Korea led the way with ~35% equipment sales growth, followed by Japan (16%) and Taiwan (15%).

Semiconductor capital equipment sales, 1Q06 (US $M)
Region: 1Q06, 4Q05, 1Q05, 1Q/4Q, 1Q/1Q

Japan: 2331, 2008, 2114, 16%, 10%
N.America: 1795, 1339, 1561, 34%, 15%
Korea: 1774, 1310, 2283, 35%, -22%
Taiwan: 1589, 1384, 1423, 15%, 12%
Europe: 920, 856, 909, 7%, 1%
R.O.W.: 788, 737, 708, 7%, 11%
China: 380, 375, 326, 1%, 17%
TOTAL: 9577, 8008, 9325, 20%, 3%

*Figures may not add due to rounding
Source: SEMI/SEAJ

May 18, 2006 – Researchers at Mitsubishi Chemical Corp.’s Science and Technology Research Center (MCRC) and Japan’s Ehime U. and Kyushu U. have developed a new organic semiconductor material, processed by low-cost wet coating methods, for use with new large flat-panel displays (FPD).

Previously, only pentacene had been adopted as a small-molecule material for creating high mobility organic semiconductor materials, but it requires high-cost vacuum deposition processing methods, Mitsubishi noted. Polythiophene also has been identified as a soluble polymer material, but its low mobility restricts applied to a limited area, such as electrical papers.

The new small-molecule organic semiconductor material has high mobility (1.4cm2/Vx), equal to amorphous silicon, due to a high crystalline structure. It also can be patterned by a laser instead of the traditional photolithographic method, enabling high-resolution patterning. Researchers claim to have used transistors fabricated with the new material in an organic light-emitting diode (OLED), although details and specs of the OLED were not provided.

MCRC is still working on improvements to this organic transistor material, as well as peripheral materials to be applied with it, and targets use in applications by the end of FY08. The researchers plan to demonstrate the device at the upcoming Society For Information Display (SID) conference in June.

May 17, 2006 – Scientists from the U. of Cincinnati claim to have developed a method to make organic light-emitting diodes (OLED) as much as 10x more efficient and 30x brighter — with a little help from the humble salmon fish.

Incorporating a thin layer of salmon DNA into the OLED structure as an electron-blocking layer improves the chance for electrons and holes to recombine and emit photons, thus enhancing the device’s luminance, the researchers claim. Tests showed that a green “BioLED” with the DNA electron blocking layer (current density of 200 mA/cm2) achieved luminance of 15000 cd/m2, vs. 4500 cd/m2 for conventional OLEDs. A similarly enhanced blue BioLED produced 1500 cd/m2 luminance, nearly twice as much as the baseline device.

“It turns out that DNA has nearly ideal energy levels that allow hole transport to proceed unimpeded while it prevents electrons being transported too quickly,” explained U. of Cincinnati researcher Andrew Steckl. The BioLEDs’ lifetime also appears to be significantly longer than that of equivalent OLEDs without the DNA layer — the team is still trying to understand the difference in degradation mechanisms. Also, Steckl said the team is working to introduce lumophores into the DNA layer to obtain combined photoemission from multiple layers in the device, and are exploring other types of DNA for OLED fabrication, including mammalian and plant DNA.

The water-soluble DNA was difficult to process into thin films, so the researchers utilized a surfactant to convert the DNA into a form insoluble with water, but soluble in selected alcohols. It was then spin-coated into a 20µm-thick electron blocking layer on top of the BioLED’s hole injection layer.

Should the process prove viable for production of OLEDs, availability of salmon DNA is another bonus. Salmon fishing is a 200,000 tons/year industry in Hokkaido, Japan, and normally the male roe is a waste product, but is very rich in DNA.

Full details of the process were published in the May 8 edition of the journal Applied Physics Letters.

May 16, 2006 – Nanosphere announced that it has closed $57 million in a Series D financing round. The round was led by Bain Capital LLC and included financing from Allen & Company and founding investor Lurie Investments. The Northbrook, Ill.-based nanotechnology-based molecular diagnostics company was started with technology discovered at Northwestern University.

“We’ve validated our core technology and delivered early versions to customers, and now we’re focused on clinical trials in preparation for an anticipated commercial launch later this year,” Nanosphere CEO William Moffitt said in a written statement. “This funding will help ensure our ability to launch the Verigene System and to develop additional opportunities for commercialization.”

The company’s Verigene System is a platform for genomic testing that eliminates the need for polymerase chain reaction (PCR). The financing will also help the company develop and commercialize its Biobarcode technology for protein and nucleic acid detection.

“When commercialized, the technology promises to make possible earlier detection of certain cancers, neurological disorders and other conditions, and has the potential to address a tremendous market opportunity,” said James Nahirny, managing director at Bain Capital Ventures, in a written statement.

James Nahirny and Jeffrey Crisan from Bain Capital were added to the company’s board of directors at the close of the funding round.