Fast and predictive 3D resist compact models are needed for OPC applications. A methodology to build such models is described, starting from a 3D bulk image, and including resist interface effects such as diffusion. 

BY WOLFGANG DEMMERLE, THOMAS SCHMÖLLER, HUA SONG and JIM SHIELY, Synopsys, Aschheim, Germany, Mountain View, CA and Hillsboro, OR. 

With further shrinking dimensions in advanced semiconductor integrated device manufacturing, 3D effects become increasingly important. Transistor architecture is being extended into the third dimension, such as in FinFETs [1], multi-patterning techniques are adding complexity to lithographic imaging in combination with substrate topography.

Even on planar wafer stacks, process control gets more and more challenging for the 1X nm technology node, as features are being scaled down while exposure conditions remain at 193nm immersion lithography with 1.35 NA. Image contrast decreases, especially at defocus, resulting in high susceptibility for resist loss height and tapered sidewalls; resist profiles may deviate significantly from ideality. Although imaging conditions can be well controlled at nominal exposure conditions, the effect on the process window is usually substantial, as the useful depth of focus as become comparable to the resist film thickness. These dependencies are illustrated in FIGURE 1.

Especially random 2D layout structures exhibit weak image areas, where often severe resist top loss or footing occurs, which can results in critical defects within the subsequent etch process. An example for such a weak spot is shown in FIGURE 2a, taken during the early phase of process development [2]. The left clip shows a top-down SEM image of the pattern in resist, taken after the development step. It does not provide any indication for a potential defect in this area. Conventional 2D models represent well the bottom contour of the resist profile. Overlaying the model contour (red line) with the SEM image shows a very good correlation with reality, again giving no motive to apply any layout corrections. However, after etch a bridging hot spot is revealed, as can be seen on right SEM image. A more detailed analysis of the weak spot area using rigorous simulations indicates a low image contrast and severe resist loss of about 60% at the critical location, as shown in FIGURE 2b. Degenerated 3D resist profiles are one of the main root causes for post-etch hotspots at advanced technology nodes.

In case those “weak litho spots” in a layout are known, localized corrections to mask features can be applied to prevent yield loss. However, the diversity of random logic structures in advanced designs makes is mandatory that compact models are available which reflect the 3D nature of the resist profiles at any location within the chip, and that this information is being utilized during optical proximity correction and verification, on full chip scale. Rigorously tuned compact models provide an efficient approach to achieve this goal, as we are going outline in the subsequent sections.

Efficient generation of 3D resist compact models

The fundamentals of 3D resist simulation are well captured by rigorous lithography process simulation which is based on a first principle physical modeling approach [3 – 6]. The corresponding simulation results do not only provide an accurate representation of the expected 3D resist profile for arbitrary device patterns within a random layout context. Rigorous models are also capable of predicting the impact of process variations such as focus or dose shifts, wafer stack or illumination condition changes, to only name a few, onto the lithographic performance. This predictive power is achieved by properly separating the various contributions to pattern formation inside the models, for instance addressing optical effects and resist effects individually. Due to their physical nature, the accuracy of optical simulations is only limited by the quality of the input data charactering the optical conditions in the exposure tool. As chemical processes in the photo resist are rather complex, the corresponding models utilize a small set of free, physically or chemically motivated parameters. Only a few experimental data points, e.g. from SEM metrology, are required to calibrate those free parameters, ensuring a good match between experiment and simulation over a wide application space. However, this predictive simulation power comes at the expense of run time – the enormous demand for computational resources does not allow rigorous models at to be applied on a full chip scale.

Standard full chip mask synthesis applications such as optical proximity correction (OPC) or verification are based on the deployment of conventional 2D compact models, i.e. models which represent the resist contours visible in a top-down views. Compact models are optimized for performance. Their accuracy, i.e. the match between model and experiment, is usually achieved by optimizing a large set of fitting parameters, inputting an even larger metrology data set based on CD-SEM measurements. Expansions to a models application space, e.g. to cover additional feature types, are enabled by extending the training data set for model fitting. However, this approach has limitations, as the effort for gathering additional metrology data might become prohibitive, which is rather cogent in the case of 3D metrology.

However, as outlined above, 3D models are required to capture hotspots which are being introduced through local resist height loss. An obvious extension into the third, vertical dimension could be to build individual 2D models at different image depths, representing resist contours of a 3D profile at discrete resist heights. The application of any of the individual 2D models to downstream OPC/LRC tools is straight-forward. However, the relevant image depths need be determined in advance due to the discrete nature of the methodology itself. The critical resist heights can be predetermined, based on etch process results. In practice, a bottom model along with one or two models at critical heights are usually sufficient to detect sites where etch results become sensitive to resist profile. Then the models are directly calibrated on those critical resist heights [7].

One major challenge to support this compact model calibration approach is the preparation of the corresponding metrology data. Conventional, single plane 2D models already require a significant amount of top-down CD-SEM data based on a feature set large enough to represent the entire design space. However, only very rough estimations can be made about the actual resist profiles. This is not sufficient for a reliable 3D model calibration.

Several techniques are available to experimentally characterize the three-dimensional shape of a resist profile, such as atomic force microscope (AFM) or CD-SEM cross section measurements. Common to all these methods is that they are very complex, elaborate, and costly, and therefore not suitable for high volume metrology data collection.

Alternatively, a carefully calibrated rigorous simulator model can be used to generate virtual 3D resist profile data by outputting CD values at specific heights, for specific features. Due to the underlying physical modeling approach, only significantly less experimental data are required for resist model calibration, compared to compact model building [8]. A typical calibration data set consists of CD-SEM top down measurements on a small set of 1D structures, covering critical CDs and pitches, through process window. In addition, a few 3D reference data points, e.g. from AFM, cross section measurements, or etch finger- prints are used to tune the absolute resist height of the profiles in order to match experiment and simulations in all dimensions. This approach not only removes the potential risk of measurement inconsistency between 2D and 3D metrology results, but also opens the door for extensive data collecting with minimum fab efforts.

The CD data sets, either experimentally determined virtually generated for a number of discrete heights, is then fed to compact model calibration at multiple imaging planes. The calibration can be independent for each height. It is often found that fitting a separate threshold for each resist height enables a better match between input data and compact model results. This is mainly due to the fact that vertical resist physics, such as z-diffusion, out-diffusion at boundaries are not included in the traditional compact modeling approach. Differences are compensated through a variable threshold. In addition, other resist models parameters may also be varied to compensate the z-direction physical effects. As a result, the common physicality of the model is compromised, as over-fitting takes place.

In order to demonstrate these dependencies, rigorous simulations based on a calibrated resist model were used to generate reference CD data for over 500 gauges at 9 height positions in the resist film. The gauges represent real fab process covering both 1 dimensional and 2 dimensional layout patterns. The process settings between compact model (ProGen) and rigorous model (S-Litho) are matched exactly. FIGURE 3a shows the results of a compact model calibration in which threshold and common resist model param- eters were kept constant for all sampling heights. The example profile (left image) shows a clear mismatch between the two modeling approaches, which results in an overall matching error with a root-mean-square (RMS) value of 2.9nm for the entire data set (right image).

These limitations have been overcome by adopting more physical modeling approaches, as used in rigorous simulators, while keeping the model form compact for full-chip applications. To that end, the bulk image is calculated by using one set of retained Hopkins kernels. Optical intensity can be assessed at any image depth without accuracy compromise. Based on an accurate bulk image, the model has been extended to capture effects present in chemically amplified resists. For instance, acid generation, acid-base neutralization, and lateral as well as vertical diffusion are taking into account. Specific boundary conditions at the resist interfaces are used to account for surface effects. The model is formulated in a continuous form so that a model slice at any image depth is readily available for use after calibration. While the calibration data is collected at discrete image planes, all planes are calibrated simultaneously using one set of resist parameters to guarantee physical commonality among them. Moreover, the calibration is done stepwise carefully to ensure the optical part to account for optical effects and resist model to account for resist effects.

The corresponding results are shown in FIGURE 3b. The compact modeling approach now takes vertical diffusion effects into account, including out-diffusion at resist top and bottom, which ensures an excellent match for individual profiles (left image) as well as for the entire data set, resulting in an rms value of 0.5nm.

Compact resist model portability

The integration of physical effects into compact modeling does not only enable the extension of resist simulation into the third, i.e. the vertical dimension, as described in the previous section. Characteristics such as “portability” or “separability,” usually assigned to rigorous models only, become now available within compact modeling as well. Rather than lumping optical and resist effects into a single set of model fitting parameters, the optical set is characterized individually, and resist effects are modeled individually, and therefore separated from the optical contributions to the modeling result. The more clean the separation, the more accurate is the modeling of the resist system response to slight modified optical condition, i.e. conditions different from the ones present during calibration.

Typical simple changes to the optical setup are the variation of focus and exposure dose. FIGURE 4 shows the 3D profile results for two representative features nominal CD of 60 nm (Figure 4(a)) and a wide line with a nominal CD of 200 nm (Figure 4(b)). The calibration 4, center images), with profiles being sampled at various heights. In order to test compact model prediction, we have applied a negative focus offset (Figure 4, left images), and a positive focus offset (right images), and compared the compact model results to profiles determined by rigorous simulation, which served as a reference. The profile changes through focus are very well captured by the compact model, especially the resist top loss at positive defocus (Figure 4, right images). These results are already a first demonstration of predictive power which comes with rigorously tuned compact models. In similar experiments, we have also successfully shown that this modeling concept can be utilized to investigate unintended printing of sub resolution assist features by analyzing the 3D resist response [9], and to source variations [10].

3D resist model based proximity correction

An accurate and predictive 3D resist compact model can be deployed in mask synthesis verification, or lithographic rule check (LRC), to detect weaknesses in resist profiles. For severe hot spots, simple OPC retargeting is not sufficient to mitigate issues caused by degraded resist profiles. In such a case, the appli- cation of rigorously tuned 3D compact models within optical proximity correction (OPC) offers an efficient approach to automatically repair hotspots within the mask synthesis flow. ProGen models exhibit the unique property of being consistently applicable in combination with different mask correction approaches, for instance conventional OPC as well as inverse lithog- raphy technology (ILT).

FIGURE 5a shows such a weak spot on an ILT mask where the correction is based on a 2D resist compact model, just the contours representing the bottom of the resist profile (black contour). However, the 3D rigorous simulation results reveals severe resist pinching at the top of the resist bulk, as displayed in Figures 5b. Looking at the bottom contour alone, such a hotspot would not have been detected. The red contour in Figure 5a represents the corresponding 3D compact model result extracted at the resist top, confirming the rigorous simulation result. Consequently, in order to achieve a more robust mask solution, we are now taking information from the entire resist profile into the ILT cost function to compute the corresponding correction. The results are shown in Figure 5(c), including bottom resist contour (black) and top resist contour (red) for the modified mask. Although the resist profile sidewall that the location of the weak spot still show some taping, the situation has significant improved over the 2D model based correction. This is confirmed by the rigorous simulation results in Figure 5(d), which does not show indications for resist pinching anymore.

The above OPC results conducted by ILT using 3D resist models again imply that resist profile weakness can be corrected in a mask synthesis process with the help of one predictive, accurate 3D resist compact model. As a result, wafer yields will be greatly improved.

Summary and outlook

In this work, we have outlined the concept of using a rigorous simulation approach to tune and improve compact modeling capabilities. Characteristics such as “productivity,” “portability” or “separability,” usually known only within the context of physical models, can be transferred to compact models and therefore made available for full chip mask synthesis applications. We have successfully demonstrated this approach by establishing rigorously tuned 3D resist compact models. Those models combine the performance benefit of compact models, required for full chip mask synthesis applications, with the 3D modeling capabilities and predictivity of rigorous models. We have demonstrated that the rigorously tuned resist model can be carried to a different lithography process setup, e.g. a different illumination source without suffering any accuracy degradation. Those models can be deployed in downstream mask synthesis applications such as optical proximity correction or verification without further modifications. As an example, we have performed a 3D resist model assisted mask correction, using ILT, to mitigate potential post etch hotspotsThe concept of “rigorously tuned compact models” can be easily extended to address other simulation challenges, even beyond the litho process, as shown in FIGURE 6. In fact, it has already been used to improve mask topography simulation capabilities in compact models, or extend resist modeling properties to capture effects which are characteristic to negative tone development. We are currently working on utilizing TCAD physical etch simulation to tune etch compact models, which will take simulated 3D resist profiles as input. A combination of TCAD etch tools and rigorous litho simulation can be used to generate compact models which take underlying wafer topography into account.

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