Category Archives: Power Electronics

SEMI, the global industry association for companies that supply manufacturing technology and materials to the world’’s chip makers, today reported that worldwide semiconductor manufacturing equipment billings reached US$ 9.62 billion in the second quarter of 2014. The billings figure is 5 percent lower than the first quarter of 2014 and 28 percent higher than the same quarter a year ago. The data is gathered jointly with the Semiconductor Equipment Association of Japan (SEAJ) from over 100 global equipment companies that provide data on a monthly basis.

Worldwide semiconductor equipment bookings were $9.96 billion in the second quarter of 2014. The figure is 9 percent higher than the same quarter a year ago and 1 percent higher than the bookings figure for the first quarter of 2014.

The quarterly billings data by region in billions of U.S. dollars, quarter-over-quarter growth and year-over-year rates by region are as follows:


Region


2Q2014


1Q2014


2Q2013

2Q14/1Q14
(Qtr-over-Qtr)

2Q14/2Q13
(Year-over-Year)
Taiwan

2.48

2.59

2.73

-5%

-9%
North America

2.32

1.85

1.16

25%

101%
Korea

1.73

2.03

1.22

-15%

42%
China

1.03

1.71

0.84

-40%

23%
Japan

1.00

0.96

0.74

4%

35%
Europe

0.57

0.58

0.36

-3%

58%
ROW

0.50

0.42

0.51

18%

-2%
Total

9.62

10.15

7.54

-5%

28%

Source: SEMI/SEAJ September 2014

Note: Figures may not add due to rounding.

BY TOM QUAN, Deputy Director, TSMC

The Prophets of Doom greet every new process node with a chorus of dire warnings about the end of scaling, catastrophic thermal effects, parasitics run amok and . . . you know the rest. The fact that they have been wrong for decades has not diminished their enthusiasm for criticism, and we should expect to hear from them again with the move to 10nm design.

Like any advanced technology transition, 10nm will be challenging, but we need it to happen. Design and process innovation march hand in hand to fuel the remarkable progress of the worldwide electronics industry, clearly demonstrated by the evolution of mobile phones since their introduction (FIGURE 1).

FIGURE 1. The evolution of mobile phones since their introduction.

FIGURE 1. The evolution of mobile phones since their introduction.

Each generation gets harder. There are two different sets of challenges included with a new process node: the process technology issues and the ecosystem issues.

Process technology challenges include:

  • Lithography: continue to scale to 193nm immersion
  • Device: continue to deliver 25-30% speed gain at the same or reduced power
  • Interconnect: address escalating parasitics
  • Production: ramp volume in time to meet end-customer demand
  • Integration of multiple technologies for future systems

Ecosystem challenges include:

  • Quality: optimize design trade-off to best utilize technology
  • Complexity: tackle rising technology and design complexity
  • Schedule: shortened development runway to meet product market window

Adding to these challenges at 10nm is that things get a whole lot more expensive, threatening to upset the traditional benefits of Moore’s Law. We can overcome the technical hurdles but at what cost? At 10nm and below from a process point of view, we can provide PPA improvements but development costs will be high so we need to find the best solutions. Every penny will count at 7nm and 10nm.

FIGURE 2. A new design ecosystem collaboration model is needed due to increasing complexity and shrinking development runways.

FIGURE 2. A new design ecosystem collaboration model is needed due to increasing complexity and shrinking development runways.

Design used to be fairly straightforward for a given technology. The best local optimum was also the best overall optimum: shortest wire length is best; best gate-density equates to the best area scaling; designing on best technology results in the best cost. But these rules no longer apply. For example, sub-10nm issues test conventional wisdom since globalized effects can no longer be resolved by localized approaches. Everything has to be co-optimized; to keep PPA scaling at 10nm and beyond requires tighter integration between process, design, EDA and IP. Increasing complexity and shrinking development runways call for a new design ecosystem collaboration model (FIGURE 2).

Our research and pathfinding teams have been working on disruptive new transistor architectures and materials beyond HKMG and FinFET to enable further energy efficient CMOS scaling. In the future, gate-all-around or narrow wire transistor could be the ultimate device structure. High mobility Ge and III-V channel materials are promising for 0.5V and below operations.

Scaling in the sub-10nm era is more challenging and costly than ever, presenting real opportunities for out-of-box thinking and approaches within the design ecosystem. There is also great promise in wafer-level integration of multiple technologies, paving the way for future systems beyond SoC.

A strong, comprehensive and collaborative ecosystem is the best way to unleash our collective power to turn the designer’s vision into reality.

Cree, Inc. has announced that its C2M, 1200V, 80mOhm SiC MOSFETs have been selected by Sanix Corporation, Japan, to be designed into their new 9.9kW three-phase solar inverters for use in the construction of commercial photovoltaic systems in the fast-growing Japanese solar energy market.

“Through this partnership with Cree and their SiC technology, Sanix is able to capture more market share in the competitive Japan solar market,” said Hiroshi Soga, general manager, Sanix Incorporated. “Cree’s silicon carbide MOSFETs were critical for Sanix to meet our efficiency and thermal design targets. SiC switches reduced losses in our inverter electronics by more than 30 percent versus the silicon super-junction MOSFETs we were considering. In addition to providing a large efficiency gain, Cree’s latest generation C2M SiC MOSFETs were priced competitively, making it possible to replace lower voltage, less rugged, and less efficient silicon MOSFETs.”

Utilized in the primary power conversion stage of the solar inverter, Cree’s 1200V C2M0080120D MOSFETs feature faster switching characteristics and up to one-third the switching losses of comparably-rated 900V silicon super-junction MOSFETs. By significantly reducing switching losses, Cree’s SiC MOSFETs enable lower total system energy losses, higher frequency switching, and cooler operating temperatures. These benefits improve conversion efficiency and reduce the system’s size, weight, complexity, and thermal management requirements. At the system level, performance is improved, cost is decreased, and lifetime of the inverter is extended.

“Cree is extremely pleased that Sanix has chosen to specify our C2M, 1200V SiC MOSFET technology in its new 9.9kW solar inverters. Cree SiC power devices can provide significant advantages with regard to PV inverter efficiency, reliability, and cost, and will provide Sanix with a critical competitive advantage as they continue to expand their share of the Japanese solar market,” said Cengiz Balkas, general manager and vice president, Cree Power and RF.

Demonstrated to achieve up to three times the power density of typical silicon technology, Cree’s C2M family of SiC MOSFETs are available in 1200V and 1700V, ranging from 1Ω to 25 mΩ. C2M MOSFETs have been designed into a range of industrial power applications since their March 2013 market introduction and continue to experience increasing demand. Cree is currently delivering production volumes of SiC MOSFETs to Sanix and other PV inverter manufacturers, as well as to makers of industrial power supplies, auxiliary power converters, battery chargers, and motor drives.

Spending on microwave RF power semiconductors continues to tick upward as the availability of new gallium nitride (GaN) devices for 4 to 18GHz becomes more pervasive. Point-to-point communications, SATCOM, radars of all types, and new industrial/medical applications will all benefit by the introduction of these high-power GaN devices.

“While gallium arsenide (GaAs) devices are presently the backbone of microwave RF power it is gallium nitride that will drive growth going forward,” notes ABI Research director Lance Wilson. “GaN can operate at much higher voltages and at power levels that were difficult or impossible to reach using GaAs.”

In addition to the above mentioned application segments, microwave GaN is finally reaching the performance points that can start to seriously challenge travelling wave tube applications for new designs that have historically used the latter.

“Microwave RF Power Semiconductors” examines Microwave RF power semiconductor devices with power outputs of greater than 3 watts and those that operate at frequencies of 4 to 18 GHz. This study is part of ABI Research’s ongoing effort to track the major changes in the RF power industry.

This release contains analysis of the six main vertical segments (C-Band GaAs, C-Band GaN, X-Band GaAs, X-Band GaN, Ku-Band GaAs, and Ku-Band GaN) and is further expanded to 28 application sub-segments.

These findings are part of ABI Research’s High-Power RF Active Devices Market Research.

ABI Research provides in-depth analysis and quantitative forecasting of trends in global connectivity and other emerging technologies.

Taiwanese chipmakers, LED manufacturers, and Outsourced Semiconductor Assembly and Test (OSAT) firms will spend firm nearly $24 billion in the next two years on equipment and materials, powering excitement for SEMICON Taiwan 2014, which opened today in Taipei.  Leaders in the industry are convening for the September 3-5 event at the TWTC Nangang Hall.

Driven by consumer demand for tablet, smartphone, and mobile devices, the total semiconductor equipment market is expected to grow 20.8 percent in 2014 (reaching $38.4 billion) and expand another 10.8 percent in 2015 (exceeding $42.6 billion). SEMI forecasts that Taiwan will continue to be the world’s largest spender with $11.6 billion estimated for 2014 and $12.3 billion for 2015.

Nearly 650 exhibitors, 1,400 booths and more than 40,000 attendees are expected at SEMICON Taiwan.  Over 400 will convene for the SEMICON Taiwan Leadership Gala Dinner, one of the most important executive events for the high-tech industry in Taiwan.

SEMICON Taiwan features co-located events and technology theme pavilions focusing on IC design, MEMS, 3D-ICs, advanced packaging/testing, sustainable manufacturing, and secondary equipment.

Business Program Highlights

Facing the fast-changing business environment and global competition, companies must be prepared for unexpected challenges to survive. SEMICON Taiwan covers the critical issues in sessions focusing on market trends to executive forums.

On September 3, Cliff  Hou (VP of TSMC), Charles Kau (chairman of Inotera Memories), Tien Wu (COO of ASE Group), Lip-Bu Tan (president and CEO of Cadence), and Luc Van den hove (president and CEO of imec) will be on the SEMICON Taiwan Executive Forum stage to share their unique perspectives on Taiwan strategic role in the world’s microelectronics industry. Also on September 3, the Market Trends Forum features speakers from Barclays Capital, Gartner, IC Insights, Morgan Stanley, SEMI, TechSearch and TSMC. On September 5, the Memory Executive Summit includes presenters from ITRI/EOL, Lam Research, Micron, MXIC, and more while the CFO Executive Summit features speakers from DBS Bank (Taiwan), EQUVO, Micron, and TSMC.

Technology Programs Highlights

Wednesday, September 3

  • Advanced Packaging Technology Symposium: Presenters will cover market trends, product applications, packaging/assembly solutions (wire bond/flip chip/hybrid) to advanced equipment and material development, and testing and reliability. With experts involved from the entire supply chain, the seminar will cover the most advanced technology development directions for 3D-IC.
  • Sustainable Manufacturing Forum: Showcasing companies and speakers from around the world involved in the manufacture of semiconductors, FPD, PV, High-Brightness LEDs, MEMS, and other high tech products, experts will address a wide variety of environment, health, safety (EHS) and sustainability topics that affect high-tech manufacturing.

Thursday, September 4

  • SiP Global Summit 2014: With a strong focus on heterogeneous integration through System-in-a-Package (SiP) technology, SEMI will host the 4th annual SiP Global Summit on September 3-5.  The event features more than 20 industry leaders who will share their insights and solutions on 3D-IC, Through Silicon Via (TSV), 2.5D-IC with silicon interposer, and embedded substrate technologies. More than 500 industry professionals from around the world are expected to attend.  
  • MEMS Forum:  With a focus on “MEMS for Smart Living,” the September 4 forum will discuss the opportunities as well as challenges.

Friday, September 5

  • Embedded Technology Forum (SiP Global Summit 2014): With demand for wearable/portable devices booming, small form factor has become critical for embedded technology. The Forum reviews product applications and development progress in process and materials to give attendees a comprehensive understanding of embedded technology.
  • Litho & Mask Technology Symposium: In this symposium, exploratory lithography technologies are addressed — directed self assembly (DSA), nanoimprint technologies, multiple e-beam, and extreme ultraviolet lithography (EUV).

For more information and online registration, visit the SEMICON Taiwan website: www.semicontaiwan.org

TowerJazz, the global specialty foundry, and Triune Systems LLC, a mixed signal and power management IC provider, today announced that Triune has developed a proprietary isolated power and data technology using the TowerJazz TS18PM process on its 0.18um based power management platform. This technology is showcased in Triune’s Neo-Iso products, two isolated load switches currently ramping to volume production; TS13001 and TS13101.

According to a report published by Transparency Market Research, the home automation market is expected to reach $16.4 billion by 2019, growing at a CAGR of 24.6% from 2014 to 2019.

Triune’s TS13001 and TS13101 are galvanically isolated load switches that replace mechanical relays in HVAC, home automation, and industrial control systems. The products are low-profile switches with low Rdson, have current limit and fault protection circuitry, and are easily controlled through a simple microcontroller interface. The level of galvanic isolation can be scaled from 100V to 10kV, based on the needs of the system. Device options include both a non-latching TS13001 and latching TS13101 device for replacing most relay applications. These products enable next generation home automation systems that are thin, compact, portable and reliable.

“We developed this unique and innovative isolated technology with TowerJazz because they offered the best process for our needs,” said Ross Teggatz, President of Triune Systems. “Our Neo-Iso technology further leverages TowerJazz’s processes to provide truly unique solutions that can drive exciting and differentiated home automation applications, and we look forward to developing several new products based on this technology.”

“Triune has been a strong partner and we are excited to see innovative products such as the Neo-Iso™ isolated load switches introduced on our power management platform,” said Dr. Marco Racanelli, Senior Vice President of Power Business Group, TowerJazz. “Working with customers like Triune that push performance and innovation boundaries is what helps us bring to market best-in-class process technology. Our latest 0.18um power management platform combines some of the industry’s lowest on-resistance high voltage devices, with 0.18um digital capability and non-volatile memory, serving the consumer, industrial, and automotive markets.”

Although operators will continue to face strong international competition, new opportunities in next-generation semiconductors and electronic inputs will encourage operators to invest in product development. For these reasons, industry research firm IBISWorld has updated a report on the Semiconductor and Circuit Manufacturing industry in its growing industry report collection.

Semiconductors are a core component of electronic devices and form a vital part of products ranging from devices and systems (e.g. computers, cell phones and televisions) to solutions and services (e.g. internet providers, telecommunications and broadcasting services). The Semiconductor and Circuit Manufacturing industry is one of the top export industries in the United States and, according to the Semiconductor Industry Association (SIA), indirectly provides jobs to 250,000 Americans. Valued at $79.5 billion, the industry has grown at an average annual rate of 4.8% in the five years to 2014.

“However, a portion of this growth represents a recovery from the industry’s dismal performance in 2009,” according to IBISWorld Industry Analyst Darryle Ulama.

Revenue is expected to contract by 1.7% in 2014, as demand for US-made semiconductors is offset by international competition and aggressive import penetration. Emerging countries, particularly in East Asia, have siphoned semiconductor manufacturing away from the United States through industrial policy, tax incentives and high-tech corridors with low-cost labor. Even as global demand for semiconductors rises, industry manufacturers are operating in a highly competitive global industry. “Combined with price reductions, production outsourcing and international competition have prevented the industry from achieving higher revenue growth in the past five years,” says Ulama These factors have also contributed to the industry’s high revenue volatility, as industry performance becomes more closely embedded into the globalized electronics value chain.

In the five years to 2019, greater research and development efforts will sustain the industry. Although operators will continue to face strong international competition, new opportunities in next-generation semiconductors and electronic inputs will encourage operators to invest in product development. For example, manufacturers will focus on producing wide bandgap semiconductors that are smaller, faster and more efficient than their silicon counterparts. Additionally, greater demand for industry products in smart grid technology and smart vehicles will spur revenue growth.

SEMI today announced the keynotes for the 2nd Vietnam Semiconductor Strategy Summit(September 16-17), an executive conference focused on Vietnam’’s growing role in the global semiconductor industry. The executive event held at the InterContinental Asiana Saigon Hotel in Ho Chi Minh City, brings together key decision-makers shaping the future of the industry in Vietnam, and international participants from major companies in the semiconductor manufacturing supply chain.  Keynote presentations include Sherry Boger, Vietnam general manager, Intel Corporation, and Pham B Tuan, CNS, who will both provide their perspectives on current and future industry development in Vietnam.

In total for 2014 and 2015, SEMI estimates a spending of almost $4 billion on front-end and back-end equipment in the Southeast Asia region, and another $13 billion in spending on materials including $3 billion on fab related materials. In addition, according to the SEMI World Fab Forecast, Southeast Asia is home to over 35 production fabs covering Foundry, Compound Semiconductors, MEMS, Power, LED, and other devices. Specific to backend manufacturing, Gartner reports that the Southeast Asia microelectronics manufacturing market accounts for 27 percent of the world’s assembly, packaging, and test production square footage.

At this year’s summit, executives from leading microelectronics companies —and semiconductor equipment and materials companies — will meet with delegates representing Vietnamese government, academia, research, and industry to explore and discuss the key strategies and opportunities in the growing Vietnam semiconductor industry. The event includes:

  • Market Overviews: Presentations by Bettina Weiss, SEMI Headquarters and Clark Tseng, SEMI Taiwan
  • Semiconductor Manufacturing in Vietnam: Presentations by: Sherry Boger, Intel; Pham B Tuan, CNS; Solomon Ng, STMicroelectronics; Todd Curtis, Fab-Finder; and Cor Claeys, imec
  • Two Panel Discussions: Investor Perspectives (moderated by Eduard Hoeberichts, FabMax) and Education and Workforce Development (moderated by Bettina Weiss, SEMI)
  • Tabletop exhibition and discussions

“Vietnam is committed to the global microelectronics world and moving beyond backend,” said Kai Fai Ng, president SEMI Southeast Asia. As the first major new fab project in Vietnam, many challenges still remain, from infrastructure and process technology to device design and IP creation and protection. The SEMI Vietnam event provides a key platform to advance important discussions and decision-making in this promising and growing market.”

The connections and relationships forged during the Summit are expected to drive further growth over the next decade and beyond. Global stakeholders with an interest in Vietnam’’s semiconductor market, including those from the equipment, materials, and device and R&D communities, are invited to share their vision, insights and outlook with Vietnam’s local business, technology and educational communities.

The 2nd SEMI Vietnam Semiconductor Strategy Summit is organized by SEMI and co-organized by Saigon Hi-Tech Park (SHTP) and Ho Chi Minh City Semiconductor Industry Association (HSIA).  The premier sponsor is FabMax. Individual registration costs US$750 for SEMI members and US$950 for non-members. Registration and additional information is available online at www.semi.org/vietnam.

When ClassOne Technology introduced its new Solstice electroplating systems at SEMICON West last month they didn’t expect to actually sell their first production unit off the show floor, but that’s what happened. The company reported that the Washington Nanofabrication Facility (WNF) at the University of Washington purchased the Solstice Model LT plating tool for installation at its facility in Seattle, Washington. The WNF is a national user center that is a part of the National Nanotechnology Infrastructure Network (NNIN). WNF is a full-service micro and nanotechnology user facility and the largest public-access fabrication center in the Pacific Northwest. It provides 15,000 sq ft of laboratories, cleanrooms, and user spaces focused on enabling basic and applied research, advanced R&D and prototype production.

“The Solstice LT was exactly what we’ve been looking for,” said Michael Khbeis, Ph.D., Associate Director of the WNF. “It’s a very flexible development tool with the capabilities we need to serve our customers and perform a range of advanced processes — Through Silicon Via (TSV) plating and MEMS are particularly important to us. Plus, the LT price was within our budget, so we made our purchase commitment right there at the show.”

“And WNF wasn’t the only one,” noted Kevin Witt, ClassOne’s VP of Technology. “The customer interest in Solstice at SEMICON was unprecedented in my experience. We had high-level discussions with more than a dozen serious potential buyers, and many of those look like they will turn into purchase orders in the coming weeks.”

To date, ClassOne has announced two Solstice models: The semi-automated Solstice LT features 1 or 2 chambers for development and pilot lines and starts at $350k. The fully-automated, cassette-to-cassette Solstice S8 provides up to 8 process chambers, throughputs up to 75 wph and starts at $1M — which is less than half the cost of equivalent 300mm tools from the large manufacturers.

ClassOne Technology, founded in early 2013, produces new wet processing tools; and its stated mission is to offer more affordable alternatives to the large systems from larger equipment manufacturers. The company specifically focuses on the needs of cost-conscious smaller-substrate users in emerging technologies such as MEMS, LEDs, Power Devices, RF Communications, Interposers, Photonics and Microfluidics. In addition to electroplating systems, ClassOne Technology also provides advanced Spin Rinse Dryers (SRDs), Spray Solvent Tools (SSTs) and more.

“We’ve been very gratified by the overwhelming customer response we received at SEMICON,” said Byron Exarcos, President of ClassOne. “We describe what we do as ‘advanced wet processing tools for the rest of us,’ and it’s evident that users are really understanding — and appreciating — the concept.”

Fairchild Semiconductor, a supplier of high performance power and mobile products, today announced it will eliminate its internal five-inch and significantly reduce six-inch wafer fabrication lines, resulting in the closure of its manufacturing and assembly facilities in West Jordan, Utah and Penang, Malaysia, as well as the remaining five-inch wafer fabrication lines in Bucheon, South Korea.

Following the moves, Fairchild will operate production lines using eight-inch wafers in Maine and Pennsylvania, and retain one six-inch factory in Bucheon.

“Fairchild will also continue operating assembly and test facilities in Cebu, Philippines and Suzhou, China,” said Mark Thompson, Fairchild’s chairman and CEO.

In its official release, Fairchild said these cuts are a part of Fairchild’s ongoing initiative to enhance manufacturing capabilities, improve product quality, and lower costs resulting in greater supply chain flexibility and responsiveness for our customers.

Closures of both facilities and Fairchild’s remaining five-inch wafer fabrication lines in Bucheon, South Korea, are planned to occur from Q2 to Q4 2015.

“An adaptive supply chain must be the foundation of any global manufacturer’s operations in the increasingly dynamic semiconductor solutions market,” said Mr. Thompson. “The realignment we are announcing today will maximize the utilization of eight-inch factories and reduce the complexity of our manufacturing footprint, while creating the flexibility to support ongoing customer demand through a greater use of external manufacturing sources. Fairchild will continue operating eight-inch wafer fabrication lines in South Portland, Maine and Mountain Top, Pennsylvania, as well as the Bucheon six- and eight-inch fabrication lines.”

Through the combined actions, Fairchild expects to incur approximately $36 million in cash restructuring and other costs. The company also plans to record during the closure process non-cash charges of approximately $25 million for accelerated depreciation. Once completed, the company expects to realize annual savings of approximately $45 to $55 million from a second quarter of 2014 financial baseline. Of these estimated savings, approximately 75 percent are expected to be cash savings, with the balance attributable to lower depreciation costs.