Category Archives: Atomic Layer Deposition


As the world of advanced manufacturing enters the sub-nanometer scale era, it is clear that ALD, MLD and SAM represent viable options for delivering the required few-atoms-thick layers required with uniformity, conformality, and purity.

BY BARRY ARKLES, JONATHAN GOFF, Gelest Inc., Morrisville PA; ALAIN E. KALOYEROS, SUNY Polytechnic Institute, Albany, NY

Device and system technologies across several industries are on the verge of entering the sub-nanometer scale regime. This regime requires processing techniques that enable exceptional atomic level control of the thickness, uniformity, and morphology of the exceedingly thin (as thin as a few atomic layers) film structures required to form such devices and systems.[1]

In this context, atomic layer deposition (ALD) has emerged as one of the most viable contenders to deliver these requirements. This is evidenced by the flurry of research and devel- opment activities that explore the applicability of ALD to a variety of material systems,[2,3] as well as the limited introduction of ALD TaN in full-scale manufacturing of nanoscale integrated circuitry (IC) structures.[4] Both the success and inherent limitations of ALD associated with repeated dual-atom interactions have stimulated great interest in additional self-limiting deposition processes, particularly Molecular Layer Deposition (MLD) and Self- Assembled Monolayers (SAM). MLD and SAM are being explored both as replacements and extensions of ALD as well as surface modification techniques prior to ALD.[5]

ALD is a thin film growth technique in which a substrate is exposed to alternate pulses of source precursors, with intermediate purge steps typically consisting of an inert gas to evacuate any remaining precursor after reaction with the substrate surface. ALD differs from chemical vapor deposition (CVD) in that the evacuation steps ensure that the different precursors are never present in the reaction zone at the same time. Instead, the precursor doses are applied as successive, non-overlapping gaseous injections. Each does is followed by an inert gas purge that serves to remove both byproducts and unreacted precursor from the reaction zone.

The fundamental premise of ALD is based on self-limiting surface reactions, wherein each individual precursor-substrate interaction is instantaneously terminated once all surface reactive sites have been depleted through exposure to the precursor. For the growth of binary materials, each ALD cycle consists of two precursor and two purge pulses, with the thickness of the resulting binary layer per cycle (typically about a monolayer) being determined by the precursor-surface reaction mode. The low growth rates associated with each ALD cycle enable precise control of ultimate film thickness via the application of repeated ALD cycles. Concurrently, the self-limiting ALD reaction mechanisms allow excellent conformality in ultra-high-aspect-ratio nanoscale structures and geometries.[6]

A depiction of an individual ALD cycle is shown in FIGURE 1. In Fig. 1(a), a first precursor A is introduced in the reaction zone above the substrate surface.

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Precursor A then adsorbs intact or reacts (partially) with the substrate surface to form a first monolayer, as shown in Fig. 1(b), with any excess precursor and potential byproducts being evacuated from the reaction zone through a subsequent purge step. In Fig. 1(d), a second precursor Y is injected into the reaction zone and is made to react with the first monolayer to form a binary atomic layer on the substrate surface, as displayed in Fig. 1(e). Again, all excess precursors and reaction byproducts are flushed out with a second purge step 1(f). The entire process is performed repeatedly to achieve the targeted binary film thickness.

In some applications, a direct or remote plasma is used as an intermediate treatment step between the two precursor-surface interactions. This treatment has been reported to increase the probability of surface adsorption by boosting the number of active surface sites and lowering the reaction activation energy. As a result, such treatment has led to increased growth rates and reduce processing temperatures.[7]

A number of benefits have been cited for the use of ALD, including high purity films, absence of particle contami- nation and pin-holes, precise control of thickness at the atomic level, excellent thickness uniformity and step coverage in complex via and trench topographies, and the ability to grow an extensive array of binary material systems. However, issues with surface roughness and large surface grain morphology have also been reported. Another limitation of ALD is the fact that it is primarily restricted to single or binary material systems. Finally, extremely slow growth rates continue to be a challenge, which could potentially restrict ALD’s applicability to exceptionally ultrathin films and coatings.

These concerns have spurred a renewed interest in other molecular level processing technologies that share the self-limiting surface reaction characteristics of ALD. Chief among them are MLD and SAM. MLD refers principally to ALD-like processes that also involve successive precursor-surface reactions in which the various precursors never cross paths in the reaction zone. [8] However, while ALD is employed to grow inorganic material systems, MLD is mainly used to deposit organic molecular films. It should be noted that this definition of MLD, although the most common, is not yet universally accepted. An alternative characterization refers to MLD as a process for the growth of organic molecular components that may contain inorganic fragments, yet it does not exhibit the self-limiting growth features of ALD or its uniformity of film thickness and step coverage.[2]

A depiction illustrating a typical MLD cycle, according to the most common definition, is shown in FIGURE 2. In Fig. 2(a), a precursor is introduced in the reaction zone above the substrate surface. Precursor C adsorbs to the substrate surface and is confined by physisorption (Fig. 2(b)). The precursor then undergoes a quick chemisorption reaction with a significant number of active surface sites, leading to the self-limiting formation of molecular attachments in specific assemblies or regularly recurring structures, as displayed in Fig. 2(c). These structures form at significantly lower process temperatures compared to traditional deposition techniques.

Screen Shot 2018-03-01 at 3.03.09 PM

To date, MLD has been successfully applied to grow exceptionally thin films for applications as organic, inorganic, and hybrid organic-inorganic dielectrics and polymers for IC applications; [1,9] nanoprobes for in-vitro imaging and interrogation of biological cells; [10] photoluminescent devices; [7] and lithium-ion battery electrodes.[11]

SAM is a deposition technique that involves the spontaneous adherence of organized organic structures on a substrate surface. Such adherence takes place through adsorption from the vapor or liquid phase through relatively weak interactions with the substrate surface. Initially, the structures are adsorbed on the surface by physisorption through, for instance, van der Waals forces or polar interactions. Subsequently, the self-assembled monolayers become slowly confined by a chemisorption process, as depicted in FIGURE 3.

Screen Shot 2018-03-01 at 3.03.18 PM

The ability of SAM to grow layers as thin as a single molecule through chemisorption-driven interactions with the substrate has triggered enthusiasm for its potential use in the formation of “near-zero-thickness” activation or barrier layers. It has also sparked interest in its appli- cability to area-selective or area-specific deposition. Molecules can be directed to exhibit preferential reactions with specific segments of the underlying substrate rather than others to facilitate or obstruct subsequent material growth. This feature makes SAM desirable for incorpo- ration in area-selective ALD (AS-ALD) or CVD (AS-CVD), where the SAM-formed layer would serve as a foundation or blueprint to drive AS-ALD or AS-CVD. [12,13]

To date, SAM has been effectively employed to form organic layers as thin as a single molecule for applications as organic, inorganic, and hybrid organic-inorganic dielec- trics; polymers for IC applications; [13,14] encapsulation and barrier layers for IC metallization; [15] photoluminescent devices; [5] molecular and organic electronics; [16] and liquid crystal displays.[17]

As the world of advanced manufacturing enters the sub-nanometer scale era, it is clear that ALD, MLD and SAM represent viable options for delivering the required few-atoms-thick layers required with uniformity, conformality, and purity. By delivering the constituents of the material systems individually and sequentially into the processing environment, and precisely controlling the resulting chemical reactions with the substrate surface, these techniques enable excellent command of processing parameters and superb management of the target specifications of the resulting films. In order to determine whether one or more ultimately make it into full-scale manufacturing, a great deal of additional R&D is required in the areas of understanding and establishing libraries of fundamental interactions, mechanisms of source chemistries with various substrate surfaces, engineering viable solutions for surface smoothness and rough morphology, and developing protocols to enhance growth rates and overall throughput.


1. Belyansky, M.; Conti, R.; Khan, S.; Zhou, X.; Klymko, N.; Yao, Y.; Madan, A.; Tai, L.; Flaitz, P.; Ando, T. Silicon Compat. Mater. Process. Technol. Adv. Integr. Circuits Emerg. Appl. 4 2014, 61 (3), 39–45.
2. George, S. M.; Yoon, B. Mater. Matters 2008, 3 (2), 34–37. 3. George, S. M.; Yoon, B.; Dameron, A. A. Acc. Chem. Res.
2009, 42 (4), 498–508.
4. Graef, E.; Huizing, B. International Technology Roadmap for
Semiconductors 2.0, 2015th ed.; 2015.
5. Kim, D.; Zuidema, J. M.; Kang, J.; Pan, Y.; Wu, L.; Warther, D.; Arkles, B.; Sailor, M. J. J. Am. Chem. Soc. 2016, 138 (46),
6. George, S. M. Chem. Rev. 2010, 110 (1), 111–131.
7. Provine, J.; Schindler, P.; Kim, Y.; Walch, S. P.; Kim, H. J.; Kim,
K. H.; Prinz, F. B. AIP Adv. 2016, 6 (6).
8. Räupke, A.; Albrecht, F.; Maibach, J.; Behrendt, A.; Polywka,
A.; Heiderhoff, R.; Helzel, J.; Rabe, T.; Johannes, H.-H.; Kowalsky, W.; Mankel, E.; Mayer, T.; Görrn, P.; Riedl, T. 226th Meet. Electrochem. Soc. (2014 ECS SMEQ) 2014, 64 (9), 97–105.
9. Fichtner, J.; Wu, Y.; Hitzenberger, J.; Drewello, T.; Bachmann, J. ECS J. Solid State Sci. Technol. 2017, 6 (9), N171–N175.
10. Culic-Viskota, J.; Dempsey, W. P.; Fraser, S. E.; Pantazis, P. Nat. Protoc. 2012, 7 (9), 1618–1633.
11. Loebl, A. J.; Oldham, C. J.; Devine, C. K.; Gong, B.; Atanasov, S. E.; Parsons, G. N.; Fedkiw, P. S. J. Electrochem. Soc. 2013, 160 (11), A1971–A1978.
12. Sundaram, G. M.; Lecordier, L.; Bhatia, R. ECS Trans. 2013, 58 (10), 27–37.
13. Kaufman-Osborn, T.; Wong, K. T. Self-assembled monolayer blocking with intermittent air-water exposure. US20170256402 A1, 2017.
14. Arkles, B.; Pan, Y.; Kaloyeros, A. ECS Trans. 2014, 64 (9), 243–249.
15. Tan, C. S.; Lim, D. F. In ECS Transactions; 2012; Vol. 50, pp 115–123.
16. Kong, G. D.; Yoon, H. J. J. Electrochem. Soc. 2016, 163 (9), G115–G121.
17. Wu, K. Y.; Chen, W. Y.; Wang, C.-H.; Hwang, J.; Lee, C.-Y.; Liu, Y.-L.; Huang, H. Y.; Wei, H. K.; Kou, C. S. J. Electrochem. Soc. 2008, 155 (9), J244.

By Ed Korczynski

Veeco Instruments (Veeco) recently announced that Veeco CNT—formerly known as Ultratech/Cambridge Nanotech—shipped its 500th Atomic Layer Deposition (ALD) system to the North Carolina State University. The Veeco CNT Fiji G2 ALD system will enable the University to perform research for next-generation electronic devices including wearables and sensors. Veeco announced the overall acquisition of Ultratech on May 26 of this year. Executive technologists from Veeco discussed the evolution of ALD technology with Solid State Technology in an exclusive interview just prior to SEMICON West 2017.

Professor Roy Gordon from Harvard University been famous for decades as an innovator in the science of thin-film depositions, and people from his group were part of the founding of Cambridge Nanotech in 2003. Continuity from the original team has been maintained throughout the acquisitions, such that Veeco inherited a lot of process know-how along with the hardware technologies. “Cambridge Nanotech has had a broad history of working with ALD technology,” said Ganesh Sandaren, VP of Veeco CNT Applied Technology, “and that’s been a big advantage for us in working with some major researchers who really appreciate what we’re providing.”

The Figure shows that the company’s ALD chambers have evolved over time from simple single-wafer thermal ALD, to single-wafer plasma-enhance ALD (PEALD), to a large chamber targeting batch processing of up to ten 370 mm x 470 mm (Gen2.5) flat-panels for display applications, and a “large area” chamber capable of 1m x 1.2m substrates for photovoltaic and FPD applications. The large area chamber allows customers to do things like put down an encapsulating layer or an active layer such as buffer materials on CIGS-based solar cells.

Evolution of Atomic-Layer Deposition (ALD) technology starts with single-wafer thermal chambers, adds plasma energy, and then goes to batch processing for manufacturing. (Source: Veeco CNT).

Evolution of Atomic-Layer Deposition (ALD) technology starts with single-wafer thermal chambers, adds plasma energy, and then goes to batch processing for manufacturing. (Source: Veeco CNT).

“There a tendency to think that ALD only belongs in the high-k dielectric application for semiconductor devices, but there are many ongoing applications outside of IC fabs,” reminded Gerry Blumenstock, VP and GM of MBE business unit and Veeco CNT. “Customers who want to do heterogeneous materials develop can now have MBE and ALD in a single tool connected by a vacuum cluster configuration. We have customers today that do not want to break vacuum between processes.” Veeco’s MBE tools are mostly used for R&D, but are also reportedly used for HVM of laser chips.

To date, Cambridge Nanotech tools are generally used by R&D labs, but Veeco is open to the possibility of creating tools for High-Volume Manufacturing (HVM) if customers call for them. “Now that this is part of Veeco, we have the service infrastructure to be able to support end-users in high-volume manufacturing like any of the major OEMs,” said Blumenstock. “It’s an interesting future possibility, but in the next six months to a year we’re focusing on improving our offering to the R&D community. Still, we’re staying close to HVM because if a real opportunity arose there’s no reason we couldn’t get into it.”

In IC fab R&D today, some of the most challenging depositions are of Self-Assembled Monolayers (SAM) that are needed as part of the process-flow to enable Direct Self-Assembly (DSA) of patterns to extend optical lithography to the finest possible device features. SAM are typically created using ALD-type processes, and can also be used to enable selective ALD of more than a monolayer. Veeco-CNT is actively working on SAM in R&D with multiple customers now, and claim that major IC device manufacturers have purchased tools.

At the leading edge of materials R&D, researchers are always experimenting with new chemical precursors. “Having a precursor that has good vapor-pressure, and is reactive yet somewhat stable is what is needed,” reminded Sundaram. “People will generally chose a liquid over a solid precursor because of higher vapor pressure. There are many classes of precursors, and many are halogens but they have disadvantages in some reactions. So we see continue to move to metal-organic precursors, which tend to provide good vapor-pressures and not form undesirable byproducts.”

Researchers from MIPT’s Center of Shared Research Facilities have found a way to control oxygen concentration in tantalum oxide films produced by atomic layer deposition. These thin films could be the basis for creating new forms of nonvolatile memory. The paper was published in the journal ACS Applied Materials & Interfaces, which has an impact factor of 7.14.

Want nonvolatile memory that’s fast as RAM and has the capacity of flash?

Because data storage and processing solutions are so central to modern technology, many research teams and companies are pursuing new types of computer memory. One of their major goals is to develop universal memory — a storage medium that would combine the high speed of RAM with nonvolatility of a flash drive.

A promising technology for creating such a device is resistive switching memory, or ReRAM. It works by changing the resistance across a memory cell as a result of applied voltage. Since each cell has a high- and a low-resistance state, it can be used to store information, e.g., in the form of zeros and ones.

A ReRAM cell can be realized as a metal-dielectric-metal structure. Oxides of transition metals such as hafnium and tantalum have proved useful as the dielectric component of this layered structure. Applying voltage to a memory cell that is based on these materials causes oxygen migration, changing its resistance. This makes the distribution of oxygen concentration in the oxide film a crucial parameter determining the functional properties of the memory cell.

However, despite significant advances in ReRAM development, flash memory shows no sign of losing ground. The reason for this is that flash memory allows for three-dimensional memory cell stacking, which enables a much greater storage density. In contrast to this, oxygen-deficient film deposition techniques normally used in ReRAM design are not applicable to functional 3-D architectures.

That’s where atomic layer deposition comes in

In a bid to find an alternative technique, MIPT researchers turned to atomic layer deposition, a chemical process by which thin films can be produced on the surface of a material. During the last decade, ALD has become increasingly widespread, with numerous applications in nanoelectronics, optics, and the biomedical industry. There are two major advantages to atomic layer deposition. The first one is the unprecedented control over film thickness: It is possible to deposit films that are several nanometers thick with an error of a fraction of a nanometer. The other advantage is that ALD enables conformal coating of 3-D structures, which is problematic for most of the currently used nanofilm deposition techniques.

In an ALD process, a substrate is sequentially exposed to two chemicals that are known as the precursor and the reactant. It is the chemical reaction between these two substances that produces a coating layer. In addition to the element used in the coating, precursors contain other compounds — e.g., of carbon or chlorine — called ligands. They facilitate the reaction but, in an ideal ALD process, have to be completely removed from the resulting film once the interaction with the other chemical (reactant) has occurred. It is vital to choose the right substances for use in atomic layer deposition. Although it proves difficult to deposit oxide films with variable oxygen concentration by ALD, they are essential for ReRAM.

“The hardest part in depositing oxygen-deficient films was finding the right reactants that would make it possible to both eliminate the ligands contained in the metallic precursor and control oxygen content in the resulting coating,” says Andrey Markeev, who holds a PhD in physics and mathematics and is a leading researcher at MIPT. “We achieved this by using a tantalum precursor, which by itself contains oxygen, and a reactant in the form of plasma-activated hydrogen.” Confirming the experimental findings turned out to be a challenge in itself. As soon as the experimental sample is removed from the vacuum chamber, which houses it during ALD, and exposed to the atmosphere, this causes modifications in the top layer of the dielectric, making it impossible to detect oxygen deficiency using analytic techniques such as electron spectroscopy, which target the surface of the sample.

“In this study, we needed not just to obtain the films containing different amounts of oxygen but also to confirm this experimentally,” says Konstantin Egorov, a PhD student at MIPT. “To do this, our team worked with a unique experimental cluster, which allowed us to grow films and study them without breaking the vacuum.”

Lam Research Corp. (Nasdaq: LRCX), an advanced manufacturer of semiconductor equipment, today announced that it is expanding its atomic layer etching (ALE) portfolio with the addition of ALE capability on its Flex dielectric etch systems. Enabled by Lam’s Advanced Mixed Mode Pulsing (AMMP) technology, the new ALE process has demonstrated the atomic-level control needed to address key challenges in scaling logic devices to 10nm and below. First in the industry to use plasma-enhanced ALE in production for dielectric films, the latest Flex system has been adopted as tool of record for high-volume manufacturing of logic devices.

“From transistor and contact creation to interconnect patterning, a new level of precision is needed by logic manufacturers to continue scaling beyond the 10nm technology node,” said Vahid Vahedi, group vice president, Etch Product Group. “For device-enabling applications like self-aligned contacts, where etch helps create critical structures, conventional technologies do not provide sufficient control for the stringent specifications now demanded. Our latest Flex product with dielectric ALE delivers atomic-scale control with proven productivity to meet customers’ key requirements.”

To continue logic device scaling, chipmakers are adopting new integration schemes such as those using self-aligned contacts (SACs) in order to address issues like RC delay. As a result, contact etch has become one of the most crucial processes, directly impacting both wafer yield and transistor performance. In order to define critical device structures with high fidelity, the etch process requires directional (anisotropic) capability with ultra-high selectivity, while also delivering the productivity needed for manufacturing.

For next-generation logic and foundry applications, Lam’s Flex dielectric etch systems offer the industry’s most advanced capacitively coupled plasma (CCP) reactor, featuring a unique, small-volume design to deliver repeatable results. The latest system uses proprietary AMMP technology to enable ALE of dielectric films such as silicon dioxide (SiO2). This capability results in a 2x improvement in selectivity over previous dielectric etch technologies while delivering atomic-level control.

Lam Research Corp. (NASDAQ: LRCX), an advanced manufacturer of semiconductor equipment, today introduced an atomic layer deposition (ALD) process for depositing low-fluorine-content tungsten films, the latest addition to its ALTUS family of products. With the industry’s first low-fluorine tungsten (LFW) ALD process, the ALTUS Max E Series addresses memory chipmakers’ key challenges and enables the continued scaling of 3D NAND and DRAM devices. Building on Lam’s market-leading product portfolio for memory applications, the new system is gaining market traction worldwide, winning production positions at leading 3D NAND and DRAM manufacturers and placement at multiple R&D sites.

“Consumer demand for ever more powerful devices is driving the need for high-capacity, high-performance storage, and deposition and etch are key process technology enablers of advanced memory chips,” said Tim Archer, Lam’s chief operating officer. “With the addition of the ALTUS Max E Series, we are expanding our memory portfolio and enabling our customers to capitalize on this next wave of industry drivers. Over the past twelve months, as the 3D NAND inflection has accelerated, we have doubled our shipments for these applications, leading to the largest deposition and etch installed base in our 3D NAND served markets.”

As manufacturers increase the number of memory cell layers for 3D NAND, two issues have become apparent for tungsten deposition in the word line fill application. First, fluorine diffusion from the tungsten film into the dielectrics can cause physical defects. Second, higher cumulative stress in devices with more than 48 pairs has resulted in excessive bowing. The resulting defects and stress can cause yield loss, as well as degraded electrical performance and device reliability. Because of these issues, tungsten films for advanced 3D NAND devices must have significantly reduced fluorine and intrinsic stress. Further, as critical dimensions shrink, resistance scaling becomes more challenging for the DRAM buried word line, as well as for metal gate/metal contact applications in logic devices.

“As memory chip manufacturers move to smaller nodes, the features that need to be filled are increasingly narrow and have higher aspect ratios,” said Sesha Varadarajan, group vice president, Deposition Product Group. “Lam’s new LFW ALD solution uses a controlled surface reaction to tune stress and fluorine levels and to lower resistance, all while delivering the required tungsten fill performance and productivity. When compared to chemical vapor deposition tungsten, the ALTUS Max E Series lowers fluorine content by up to 100x, lowers stress by up to 10x, and reduces resistivity by over 30%, solving some of our customers’ most critical scaling and integration challenges.”

The ALTUS Max E Series with LFW ALD technology offers a unique all-ALD deposition process that leverages Lam’s PNL (Pulsed Nucleation Layer) technology, which is the industry benchmark for tungsten ALD with 15 years of market leadership and more than 1,000 modules in production. Lam led the transition of chemical vapor deposition (CVD) tungsten nucleation to ALD tungsten nucleation with its PNL technology. The company continued that leadership by advancing low-resistivity tungsten solutions with its products ALTUS Max with PNLxT™, ALTUS Max with LRWxT, and ALTUS Max ExtremeFill for enhanced fill performance.

The ALTUS products use Lam’s quad-station module (QSM) architecture to allow per-station optimization of tungsten nucleation and fill for fluorine, stress, and resistance without compromising fill performance since station temperature can be set independently. The QSM configuration also maximizes productivity of the all-ALD process by providing up to 12 pedestals per system, enabling the highest footprint productivity in the industry.

Ultratech, Inc., a supplier of lithography, laser­ processing and inspection systems used to manufacture semiconductor devices and high­brightness LEDs (HB­ LEDs), as well as atomic layer deposition (ALD) systems, announced the formation of a research collaboration with Professor Thomas J. Webster, Ph.D. at Northeastern University, to study the use of nano-materials produced via ALD for medical applications. The initial research has focused on inhibiting bacterial growth and inflammation and promoting cell and tissue growth.

Dr. Thomas Webster, Chair and Professor of Chemical Engineering at Northeastern, said, “We are very excited to embark on this collaboration with Ultratech-CNT. While we are in the early stages of this study, the initial results of our work suggest that the materials and processes we are developing could have long-range impact in this field.”

Ultratech-CNT Senior Research Scientist Ritwik Bhatia, Ph.D., who has been working closely with Professor Webster, explained, “This type of work is a marked departure from the traditional applications and uses for ALD and dramatically opens up a new field where material science and life sciences intersect. I am extremely pleased to be part of this research program and excited by the potential benefits for healthy surgical outcomes that this research represents.”

Arthur W. Zafiropoulo, Ultratech’s Chairman and Chief Executive Officer, said, “At Ultratech, we have long maintained and understood that material science would play a key role in moving many emerging technological fields forward. We also feel that it can serve a much larger role, namely in improving the quality of life. In linking the expertise of Prof. Webster and his research group with Ultratech-CNT’s ALD group, we believe we are taking steps to solidly and efficiently pursue our scientific and commercial goals.”

Samco, a Japan-based semiconductor process equipment developer and manufacturer, is employing around 20 more people at its locations in North America, China, Taiwan and Singapore, as well as its subsidiary Samco-UCP in Liechtenstein, in order to better provide services and support to overseas customers.

“Increasing the number of Samco employees abroad is part of the company’s larger strategy to optimize our current sales structure while actively growing our customer base across the globe,” says Osamu Tsuji, Samco’s President, Chairman and CEO.

Samco offers systems and services that revolve around three major technologies, namely thin film deposition with PECVD, MOCVD and ALD systems; microfabrication with ICP etching, RIE and DRIE systems; and surface treatment with plasma cleaning and UV ozone cleaning systems.

“We’ve seen an increase in laser diode, MEMS and power device-related inquiries from abroad,” says Tsuji. “Systems for research and development at universities and research institutions, which is an area Samco specializes in, are also in high demand.”

This includes India, where the growing economy is expected to accelerate in the future. The Indian Institute of Technology Bombay recently installed one of Samco’s DRIE systems and collaborated with Samco to host the company’s first thin-film technology workshop in the country.

Samco is currently considering offering internships to students at IIT Bombay and has started gathering a team that will focus on cultivating the Indian market, Tsuji adds.

Future goals include doubling its on-site staff by July 2018, discussing the possibility of new locations in the future, and ensuring its overseas sales encompass at least 50% of the company’s total net sales within the next two or three years.

“Semiconductor equipment manufacturers’ overseas sales generally account for around 70 or 80 percent of their total net sales,” Tsuji says. “Samco has great potential for growth in the future. With these markets, we’ll actively expand and reach our goal of at least 10 billion yen in total net sales.”

In the world of nano-scale technology, where work is conducted at the atomic level, even the smallest changes can have an enormous impact. And a new discovery by a University of Alberta materials engineering researchers has caught the attention of electronics industry leaders looking for more efficient manufacturing processes.

Triratna Muneshwar, a postdoctoral fellow in the Department of Chemical and Materials Engineering and Ken Cadien, a materials engineering professor, have developed a new method of making thin films–materials that are essential in today’s computers and electronic devices–by adapting current atomic layer deposition techniques.

Atomic layer deposition (ALD) is exactly what the name implies. Thin films are coated with molecule-thin layers of materials like zinc, silicon, nitrogen, and so on. In the manufacturing process, the film is placed inside a small chamber and prepared by being treated with a “sticky” precursor layer. Gasses are then pumped inside, coating and chemically binding to receptors on the precursor layer.

The problem is that some of the molecules coming to rest on top of the precursor layer are so large that they block other receptor points. It’s like five people taking up 10 seats on a bus.

However, Muneshwar observed that those large molecules almost immediately shed ligands that do not connect to the precursor layer, freeing up previously blocked receptors. But by this time, the gas has been pumped out of the chamber and cannot be used a second time. “Although few strategies have been proposed to recycle this unreacted gas, residual impurities within remains a serious concern,” he notes.

Muneshwar wondered if he could create a more dense and uniform layer by pumping gas into the chamber in smaller doses, waiting just a fraction of a second for the ligands to slough off and free up receptors, and then pumping in another small dose of gas.

He developed the idea while working as a PhD under Cadien’s supervision.

“My interest in this came about in a conversation with Dr. Cadien and one of his colleagues who said that precursor costs are a challenge,” said Muneshwar. Then, while attending an international conference in last year, Muneshwar asked industry engineers and researchers about ALD and precursor costs in particular.

“I asked one fellow ‘What if I could cut your precursor costs in half?’ and he realized the impact this would have on their manufacturing processes. Later that day when I ran into him, I was told that he discussed this idea with his boss and they would be very interested in our work,” Muneshwar said.

After returning to campus, Muneshwar began crunching numbers and found that on paper, the pulsed layering concept held promise. After refining his work, Muneshwar had developed a mathematical model that demonstrated the technique would work.

“In a lot of cases you do an experiment and then come up with the formula that explains what happened,” Cadien said. “But Triratna wrote the model first and it predicted exactly what happened in the experiment.”

Muneshwar and Cadien have published a paper on their discovery in the Journal of Applied Physics. Since the article’s appearance, they have been contacted by industry leaders requesting copies of the paper.

While small amounts of materials like zinc or silicon are required to produce thin film devices, Cadien says the costs are not insignificant–they can come in at $500 or $600 per gram and the current processes are wasteful, dosing surfaces with anywhere from 100 to 10,000 times the molecules required.

“Some of these are big molecules and in semiconductor manufacturing if you’re a company producing 10,000 12-inch wafers a week–small amounts of something add up to big amounts of something.”

The market precursors used in ALD is estimated to hit $400 million U.S. by 2020.

The two hope their discovery can lead to collaborative work with new industry partners in the future. Cadien notes that Muneshwar’s work could have a lasting impact on industrial practices because he was willing to experiment with the high-tech equipment available to him here.

“There are more than 1,000 atomic layer deposition systems in the world,” said Cadien, “but there’s only a small handful of people asking why and how these things work, who are trying new things. When you’re doing that, you can come up with breakthroughs like this.”

Stanford University researchers sponsored by Semiconductor Research Corporation (SRC) have developed a new area selective atomic layer deposition (ALD) process that promises to accelerate the manufacturing of higher performing, more energy efficient semiconductors.

It is well known that next-generation electronic, optoelectronic and sensing devices that contain nanoscale dimensions face increasingly difficult materials and fabrication challenges as the downward scaling of these devices continues. Conventional semiconductor manufacturing processes are time-consuming and expensive, in part due to the need for lithographic patterning. The Stanford research leverages simple ALD and etching processes that eliminate this lithography step and improve selective deposition of dielectric materials by more than 10 times in film thickness compared to similar advanced processes.

Due to difficulties of current top-down fabrication processes that contain multiple deposition, lithography and etching steps, along with problems with misalignment in lithography, using an alternative approach in which the desired materials are directly and selectively deposited would significantly facilitate the process, according to the Stanford team.

“Our technology is a promising candidate for overcoming the challenges of top-down processing and misalignment because it greatly improves the ability to perform selective deposition of materials. This research introduces a novel processing method to meet the increasingly difficult materials challenges associated with new devices,” said Dr. Stacey Bent, Department of Chemical Engineering Chair and Jagdeep and Roshni Singh Professor in School of Engineering, Stanford University.

Current approaches utilize lithography for nanoscale patterning. Using lithography and etching for fabrication of 2D or 3D structures often results in misaligned features and causes a risk of shorting or high resistant areas. However, selective deposition using ALD can reduce these risks and reduce the process time and steps.

Bent explained that selective deposition allows layers of material to be added onto a substrate only where desired without the need for additional lithography steps. However, the high level of selectivity needed for a manufacture-worthy process has not yet been achieved in area selective deposition studies. In addition, most methods for area selective deposition require long processing times.

The Stanford research has been focused on selective deposition of dielectric materials on metal/dielectric patterns. These type of structures can be found in interconnects and back-end-of-line (BEOL) processing. With ALD being used in other stages of the device fabrication process as well, the results from the Stanford experiments can potentially be applied to a variety of nanoscale electronic, optoelectronic and sensing devices.

The research developments occurred during the second year of research on the topic, and the Stanford team is continuing to explore new methods for area selective ALD to improve both selectivity and manufacturability.

“The Stanford team’s research has shown for the first time that, by following selective deposition of a dielectric material using pre-treatment by an inhibitory material, they can significantly reduce the process time (from 48 hours to less than 1 hour) and also improve the limits of selective deposition of dielectrics by more than 10 times,” said Kwok Ng, Senior Science Director of Nanomanufacturing Materials and Processes at SRC.

CVD Source Materials

December 17, 2015

Reaction materials for chemical vapor deposition (CVD) and atomic layer deposition (ALD) are typically delivered into the chamber in a gaseous form. CVD polycrystalline silicon, for example, is deposited from trichlorosilane (SiHCl3) or silane (SiH4), using the following reactions:

SiH3Cl → Si + H2 + HCl
SiH4 → Si + 2 H2

This reaction is usually performed in LPCVD systems, with either pure silane feedstock, or a solution of silane with 70–80% nitrogen. Polysilicon may be grown directly with doping, if gases such as phosphine, arsine or diborane are added to the CVD chamber.

Silicon dioxide (usually called simply “oxide” in the semiconductor industry) may be deposited by several different processes. Common source gases include silane and oxygen, dichlorosilane (SiCl2H2) and nitrous oxide (N2O), or tetraethylorthosilicate (TEOS; Si(OC2H5)4). The reactions are as follows:

SiH4 + O2 → SiO2 + 2 H2
SiCl2H2 + 2 N2O → SiO2 + 2 N2 + 2 HCl
Si(OC2H5)4 → SiO2 + byproducts

CVD source materials are typically gases, such as silane and nitrogen, but can also be liquids: There are now a larger variety of liquid sources used in the semiconductor, FPD and PV manufacturing processes.

CVD Sources

The graph above shows the different possible states of matter. There are two ways to get from a liquid to a gaseous state. The first method involves increasing the temperature while holding the pressure steady, as indicated by the arrow with the broken line. This method is commonly used in everyday settings—to boil water and convert it to steam, for example. Heating a liquid takes time, however, which makes rapid vaporization difficult. On the other hand, one can also heat the liquid in advance and then abruptly reduce the pressure, as illustrated by the arrow with the solid line. The pressure in the vaporization section of the injector can be reduced instantaneously, and this makes it possible to vaporize a liquid source instantaneously.