Category Archives: Resource Guide

Worldwide semiconductor wafer-level manufacturing equipment market declined 1% in 2015

April 6, 2016

Worldwide semiconductor wafer-level manufacturing equipment revenue totaled $33.6 billion in 2015, a 1 percent decline from 2014, according to final results by Gartner, Inc. The top 10 vendors accounted for 77 percent of the market, down slightly from 78 percent in 2014.

“Slowing demand for key electronics end markets, combined with looming oversupply in memory, prompted semiconductor manufacturers to adopt conservative capital spending plans in 2015, which impacted spending on WFE,” said Bob Johnson, research vice president at Gartner. “Strength in memory spending was not sufficient to overcome caution in logic markets as major producers focused on logic process upgrades instead of adding new capacity.”

Applied Materials retained the No. 1 position in the WFE market with 1.3 percent growth (see Table 1). The industry’s investments in 3D device manufacturing, fin field-effect transistor (FinFET) and 3D NAND were the main drivers for the company’s growth in 2015. Lam Research experienced the strongest growth of the top 10 vendors in 2015, moving into the No. 2 position. The move of the industry to 3D device manufacturing pushed the company to 24.7 percent growth. Lam continues to be the dominant conductor etch manufacturer, but competition in the etch and deposition segment is expected to be fierce moving forward.

Table 1. Top 10 Companies’ Revenue From Shipments of Total Wafer-Level Manufacturing Equipment, Worldwide (Millions of U.S. Dollars)

Rank 2015	Rank 2014	Vendor	2015 Revenue	2015 Market Share (%)	2014 Revenue	2014-2015 Growth (%)
1	1	Applied Materials	6,420.2	19.1	6,335.1	1.3
2	4	Lam Research	4,808.3	14.3	3,857.0	24.7
3	2	ASML	4,730.9	14.1	5,634.5	-16.0
4	3	Tokyo Electron	4,325.0	12.9	4,666.7	-7.3
5	5	KLA-Tencor	2,043.2	6.1	2,129.2	-4.0
6	6	Screen Semiconductor Solutions	971.5	2.9	1,128.0	-13.9
7	10	Hitachi High-Technologies	788.3	2.3	937.3	-15.9
8	7	Nikon	724.2	2.2	818.1	-11.5
9	9	Hitachi Kokusai	633.8	1.9	599.3	5.7
10	13	ASM International	582.5	1.7	557.2	4.5
		Others	7,576.7	22.5	7,271.2	4.2
		Total Market	33,604.3	100	33,933.6	-1.0

Source: Gartner (April 2016)

“Capital spending in 2015 was selective, with logic manufacturers focused on upgrades and the latest technology buys, while memory added new capacity in response to increased demand and favorable pricing,” said Mr. Johnson. “However, there was another factor at work: Both the yen and euro declined significantly against the dollar in 2015. In a market which was essentially flat over the previous year, the changes in these exchange rates had a noticeable effect, especially in the lithography segment, where all tools are priced in either euros or yen.”

In dollar terms, lithography dropped 13 percent, the largest decline of any of the major segments. Two segments were especially strong: The ion implant segment grew 24 percent, and the material removal and clean segment grew 6 percent. Process control overall declined 2.5 percent, with the optical patterned wafer inspection segment dropping 15 percent as manufacturers held back on purchases of new inspection tools.

Additional information is provided in the Gartner report “Market Share: Semiconductor Wafer-Level Manufacturing Equipment, Worldwide, 2015.” The report provides rankings and market share for the top 10 vendors. In 2015, Gartner changed the segment reporting to focus on wafer-level manufacturing and is no longer providing segment details for die-level packaging or automatic test. This report is limited to wafer-level manufacturing equipment.

Molecular-scale ALD discovery could have industrial-sized impact

March 31, 2016

In the world of nano-scale technology, where work is conducted at the atomic level, even the smallest changes can have an enormous impact. And a new discovery by a University of Alberta materials engineering researchers has caught the attention of electronics industry leaders looking for more efficient manufacturing processes.

Triratna Muneshwar, a postdoctoral fellow in the Department of Chemical and Materials Engineering and Ken Cadien, a materials engineering professor, have developed a new method of making thin films–materials that are essential in today’s computers and electronic devices–by adapting current atomic layer deposition techniques.

Atomic layer deposition (ALD) is exactly what the name implies. Thin films are coated with molecule-thin layers of materials like zinc, silicon, nitrogen, and so on. In the manufacturing process, the film is placed inside a small chamber and prepared by being treated with a “sticky” precursor layer. Gasses are then pumped inside, coating and chemically binding to receptors on the precursor layer.

The problem is that some of the molecules coming to rest on top of the precursor layer are so large that they block other receptor points. It’s like five people taking up 10 seats on a bus.

However, Muneshwar observed that those large molecules almost immediately shed ligands that do not connect to the precursor layer, freeing up previously blocked receptors. But by this time, the gas has been pumped out of the chamber and cannot be used a second time. “Although few strategies have been proposed to recycle this unreacted gas, residual impurities within remains a serious concern,” he notes.

Muneshwar wondered if he could create a more dense and uniform layer by pumping gas into the chamber in smaller doses, waiting just a fraction of a second for the ligands to slough off and free up receptors, and then pumping in another small dose of gas.

He developed the idea while working as a PhD under Cadien’s supervision.

“My interest in this came about in a conversation with Dr. Cadien and one of his colleagues who said that precursor costs are a challenge,” said Muneshwar. Then, while attending an international conference in last year, Muneshwar asked industry engineers and researchers about ALD and precursor costs in particular.

“I asked one fellow ‘What if I could cut your precursor costs in half?’ and he realized the impact this would have on their manufacturing processes. Later that day when I ran into him, I was told that he discussed this idea with his boss and they would be very interested in our work,” Muneshwar said.

After returning to campus, Muneshwar began crunching numbers and found that on paper, the pulsed layering concept held promise. After refining his work, Muneshwar had developed a mathematical model that demonstrated the technique would work.

“In a lot of cases you do an experiment and then come up with the formula that explains what happened,” Cadien said. “But Triratna wrote the model first and it predicted exactly what happened in the experiment.”

Muneshwar and Cadien have published a paper on their discovery in the Journal of Applied Physics. Since the article’s appearance, they have been contacted by industry leaders requesting copies of the paper.

While small amounts of materials like zinc or silicon are required to produce thin film devices, Cadien says the costs are not insignificant–they can come in at $500 or $600 per gram and the current processes are wasteful, dosing surfaces with anywhere from 100 to 10,000 times the molecules required.

“Some of these are big molecules and in semiconductor manufacturing if you’re a company producing 10,000 12-inch wafers a week–small amounts of something add up to big amounts of something.”

The market precursors used in ALD is estimated to hit $400 million U.S. by 2020.

The two hope their discovery can lead to collaborative work with new industry partners in the future. Cadien notes that Muneshwar’s work could have a lasting impact on industrial practices because he was willing to experiment with the high-tech equipment available to him here.

“There are more than 1,000 atomic layer deposition systems in the world,” said Cadien, “but there’s only a small handful of people asking why and how these things work, who are trying new things. When you’re doing that, you can come up with breakthroughs like this.”

A new class of MFCs with embedded flow diagnostics

March 31, 2016

Recent trends in multi-sensor measurements within a mass flow controller are reviewed, with a focus on controller self-diagnostics.

BY WILLIAM VALENTINE and SHAUN PEWSEY, Brooks Instrument, Hatfield, PA

Sub 20nm nodes and complex 3D architecture are driving new process control challenges. In regards to gas delivery, these complex and highly sensitive processes require mass flow controllers (MFCs) to provide better accuracy, repeatability, long term stability and consistent dynamic response. In addition, foundries are driving a need for greater process and equipment flexibility which means the MFC must meet demanding process requirements across a wider control range.

While the quality, reliability, accuracy, response and range of MFCs continues to improve year after year, the process is still at risk because meaningful real-time in situ data is limited or nonexistent. Consequently, an error in delivered flow that is substantial enough to cause yield and scrap issues would go undetected until the next off-line flow check.

In situ data traditionally has been limited to detecting obvious hard failures such as an MFC that is not communicating; the flow output doesn’t meet the set point; or the MFC output at a zero set point is offset (not zero). A zero offset will cause a change in flow accuracy if it is due to an active change in the zero reference of the flow meter. However, zero offsets recorded during a process can also be caused by an MFC valve leak or even an isolation valve leak. A few fault detection and clarification (FDC) systems attempt to trend valve voltage but hysteresis of up to 40 percent of a reading means that only obvious failures can be detected.

In lieu of in situ flow data, flow tests are performed off-line using a technique such as chamber rate of rise (ROR). The ROR technique is simply to evacuate a known volume, flow gas into it and measure pressure change. With chamber ROR, the known volume is the processing chamber. The chamber is taken off-line (not running a process) and the MFC is given a flow set point. As gas flows into the constant volume chamber, the chamber pressure rises at a constant rate. Flow can be calcu- lated using the gas law as shown in FIGURE 1. Off-line testing reduces tool availability and can only detect flow errors after the fact, placing wafer lots at risk. Chamber ROR accuracy is +/- 3 percent of reading to +/- 5 percent of reading, depending on flow rate, gas properties, temperature gradients, manometer accuracy and chamber outgassing. Even if a better flow standard is available, flow tests are time-consuming. Chamber ROR testing every MFC at only one set point on a four-chamber etch tool can take 12 hours and is typically performed weekly.

Process engineers are seeking an in situ flow verification process to ensure process repeatability enabling real-time FDC to alarm on conditions that could lead to wafer scrap. In situ flow data could also be used to intelligently determine when to take a tool down for flow verification tests instead of running time-consuming weekly flow maintenance checks on all MFCs.

The evolution of the MFC

In 2004, MFC manufacturers developed pressure transient insensitive (PTI) MFCs. Pressure sensors were added to measure fluctuations in pressure and advanced control concepts were introduced to compensate for pressure fluctuations in real time.

Recently, several manufacturers have experimented with using pressure and temperature signals available in PTI MFCs to determine if the controller accuracy is degrading. (The authors have used the phrase “multi- sensor diagnostics” to describe this new class of advanced MFCs). Every multi-sensor diagnostic technique involves some form of pressure rate of decay (ROD). ROD is similar to chamber ROR except instead of flowing into a constant volume and measuring the pressure rise, flow is released from a constant volume and the rate of pressure decay is measured. The concept has been around for 30 years and involves shutting off an upstream valve to create a constant volume and measuring the pressure drop within the volume. The technique wasn’t practical until digital processors with enough computational power were available to perform the technique.

Multi-sensor diagnostic instrumentation can be broken into two groups. The first group (idle self-diagnostic) can only perform self-diagnostics while the tool is idle or in between process steps. Pressure decay in the volume is measured but there is no attempt to control flow. The signature of the pressure drop is compared to a previous measurement and analyzed to look for changes. While considered an improvement, this technique does not provide true in situ data and a dynamic event during a process could easily go undetected. The second group (active self-diagnostic) actively controls process steps while the pressure decay is measured. Although more challenging to implement, this technique enables true in situ flow verification (FIGURE 2).

Examples of idle self-diagnostics

Example 1 – thermal MFC: The upstream isolation valve is closed and the position of the flow control valve is frozen. The MFC then records pressure decay. The characteristics of the pressure decay curve are compared to a baseline curve. Changes in the curve are trended to determine if a flow sensor is degrading (FIGURE 3). Special maintenance checks would have to be programed into the tool controller to take advantage of this technique as it cannot be triggered during a normal process run.

Example 2 – pressure-based MFC: Traditional pressure- based MFCs measure pressure drop across a laminar flow element (LFE) (FIGURE 4). The valve must be placed upstream for two reasons. First, the pressure measurement is more accurate and stable if P2 is vacuum; second, this method requires a stable inlet pressure, P1. The downside to placing the valve upstream is slow turn off. The gas must bleed through the laminar flow element after the gas is turned off. The bleed downtime is a function of gas properties, the laminar flow element volume upstream of the LFE, and pressure in the upstream volume. For multi-sensor diagnostics, the manufacturer takes advantage of the bleed-down and characterizes the pressure decay every time the MFC is given a command to shut off. Any deviation from baseline signifies a change in either the LFE flow path or pressure sensors, and would trigger the user to perform a maintenance check.

Active self-diagnostics

Unlike idle self-diagnostics, where MFC characterization is performed when the MFC is not running a process, the latest development in multi-sensor self-diagnostics enables true in situ flow verification. This means flow anomalies can be captured in real-time during a process and assessed before several wafers are affected.

FIGURE 5 shows the cross-section of a multi-sensor self-diagnostic MFC mounted on a traditional surface mount gas stick. In this example, the MFC contains a pilot valve that enables the MFC to control the state of the upstream isolation valve. Other implementations integrate the isolation valve into the body of the MFC.

The MFC closes the upstream isolation valve when it is ready to take a secondary flow measurement. This creates a fixed volume between the isolation valve and the MFC control valve. While pressure decays in the volume, the MFC control system continues to maintain flow while recording pressure, temperature and time. A secondary flow measurement is computed based on the pressure decay (ROD) and compared to baseline data recorded during the installation of the MFC on the tool. Once this measurement is complete, the MFC re-opens the isolation valve. PTI technology is used to compensate for the initial pressure spike, ensuring continued stable flow. The same measurement technique can be used to monitor zero drift and valve leak when the MFC is given a zero set point.

Case study on etch process tool at leading IDM

Two multi-sensor MFCs capable of active self-diagnostics were installed on an etch chamber at a major integrated device manufacturer. The MFCs were configured to store accuracy, zero drift and valve leak self-diagnostic data in flash memory located within the MFC. Perfor- mance transparency tests were run with self-diagnostics activated to ensure the technology did not change the process. The process engineers continued to perform regular off-line flow verification tests at a set point of 30 percent. No accuracy issues were detected by the tradi- tional maintenance tests and no adjustments such as re-zeroing or re-calibration were performed. Data was collected for 24 months.

Active multi-sensor diagnostics vs. off-line chamber ROR: Self-diagnostic data was collected during the regular off-line flow verification tests. FIGURE 6 shows that repeatability of self-diagnostics was 8X better than the time-consuming off-line flow verification tests.

Active flow accuracy: The etch process utilized MFC set points of 4 percent, 12 percent, 24 percent and 40 percent (FIGURE 7). In situ active self-diagnostic data was automatically collected at each set point every three seconds during wafer processing. The MFC flow accuracy was very repeatable over the two-year test period at set points of 24 percent and 40 percent. However, flow accuracy at 4 percent shows an increase in flow of 1 percent over the two-year evaluation period. Note that off-line flow verification tests were only performed at a set point of 30 percent where the MFC is stable. Tradi- tional off-line chamber ROR flow tests proved not only to be costly, but also ineffective in detecting flow changes in this case.

In situ zero drift trending: Increasing flow errors at low set points usually indicate a change in the zero of the flow meter. The output of a flow meter should be zero at no flow. However, all measurement instruments will eventually drift resulting in some level of zero offset. A small zero offset in the flow meter is a negligible part of the flow signal at a high flow rate. However, small zero offsets can become significant when the MFC is operated at low set point such as 4 percent shown in this tool data. Conse- quently, the self-diagnostic zero reading was analyzed to see if the accuracy error at a 4 percent set point correlated with zero drift.

The MFC zero drift rate was < 0.027 percent full scale (FS) per year. This is exceptionally stable and 20X less than the spec limit (FIGURE 8). No mainte- nance test performed today on-tool would identify this low level of zero drift. This data highlights recent improvements in the stability of thermal MFCs. However, expanding the zero drift axis does reveal a slight trend in zero of 0.045 percent FS. This offset is exactly equal to the 1.1 percent of reading flow error identified during process runs at the 4 percent set point.

Valve leak: Valve leak is linked to first wafer effects and can indicate contamination in the gas delivery line. Excessive valve leak can cause loss of control at low set points. Self-diagnostic valve leak was trended during this study. The MFC valve leak was extremely low and stable throughout the study (FIGURE 9). Process engineers typically get concerned when valve leak reaches 0.5 percent FS to 1.0 percent FS. The data reveals excellent resolution of the valve measurement and demonstrates how easy it would be to detect changes in valve leak well before it could affect process yield.

TABLE 1 compares data and resolution available in situ from a traditional MFC; a tool in idle mode; a tool off-line; and the active multi-sensor self-diagnostic data captured in this study. The process knowledge gained from this technology enables the process engineer to be proactive instead of reactive. In addition, an intelligent FDC system could use this data to identify more subtle MFC issues such as excessive sensitivity to changes in pressure or temperature, and even leaks in the gas stick isolation valves.

Conclusions

This data highlights how current best known methods for MFC on-tool monitoring and off-line maintenance are unable to capture changes in process and ensure repeatability.
The on-tool study demonstrated multi-sensor self- diagnostic MFC technology is a process-transparent upgrade with the capability to:

• Track flow changes in situ with 10X better resolutionthan currently available for off-line flow verification processes

• Enable advanced fault detection and classification where MFC performance is tracked while running process, and logic trees can be set up to determine root causes of process degradation

• Increase tool up-time, where determining the root cause before taking the tool off-line will minimize downtime; reduce or eliminate scheduled flow-verification tests; reduce troubleshooting; and reduce tool maintenance

• Eliminate MFC-induced wafer scrap, using an alarm to alert for conditions that may lead to wafer scrap before producing product.

References

1. Shajii, Ali, et al, “Model-Based Solution for Multigas Mass Flow Control with Pressure Insensitivity.” Solid State Technology Magazine, July, 2004.
2. McDonald, Mike R., “Beyond Pressure Transients: Using Pressure-Insensitive Mass Flow Controllers to Control Gases in Semiconductor Manufacturing.” Semiconductor Manufac- turing Magazine, March, 2006.
3. Valentine, Bill and Pete Friedli, “New MFC Control System Improves Tool Uptime and Process Consistency.” Solid State Technology Magazine, April, 2002.

Managing hazardous process exhausts in high volume manufacturing

March 30, 2016

Integrated sub-fab systems allow HVM fab operators to safely and efficiently implement new processes containing hazardous process chemicals.

BY ANDREW CHAMBERS, Edwards Ltd., Clevedon, UK

The relentless scaling of structures and reduction in thermal process budgets that characterize state- of-the-art integrated circuit (IC) production have resulted in the incorporation of many complex and hazardous materials into high-volume manufacturing (HVM) processes. In order to meet the need to deposit these materials at ever-lower temperatures, many of the new process chemicals have low vapor pressures, are highly reactive and present serious hazards to personnel and equipment. Many new CVD precursors and their associated reaction by-products are flammable, pyrophoric, toxic (harmful-to-health), corrosive or otherwise hazardous to personnel or destructive to equipment, and have a tendency to condense in pipe-work, including process exhausts.

In this article we will review the risks associated with these materials and describe methods for mitigating process exhaust pipe hazards in high-volume manufacturing. In particular, we will describe an approach based on the integrating vacuum pumps and point-of-use abatement systems with essential safety devices and monitoring systems into a complete sub-fab vacuum and abatement solution. Such modular integrated sub-fab systems ensure safe system operation, including mitigation of process exhaust hazards, and reduce exposure of service staff to hazardous materials.

Process gas and reaction product hazards

Clearly, exposure of staff and equipment to hazardous chemicals leaking from process exhausts is a serious concern and careful attention to the design, control, safety qualification and maintenance of process exhaust systems is essential in configuring a safe and reliable sub fab operations.
The properties of process chemicals may be altered significantly as they pass through a process tool, and reaction products found in process tool exhausts may differ markedly from the original process precursors. For example, while high flows of tetraethylorthosilicate (TEOS) are widely used in CVD processes for deposition of silicon oxide films, the concentration of residual unreacted TEOS in a CVD process tool exhaust is minimal [1]. Instead, the TEOS is decomposed in the process chamber to form a greater volume of mixed hydrocarbon gases (ethene and ethanol, for example [2]), which are then pumped out of the process chamber into the process exhaust. When the safety of process exhausts is evaluated in the design of protective measures, interactions and transformations of process gases such as this must be considered carefully.

Deposition of hazardous materials in exhausts

In some cases, the process by-products which pass into the exhaust pipe are condensable. Frequently encountered condensable by-products include aluminum chloride (AlCl3) in metal etch, ammonium chloride (NH4Cl) in LPCVD nitride, and ammonium hexafluorosilicate ((NH4)2(SiF6)) in PECVD nitride. Several of these condensates have also been found to incorporate partly-reacted hazardous materials. For example, partly- reacted silicon-containing compounds which condense in exhaust pipes during a PECVD process may react violently with fluorine gas which flows through the exhaust pipe during a subsequent chamber cleaning process. This has caused exhaust pipe fires and serious equipment damage in a number of cases (FIGURE 1).

In addition to the reactivity hazard posed by these materials, accumulation of condensed material during processing can block exhaust pipes, causing process tool downtime and possibly loss of production. Furthermore, the reaction of condensed fluorine- or chlorine-containing materials with atmospheric water vapor during removal and cleaning of exhaust pipes can release HF or HCl gas or other hazardous substances, posing a serious risk to service staff and requiring preventive measures.

A particularly serious example of harmful deposited materials in exhaust pipes is the condensation of extremely reactive polysiloxane materials in Si epi or Si-Ge epi exhausts [3]. These materials are particularly hazardous since they can react unpredictably and violently (explosively) on exposure to water vapor or air, or if they suffer a mechanical shock when the exhaust pipes are removed for cleaning. The consequences of process gases escaping through leaks in exhaust pipes and the tendency of materials to condense in process exhaust pipes should be carefully considered when a process exhaust system is designed. Indeed, the exhaust pipe should be considered as an important functional element of the whole sub-fab process tool support system, otherwise there may be increased risks of staff injury and process tool downtime.

Leak integrity of process exhausts

Escape of process gases or reaction products from leaking process exhaust pipes presents serious risks to fab operations. For example:

• Flammable gas escaping from exhaust pipes may mix with air in closed spaces to create a fire risk
• Toxicgasesleakingoutofnon-enclosedexhaustpipes present an injury risk to fab personnel
• Corrosive gases leaking out of non-enclosed process exhausts can harm personnel and cause severe damage to fab equipment
• Process gas odors may cause complaints from fab staff or local residents

Typically, area gas detectors are deployed in fabs to warn of process gas leaks. These are very effective in detecting escaping process gas, but when they are activated process operations are interrupted and fab output affected. Furthermore, gas detectors cannot detect inward leaks into reduced pressure pump exhausts, such as air entering exhaust pipes where it could mix with flammable process gases to form flammable mixtures. In the worst case, a flammable process gas / air mixture could be ignited by a local ignition source, such as a dry-pump or point-of-use abatement system, and cause an exhaust pipe fire.

Configuring the vacuum/abatement/exhaust components as a single coherent system can increase staff safety and manufacturing efficiency by reducing the risk of hazardous process gas escape and ensuring appropriate action if a leak is detected In particular, integrated sub fab systems enable the use of extracted secondary enclosures around vacuum pumps, point-of-use abatement systems, fuel gas delivery systems and all interconnecting pipework to contain escaping gas, while ownership, maintenance and integrity of the process exhaust pipes becomes the responsibility of the system supplier, rather than remaining undefined.

Exhaust dilution

A standard safety precaution widely used to avoid the possibility of fires in process exhausts is the dilution of flammable gases below their Lower Flammable Limit (LFL). However, there are risks with this strategy. Considering the previously cited example, if the required dilution flow is calculated based only on the volume of TEOS gas in the exhaust pipe, it will be insufficient to dilute the larger volume of hydrocarbon decomposition products below their LFL. A related risk is formation of a flammable mixture in the exhaust if there is an air leak into the exhaust pipe coincident with the TEOS being decomposed by the process chamber.

As noted above, the process dry-pump and point-of- use abatement system are both ignition sources that could ignite the hydrocarbon / air mixture and cause an exhaust pipe fire.

To operate process exhausts containing flammable gases safely using this strategy, not only must the dilution flow be calculated appropriately, but the vacuum and abatement system controller must include a capability to shut off the flammable gas flow from the process tool if the dilution flow should drop below some critical level, or if a fire occurs in the exhaust pipe, as required by semiconductor industry safety standards such as SEMI S18 [4].

In recent times, the risks associated with flammable and pyrophoric gases have become more severe as highly reactive compounds such as disilane and trimethyl aluminum have become more widely used in CVD processes. Some of these materials have extremely low LFLs – for example, disilane has a published LFL of 0.2% [5], and trimethyl aluminum is known to be extremely flammable though specific LFL data appears not to be widely available [6]. This characteristic makes their dilution to safe levels costly and inefficient from an operational efficiency perspective. For example, the low LFL of disilane requires a very large volume of nitrogen required to dilute it to a safe level, increasing the direct cost of the nitrogen and putting additional load on the fab facilities. The resulting high gas flow in the process exhaust increases the total cost of abatement by requiring larger, more expensive equipment, more sub-fab floor space, and a higher utility consumption. Finally, the abatement efficiency of highly-diluted process gases may be degraded, creating an environmental concern if emissions of process gas that exceed permitted levels.

Temperature control of process exhaust pipes

The risks posed by the condensation of process by-products in exhaust pipes can be mitigated by controlling the temperature of the exhaust pipes at a suitably high value (FIGURE 2). Commercial products are widely available to perform this function, but when selecting a suitable system, its capability to maintain a uniform temperature throughout the exhaust system should be considered carefully – in particular, cold spots caused by inadequate thermal insulation or lack of adequate real-time temperature control can cause localized by-product condensation and pipe blockage. At the other extreme, if exhaust pipes are heated to an excessively high temperature, unused CVD precursors may react, depositing solid materials in the exhaust pipe. Ideally, temperature will be actively and precisely controlled within a specified range.

Integrated sub-fab systems

Integration of the process exhaust pipe assemblies together with dry-pumps and point-of-use abatement into a complete sub-fab system by the equipment manufacturer permits an optimization of safety, performance, efficiency and cost that cannot be achieved in the installation of discrete units by individual suppliers.

A typical integrated sub-fab system is designed to incorporate dry-pumps, point-of-use abatement systems, exhaust pipe assemblies, temperature management systems (TMS), together with all necessary safety devices, into a single entity which also includes a supervisory control system and all process tool and fab interfaces. Since all individual functional elements are integrated into a single unit, typically only one connection for each fab utility is required – not only does this reduce the overall installation cost of the sub-fab equipment, it also occupies less valuable sub-fabspace.Each such integrated system is typically used to support a single process tool, and is usually designed to fit conveniently within the “shadow” of the process tool in the sub-fab.

This close integration of the individual sub-fab functional elements into a unified system enables a reduction in risks associated with exhaust pipe leaks by continuously monitoring the leak status of the exhaust pipes, by monitoring the air extraction rate in secondary enclosures, and by monitoring the temperature and pressure in the process exhaust pipes. In the event of an excursion by any of these parameters into a critical condition, an integrated system can be designed to initiate shut-down of the process gas through its interfaces to the process tool, and alert the fab MES through its interface to a central monitoring system (CMS). Furthermore, real-time collection and processing of data from all the functional elements in the integrated system allows events leading up to previous alerts to be analyzed. Predictive algorithms can then be developed that can enable the CMS to antic- ipate or predict future failure events.

Provided the safety features of an integrated sub-fab system are properly designed, including those which specifically monitor the condition of the exhaust pipes, it becomes practical to reduce dilution rates of flammable gases safely, leading to significant reductions in required abatement capacity, capital equipment investment, utilities consumption and total operating costs in a high volume manufacturing environment (FIGURE 3).

Implementation of Best Known Methods (BKMs)

Integrated sub-fab systems are typically built, installed and serviced by a single supplier, who takes responsibility for the complete system design, including all necessary safety functions and external interfaces. Safe sub-fab system operation is normally assured by a comprehensive safety assessment of the integrated system design and by compliance with global semiconductor industry safety standards such as SEMI S2 [7].

However, to ensure the most efficient operation it is also necessary to set-up the sub-fab system according to a Best Known Method (BKM) for each process tool. Application of process BKMs ensures that each integrated sub-fab system is fit-for-purpose to meet the specific require- ments of its allocated process tool, and shortens the time required to qualify the tool for process. Typically, sub-fab equipment suppliers use know-how based on experience of similar processes in other HVM facilities to define their own BKMs and set-up equipment properly. Once an integrated system is operational, service support, applications support and continuous improvement programs (CIP) are all available from a single source which ensures that all critical safety systems are properly maintained and comply with the latest BKMs (FIGURE 4).

Summary

The concept of integrated sub-fab systems is a valuable tool that allows HVM fab operators to safely and efficiently implement new processes containing hazardous process chemicals. The integrated function- ality and comprehensive safety systems guard against hazardous process gas escape, leakage of air into exhausts containing flammable gas, and condensation of a wide range of hazardous materials in exhaust pipes. Collectively these attributes enable the safest and most efficient sub-fab operation for HVM.

References

1. Edwards Ltd. – unpublished data
2. M.G.M. Van Der Vis, E. Cordfunke, R. Konings: The thermody-
namic properties of Tetraethoxysilane and an infra-red study of its decomposition, Journal de Physique IV, 1993, 03 (C3), pp.C3-75-C3-82
3. Safety Applications Procedure SAP 00-01 – Pumping Reduced Pressure Epitaxy (RP Epi) Applications, Edwards Ltd.
4. SEMI S18-0312 Environmental, Health and Safety Guideline for Flammable Silicon Compound, SEMI
5. MSDS #1038 (Disilane) Air Products, Pub #320-708
6. MSDS #257222 (Trimethylaluminum) Sigma-Aldrich product
#257222
7. SEMI S2-0715, Environmental, Health and Safety Guideline for
Semiconductor Manufacturing Equipment, SEMI

ANDREW CHAMBERS currently holds the position of Senior Product Manager at Edwards Ltd., Clevedon BS21 6TH, UK [email protected]

Impact of triboelectric charging from DI water on transistor gate damage

March 30, 2016

Optimized settings for DI water pressure at CMP and careful analysis of interconnect layout are used to improve quality on a complex analog design.

BY STEPHEN SWAN, JOSEPH WILLIAMS, ANN CONCANNON, JIM O’HANNES and ERIC EVANGELOU, Texas Instruments, Dallas, TX

Triboelectricity is defined as a charge of (static) electricity generated by friction. The concept was first applied in the 1940s for electrostatic painting and is now widely used in photocopy machines. This phenomenon becomes a concern in wafer manufacturing processes since water is a polar molecule and deionized water (~18MOhm) is a good insulator [1, 2].

Our investigation into circuit damage was initiated by a finding of high leakage from a single transistor within a complex analog design. Electrical and physical analysis of a failing site revealed a halo image on a TEM micrograph, suggesting that the area of highest electric field under the poly gate had been damaged (FIGURE 1).

Wafer signature – fab root cause

After insuring there was no quality risk (with HTOL and ELFR reliability testing), focus was placed on identi- fying the physical root cause, understanding why the failures were only occurring on a single transistor, and developing a design rule to reduce the risk on future products. Examination of wafer yield maps revealed fallout of less than 500 parts per million (ppm) in a distinctive geometric pattern with failing die at unique radius from the wafer center. Discussions with fab process experts within TI revealed that the geometric pattern aligned with positions of DI water jets on a single wafer oxide chemical mechanical planarization (CMP) tool and that the problem correlated to use of high DI water pressure (60psi) during wafer transfer operation.

Subsequent experiments proved that transistor damage was occurring when DI water was used to elevate the (inverted) wafer from the load chuck to the polish head with jets of water causing static discharge in distinct locations (FIGURES 2, 3). Interim corrective action was taken to match the DI water pressure to the recommended setting of 20psi, with verification provided by both passive data and experimental results [3].

Since static electricity in triboelectric charging is caused by friction, we can apply the Bernoulli principle to estimate the relative change in static charge when dropping water pressure from 60psi to 20psi (Equation 1). This principle states that the sum of energy (kinetic and potential) in a fluid under steady flow must be equal at all points along the stream. In the case of water being ejected from a fixed nozzle, this would require that a drop in pressure (potential energy) results in a drop in velocity (kinetic energy) thereby reducing friction and static charge.

Equation 1: Bernoulli principle

Where:
v is the fluid flow (m/s)
g is the value of acceleration due to gravity (9.81m/s2) z is the orifice size
p is the pressure (pascals)
ρ is the density of water (1000 kg/m3)

Solving for relative difference, we find that velocity is a function of pressure, such that reducing pressure from 60psi to 20psi will decrease the velocity by about 40 percent. Thus, we can predict a corresponding drop in static charge due to friction by the same amount. The relative difference in charge was validated by using a surface photovoltage (SPV) tool, which is a method of monitoring the potential of a semiconductor surface [4], FIGURE 4.

Tool ‘fingerprint’ analysis

Now that a physical explanation for how excess static charge was being applied to the face of product wafers had been defined, the next step was to understand why the resulting damage to the product circuit was always observed in a specific transistor (as opposed to being randomly distributed throughout the circuit). Through yield map signature analysis of the diagonal clusters of product die with a revised test screen, it was noted that while the clusters of failing die appeared at distinct radius dimensions from wafer center, their orientations were not fixed and, at first pass, seemingly random. However, upon closer inspection of the load chucks (FIGURES 2, 3), it was found that the water jets (appearing as a ‘slit’ style nozzle) had fixed orientations that were different from tool to tool.

This information led to an effort of correlating the nozzle position on each CMP tool to the orientation of diagonal clusters in the stacked yield wafer maps. This comparison made it possible to map yield loss sites from individual wafers to specific tools, and to identify that the damage was taking place at a specific layer for the product (second dielectric CMP, after metal-1).

Capacitive coupling

With the knowledge that the source of the physical damage was coming from triboelectric charging at one oxide CMP step , a working theory was created to show how the electric charge could find a path to ground from the front side (DI water jet) to the backside (grounded wafer chuck) of the wafer (FIGURE 5).

Design considerations

In a design of more than 180 thousand transistors, it was significant that all failures mapped to a single NMOS transistor. This device was one of six identical structures, a two finger minimum sized 5V NMOS and the device was isolated from any external connections so charge coupling from an external pin was eliminated as a potential cause. Also, a review of metal-to-gate antenna design rules confirmed that there were no violations within the failing array and metal to gate ratios were well within the specification, with 10X margin. Since it was unlikely that a traditional antenna was the cause of the gate damage, additional aspects of the layout needed investigation [5].

Two areas of concern at the metal-1 layer under second dielectric were minimum metal spacing and adjacent metal routes for parallel lines. Investigation of the layout and design rules at this layer showed that minimum spacing of parallel lines was smaller than that of other metal layers, which would make the capacitance coupling between metal lines at this layer more significant.

Further analysis of the adjacent metal showed that this one transistor had a considerable amount of floating metal (prior to subsequent metal routing) adjacent to its gate metal compared to the five adjacent transistors. A model of capacitance between the floating metal and gate metal of the six structures showed that the LED5 transistor had a ratio more than 10:1 compared with ratios less than 1:1 for each of the other five transistors.

Our conclusion from these combined efforts was that failure of the single transistor in question was due to the unique layout of tight metal spacing and a high ratio of floating metal-to-gate metal, when under the influence of triboelectric charging from the fab CMP process.

An updated graphic (FIGURE 6) is used to show that charge is induced on the wafer (oxide) surface and coupled to the floating metal and finally, to the gate metal. The floating metal increases the effective gate metal capacitance such that it is now large enough to accumulate adequate charge to damage its gate oxide.

To prevent this effect from impacting future designs, an electronic design automation (EDA) approach was used to define conditions which would flag combinations of metal:gate antenna ratios and proximity of gate to floating metal.

Summary

Root cause of high leakage from a single transistor within a complex analog design was proven to be due to an interaction between triboelectric charging in the wafer CMP process and the unique layout of this structure. Process modifications were performed to reduce DI water pressure during the wafer handling sequence at CMP, a test screen was developed to yield off any future failures and ELFR / HTOL reliability verification was performed to insure no quality risk on finished goods. EDA design checks have been developed to flag structures with high ratios of spacing for floating metal to gate metal for sites with significant metal antenna ratios.

Acknowledgments

Our thanks to several members of TI who were instrumental in identifying root cause and solutions. These include Dan Clavet, Scott Kolda, Aaron Dries, and Chris Qualey from MaineFab, Jonathan Shu and Michelle Hartsell of SVA Quality, Bill McIntyre of SVA-MDP, Dinh Nguyen of SVA- MLP, Nam Nguyen and Chris S Pereira of ATI, and Mikko Loikkanen of SVA-MLP Design.

References

1. Dela Cruz, W.A.; Marcelo, M.L.D.; Borlongan, M.A.B., “Preventing arcing damage on radio frequency device wafer by

controlling ESD resistivity level of water for saw and wash,” 29th Electrical Overstress/Electrostatic Discharge Symposium, 2007. EOS/ESD, vol., no., pp.3B.5-1, 3B.5-4, 16-21 Sept. 2007.

2. Re-Long Chiu (WaferTech) “Scrubber Clean Induced Device IDDQ Fail”, IEEE Proceedings, 2012.

3. S. Larivière (Altis Semiconductor), “Electro-static induced metal breakdown at interlayer dielectric post CMP brush clean process”. ASMC Proceedings, 2009.

4. Schroder, Dieter K. (2006). Semiconductor Material and Device Characterization. Wiley-IEEE Press. ISBN 0-471-73906-5.

5. Ackaert, J.; Greenwood, B., “Design solutions for preventing process induced ESD damage during manufacturing of inter- connects,” IC Design and Technology (ICICDT), 2010 IEEE Inter- national Conference on , vol., no., pp.98,101, 2-4 June 2010.

STEPHEN SWAN is Quality Manager at TI’s MaineFab in South Portland Maine; JOSEPH WILLIAMS and ERIC EVANGELOU are mem- bers of MaineFab Product Engineering; ANN CONCANNON (DMTS) is a member of TI Analog Labs in Santa Clara CA; JIM OHANNES is manager of the TI Design Center in South Portland ME.

CyberOptics showcases high-precision humidity measurement sensor at SEMICON China

March 29, 2016

CyberOptics Corporation, a global developer and manufacturer of high precision 3D sensing technology solutions, will showcase WaferSense and ReticleSense Auto Multi Sensors (AMS) at SEMICON China, March 15-17, 2015 in the PSC and KNG booth #3358 and the Winifred booth #1461.

The WaferSense and ReticleSense Auto Multi Sensor (AMS/AMSR) line measures relative humidity (RH) in real time. Process and equipment engineers can also measure vibration and leveling using this measurement device. With its thin and light form factor, CyberOptics’ AMS can travel through virtually any tool and the AMSR can be used in any reticle environment.

“The Auto Multi Sensor devices are yet another way to increase yield and reduce dreaded downtime in semiconductor environments, saving our customers both time and money,” said Dr. Subodh Kulkarni, President and CEO, CyberOptics.

CyberOptics will also feature the new Airborne Particle Sensor (APS2) devices that improve equipment set-up and long-term yields in semiconductor fabs by wireless monitoring airborne particles in real-time.

The new APS2 quickly monitors, identifies and enables troubleshooting of airborne particles down to .14um within semiconductor process equipment and automated material handling systems. It easily identifies when and where the particles originate and speeds equipment qualification with wireless measurements, shortens equipment maintenance cycles with wafer-like and reticle form factors and lowers equipment expenses by providing objective and reproducible data.

Edwards launches new vacuum pumps at SEMICON China 2016

March 15, 2016

Edwards announced the availability of two new vacuum pump product families at SEMICON China: the iXM Series for semiconductor etch and chemical vapor deposition (CVD) applications, and the iXL900R for fast pump down of large flat panel display (FPD) loadlock chambers.

“Edwards is committed to reducing carbon emissions and energy consumption. Both of these new product families help our customers reduce the environmental impact of their manufacturing operations, while also helping them to reduce costs,” states Paul Rawlings, Vice President Marketing, Semiconductor and DSL Business, Edwards.

The new iXM Series of dry pumps reduces environmental impact and customer costs for etch and CVD processes, allowing them to run their latest processes with the lowest energy consumption and at the lowest ambient noise level. The pumps are designed to deliver increased lifetime when used for highly corrosive etch processes. They also offer a significantly lower footprint compared to other pumps on the market.

The iXL900R is the fastest loadlock pump currently available in its class for FPD loadlock applications. Customers can significantly reduce their operating costs and installation times with this new pump, which is particularly well suited to the largest loadlock chambers used for plasma vapour deposition (PVD) applications. In addition, customers will need fewer pumps per loadlock chamber, which reduces installation time, systemisation costs, maintenance and utilities consumption.

“We are proud to offer our customers new solutions that help them reduce their energy use. By some estimates, as much as 40 percent of energy used in a semiconductor factory is consumed by vacuum pumps, so even a minor reduction in this area can have a significant effect on total energy consumption,” states Ma Zhen, Edwards’ China-based Applications Manager. “Our latest vacuum pumps offer improvements in overall energy efficiency and savings from a unique idle mode that reduces energy usage when full power is not required.”

Zhen adds, “Currently China’s government-sponsored incentives provide manufacturers with an opportunity to upgrade their capability and reduce energy consumption with minimal investment. One customer recently replaced 200 pumps under the program, achieving a total energy savings of 7,000 Kwh per day.”

For further information about Edwards’ products and services, please visit www.edwardsvacuum.com, or visit Edwards at SEMICON China, booth N1 1008.

SEMI reports 2015 global semiconductor equipment sales of $36.5B

March 15, 2016

SEMI, the global industry association for companies that supply manufacturing technology and materials to the world’s chip makers, today reported that worldwide sales of semiconductor manufacturing equipment totaled $36.53 billion in 2015, representing a year-over-year decrease of 3 percent. 2015 total equipment bookings were 5 percent lower than in 2014. The data are available in the Worldwide Semiconductor Equipment Market Statistics (WWSEMS) Report, now available from SEMI.

Compiled from data submitted by members of SEMI and the Semiconductor Equipment Association of Japan (SEAJ), the Worldwide SEMS Report is a summary of the monthly billings and bookings figures for the global semiconductor equipment industry. The report, which includes data for seven major semiconductor producing regions and 24 product categories, shows worldwide billings totaled $36.53 billion in 2015, compared to $37.50 billion in sales posted in 2015. Categories cover wafer processing, assembly and packaging, test, and other front-end equipment. Other front-end includes mask/reticle manufacturing, wafer manufacturing, and fab facilities equipment.

Spending rates increased for Taiwan, Korea, Japan, and China, while the new equipment markets in North America, Rest of World, and Europe contracted. Taiwan remained the largest market for new semiconductor equipment for the fourth year in a row with $9.64 billion in equipment sales. The expanding markets in South Korea and Japan surpassed the North American market, to claim the second and third largest markets, respectively, while North America fell to fourth place at $5.12 billion. The China market remained larger than the Rest of World and European markets.

The global other front end segment increased 16 percent; the wafer processing equipment market segment decreased 2 percent; total test equipment sales decreased 6 percent; and the assembly and packaging segment decreased 18 percent.

Semiconductor Capital Equipment Market by World Region (2014-2015)

	2015	2014	% Change
Taiwan	9.64	9.41	2%
South Korea	7.47	6.84	9%
Japan	5.49	4.18	31%
North America	5.12	8.16	-37%
China	4.90	4.37	12%
Rest of World	1.97	2.15	-9%
Europe	1.94	2.38	-19%
Total	36.53	37.50	-3%

Source: SEMI/SEAJ March 2016; Note: Figures may not add due to rounding.

Global semiconductor sales off to sluggish start in 2016

March 4, 2016

The Semiconductor Industry Association (SIA) today announced worldwide sales of semiconductors reached $26.9 billion for the month of January 2016, 2.7 percent lower than the previous month’s total of $27.6 billion and 5.8 percent down from the January 2015 total of $28.5 billion. Sales into the Americas were particularly sluggish, decreasing 5.9 percent month-to-month and 16.9 percent year-to-year. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“Global semiconductor sales decreased in January across most regional markets and product categories, largely due to softening demand and lingering macroeconomic headwinds,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Despite these challenges, modest market growth is projected for 2016, following essentially flat sales last year.”

Regionally, sales decreased in most regions: China (-0.4 percent month-to-month/+4.3 percent year-to-year), Europe (-1.7 percent/-7.7 percent), Japan (-3.3 percent/-5.1 percent), Asia Pacific/All Other (-2.8 percent/-6.5 percent), and the Americas (-5.9 percent/-16.9 percent).

Sales also decreased across most major semiconductor product categories, with the notable exception of microprocessors, which increased year-to-year by 2.1 percent.

January 2016
Billions
Month-to-Month Sales
Market	Last Month	Current Month	% Change
Americas	5.75	5.41	-5.9%
Europe	2.77	2.72	-1.7%
Japan	2.57	2.48	-3.3%
China	8.45	8.41	-0.4%
Asia Pacific/All Other	8.08	7.85	-2.8%
Total	27.62	26.88	-2.7%

Year-to-Year Sales
Market	Last Year	Current Month	% Change
Americas	6.51	5.41	-16.9%
Europe	2.95	2.72	-7.7%
Japan	2.62	2.48	-5.1%
China	8.07	8.41	4.3%
Asia Pacific/All Other	8.40	7.85	-6.5%
Total	28.55	26.88	-5.8%

Three-Month-Moving Average Sales
Market	Aug/Sep/Oct	Nov/Dec/Jan	% Change
Americas	6.05	5.41	-10.6%
Europe	2.91	2.72	-6.4%
Japan	2.70	2.48	-7.8%
China	8.58	8.41	-1.9%
Asia Pacific/All Other	8.75	7.85	-10.2%
Total	28.97	26.88	-7.2%

North American semiconductor equipment industry posts January 2016 book-to-bill Ratio of 1.08

February 24, 2016

North America-based manufacturers of semiconductor equipment posted $1.32 billion in orders worldwide in January 2016 (three-month average basis) and a book-to-bill ratio of 1.08, according to the January EMDS Book-to-Bill Report published today by SEMI. A book-to-bill of 1.08 means that $108 worth of orders were received for every $100 of product billed for the month.

SEMI reports that the three-month average of worldwide bookings in January 2016 was $1.32 billion. The bookings figure is 1.4 percent lower than the final December 2015 level of $1.34 billion, and is 0.1 percent lower than the January 2015 order level of $1.33 billion.

The three-month average of worldwide billings in January 2016 was $1.23 billion. The billings figure is 8.8 percent lower than the final December 2015 level of $1.35 billion, and is 3.7 percent lower than the January 2015 billings level of $1.28 billion.

“Recent semiconductor order activity is on par with the figures reported one year ago,” said Denny McGuirk, president and CEO of SEMI. “While uncertainty clouds the near-term economic outlook, we currently expect 2016 capex to remain in range of 2015 spending.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

	Billings (3-mo. avg)	Bookings (3-mo. avg)	Book-to-Bill
August 2015	$1,575.9	$1,670.1	1.06
September 2015	$1,495.0	$1,554.9	1.04
October 2015	$1,358.6	$1,325.6	0.98
November 2015	$1,288.3	$1,236.6	0.96
December 2015 (final)	$1,349.9	$1,343.5	1.00
January 2016 (prelim)	$1,231.4	$1,324.1	1.08

Source: SEMI (www.semi.org), February 2016