04/05/2011 

University of Illinois researchers found that graphene transistors have a nanoscale thermoelectric cooling effect that can be stronger at graphene contacts than resistive heating, lowering the temperature of the transistor.

04/04/2011 

SiliconBlue Technologies unveiled its mobileFPGA platform device roadmap using TSMC's 40nm low power standard CMOS process. The two distinct families target the two areas where smartphones and other handhelds differentiate.

04/04/2011 

Thin Film Electronics ASA (Thinfilm) and PARC, a Xerox company, entered the next phase of their co-innovation engagement for printed memory devices. This next phase extends the engagement to prototyping the product for manufacturing readiness.

04/04/2011 

GLOBALFOUNDRIES, semiconductor foundry, signed a strategic long-term partnership on sub-22nm CMOS scaling and GaN-on-Si technology with the nanoelectronics R&D center imec.

04/01/2011 

Advanced solid state non-volatile memory (NVM) chips, which retain data when the power is off, are expected to see phenomenal growth in the next five years, says iRAP Inc. In 2010, the potential market for zero capacitor (ZRAM) was highest, but by 2015, it will be phase change memory (PCM, PC-RAM, PRAM, OUM) at the lead.

04/01/2011  Peter Singer, Editor-in-Chief

03/31/2011 

Zvi Or-Bach, MonolithIC 3D, describes the TSV-beating monolithic IC fab process, and argues for scaling "up" rather than down. Or-Bach compares the costs of further semiconductor scaling to advanced packaging.

03/30/2011 

austriamicrosystems (SIX:AMS) conditionally released its advanced 0.18µm High-Voltage CMOS process technology "H18" to for volume production. It will be manufactured in IBM's 200mm Burlington wafer facility.

03/30/2011 

Mechanical stresses can prevent successful implementation of 3D packaging technologies, says Larry Smith, SEMATECH. He argues for a DFM-like solution to identify and manage stress on thinned and stacked die in 3D ICs. To complicate matters, foundries, OSATs, and memory suppliers could inflict different stresses on the die, and the whole industry is too new at 3D packaging to present concrete answers.

03/30/2011 

Technology, not physics, represents the major hurdle to allow graphene to step out of the lab and pave the way to the future of technology: either alone, or hand-in-hand with silicon. Mirco Cantoro, imec, enumerates graphene’s challenges and potential in microelectronics, high-speed/HF electronics, and flexible/plastic electronics.

03/30/2011 

Mentor Graphics (MENT) says many of its EDA customers are designing, verifying, manufacturing and testing integrated circuit products using multi-die vertical stacking technology, 3D-IC. The company is deploying a multiple-component Tessent design-for-test product line for integrated multi-die hierarchical scan and built-in self-test  methodologies.

03/24/2011 

While semiconductor fab has always created nanoscale dimensions, a new class of nanomaterials -- graphene, carbon nanotubes (CNTs), nano-metal alloys, quantum dots -- behave radically differently than current materials. Nanotechnology promises higher-performance memory capacity and transistors in future semiconductors, says Giles Humpston, Tessera.

03/21/2011 

Victor Moroz discusses the strong but doable effects of stress on TSVs. TSV stress ranges are comparable to the size of the TSV, and analog behaves differently than digital. Synopsys recently presented results (part of a collaboration with imec) at a SEMATECH event.

03/17/2011 

The System LSI Division of Samsung Electronics Co. Ltd. has licensed the OptiML Zoom image enhancement solution from Tessera Technologies Inc. (NASDAQ:TSRA).

03/17/2011 

Live from Japan, longtime semiconductor exec Takeshi Hattori describes the situation facing semiconductor fabs -- and why power blackouts are the real problem, not earthquake or tsunami damage.

03/17/2011 

Applied Materials Inc. (AMAT) introduced the Applied Centura Conforma, with conformal plasma doping (CPD) targeted for 22nm and beyond logic and memory chips. The technology replaces ion beam implantation for conformal doping of complex 3D structures.

03/15/2011 

U-M researchers, with several collaborators, developed a method to spontaneously form nanoscale spirals of electric polarization at controllable intervals in ferroelectric memory. This natural "budding" reduces the power needed to flip each bit.

03/14/2011 

An earthquake of magnitude 8.9 struck March 11 off the coast of Japan's main island, Honshu. Jim Handy, Objective Analysis semiconductor market research, and other analysts share insights into Japan's semiconductor fabs and the quake's impact range. The update includes information from individual semiconductor companies in the area.

03/14/2011 

Mattson Technology Inc. (NASDAQ: MTSN) introduced the SUPREMA XP5 photoresist dry strip system for high-volume production of current and future-generation logic, DRAM and flash memory devices.

03/11/2011 

IHS iSuppli provides Japan's semconductor, electronics, and LCD fab stats in the wake of Japan's major earthquake today. The two major DRAM fabs in Japan, operated by U.S. based-Micron and Japan’s Elpida, have not been directly affected, according to preliminary indications from IHS iSuppli contacts.