Device Architecture

DEVICE ARCHITECTURE ARTICLES



Toshiba's 25nm trial ups ante for NAND scaling, next-gen litho

04/06/2010 

Toshiba reportedly is prepping a ¥15B (US $157M) investment in a <25nm NAND flash test line, eyeing mass production in 2012, a move that not only tightens the NAND flash scaling wars, but also could narrow the insertion point for a next-generation lithography set.

Report: Power outage at Samsung deemed minor, but could affect prices

03/26/2010 

A brief power outage at Samsung Electronics appears to have caused "minimal" damage and internal impact on memory production, but may briefly inflate prices until markets know for sure, according to multiple reports.

Toshiba plants stake: Fab 5 begins in July, online by 2011

03/24/2010 

After delaying its initial plans, Toshiba has rejuvenated its Fab 5 NAND flash memory project, aiming to start construction in July of this year and be online by the spring of 2011 -- more than doubling its capacity to an eye-popping 500,000 wafers/month.

DARPA sets sights on revolutionary advancements in non-volatile logic ICs

03/15/2010 

Military microelectronics experts at the US Defense Advanced Research Projects Agency (DARPA) are launching a leap-ahead technology program to develop advanced, ultralow-power non-volatile logic ICs that retain their data and computational states when power is removed.

Analyst: More evidence in KR, TW supports extended chip capex

03/12/2010 

Checks into key chipmakers in Korea and Taiwan suggest current demand for equipment is still on the rise, with planned capex increases imminent and capacities set to increase into 2011, according to one industry analyst.

X-Fab touts embedded NVM for single-chip designs

03/10/2010 

X-Fab says it has come up with an embedded nonvolatile memory process that combines the benefits of quickly accessible SRAM with nonvolatile data retention of EEPROM or flash memory, achieving same or better functionality using significantly less chip area.

Novellus develops copper seed PVD process for TSV packaging

03/09/2010 

Novellus Systems (NASDAQ: NVLS) created an advanced copper barrier-seed physical vapor deposition (PVD) process for the emerging through-silicon-via (TSV) packaging market. The process uses Novellus’ established INOVA platform with patented hollow cathode magnetron (HCM) technology to produce highly conformal copper seed films that are reportedly four times thinner than the conventional PVD seed approaches used for TSV applications. Novellus announced that the HCM TSV process delivers excellent sidewall and bottom coverage, and enables void-free copper fill during the subsequent TSV electroplating step.

Reports: Elpida taking on Spansion's NAND flash ops

03/09/2010 

Elpida Memory reportedly is purchasing Spansion's NAND flash memory operations, with the goal to produce modules that package DRAM and flash memory targeting mobile devices such as smart phones, according to multiple reports.

Analyst: Top capex budgets expanding two-thirds in 2010

03/05/2010 

The biggest chipmaker spenders are taking an extra few crumbs from the capex pie plate in 2010, spending far more than the industry average -- but in the end IC prices will still go up and shortages will happen before the year is through, according to IC Insights.

SPIE takeaway: Updated litho shipments, and EUV-delay misinterpretations

03/02/2010 

Barclays Capital's CJ Muse came away from SPIE with the message that litho demand is strong, with a "heightened focus on EUV" due to increased costs associated with double patterning -- and why rumors about a delay in EUV adoption may not be accurate after all.

First revisions: Forecasters already bullish about 2010

03/01/2010 

January semiconductor sales numbers are hot off the press, and already analysts are saying the trendline is being reset for a better-than-predicted 2010, with growth approaching or even exceeding 20%.

Comparative study of advanced boron-based ULE doping

03/01/2010  B2H6 PLAD and B18H22 molecular implants demonstrate the best Rs-xj and abruptness characteristics, while beam-line BF2 implants as well as cluster B implants show worse Rs-xj characteristics.Shu Qin, Y. Jeff Hu, Allen McTeer, Micron Technology, Inc., Boise, ID USA

Integrating high-k /metal gates: gate-first or gate-last?

03/01/2010 

For low power applications, gate-first is arguably the most appropriate choice, but for high performance applications, complex solutions (e.g., SiGe channel for pMOS) need to be considered in order to meet the performance requirements with a gate-first process.

III-V MOSFETs: beyond silicon technology

03/01/2010  Results so far are highly encouraging for III-V MOSFETs to be used for ultra high speed, and ultra low power applications. Richard J.W. Hill, Jeff Huang, Joel Barnett, Paul Kirsch, Raj Jammy, SEMATECH, Austin TX USA

Keithley's latest system goes for ultra-fast I-V solution

02/19/2010 

Keithley exec Lee Stauffer explains how adding ultra-fast voltage waveform generation and current/voltage measurement capabilities to the company's Model 4200-SCS semiconductor characterization system benefits a range of applications, from flash memory to CMOS and MEMS.

Tessera and Nanium, formerly Qimonda Portugal, sign packaging technology licensing agreement for DRAM and other semiconductor devices

02/19/2010 

Tessera Technologies Inc. (Nasdaq:TSRA) semiconductor packaging subsidiary, Tessera Inc., signed a technology licensing agreement with Nanium S.A. Nanium, formerly known as Qimonda Portugal, previously was the largest semiconductor packaging assembly and test operation within Qimonda. Nanium has now reorganized as an independent company and will focus on providing assembly and test services for the DRAM memory market and other semiconductor products. Products manufactured by Nanium will be incorporated into computers, servers and various electronic devices such as MP3 players, mobile phones, cameras, and game consoles. The initial term of the license agreement runs through the end of 2017.

Silicon nanowires become industry-compatible

02/17/2010 

Vincent Renard and Vincent Jousseaume from CEA-Leti discuss a key new achievement in silicon nanowire synthesis that could open the doors for industrial-scale use offering new functionalities for ICs approaching atomic-scale limitations.

ISSCC: 3D, TSV, memory, digital TVs

02/16/2010 

Last week's IEEE International Solid-State Circuits Conference 2010 (ISSCC, Feb. 7-11, San Francisco, CA), offered many talks and papers on topics ranging from 3D integration to circuit design and memories. Here are just a few examples.

Analysis: Pros, questions about Micron + Numonyx

02/10/2010 

Analysts offer their take on the long-rumored, and now official, deal that brings NOR flash firm Numonyx under Micron's wing.

Was Samsung tech leaked to Hynix, via AMAT?

02/03/2010 

Authorities in South Korea have arrested executives from Hynix Semiconductor and Applied Materials' local office, accusing them of illegally transferring key semiconductor process technology from Samsung.




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