08/14/2009  In memory, those whose technology is best aligned with cost savings (to both manufacturing and consumers) are in the catbird's seat, and so it is with Intel and Micron who now have 3-bit/cell multilevel cell NAND in their arsenal.

08/14/2009  August 24, 2009: Researchers from Yale and the Semiconductor Research Corp. say they have found a way to apply ferroelectric gate material to a DRAM cell (FeDRAM) to create a more simply structured, highly scalable, longer-lasting and lower-power-consuming device with multibit storage capabilities comparable to flash memory.

08/11/2009  August 11, 2009

08/05/2009  The BrightSpots 3D IC Forum came to a close on Friday, July 24. Out of 3 topic areas covering technology progress, supply chain issues, and standards development, the discussions around technology progress were clearly the most active, both from a panelist and attendee perspective. What follows is a summary of each discussion. Where topics overlapped, and discussions were brief, the summaries have been combined into one.

08/05/2009  Larry Smith, sr. member of the technical staff in SEMATECH's 3D interconnect division, discusses toolset acquisitions at the U. of Albany's CNSE, where work focuses on replacing traditional global interconnect and intermediate level processes.

07/31/2009  July 30, 2009: MOSIS, a prototyping and low-volume circuit production service, is expanding its shuttle runs to include two more of IBM's silicon-on-insulator (SOI) process technologies, for 0.18μm/200mm wafers and 45nm/300mm wafers.

07/27/2009  Horacio Mendez, executive director of the SOI Industry Consortium, gave SST previews a new study that compares the manufacturability, performance, and cost of 3D transistors using silicon-on-insulator (SOI) vs. bulk. He also discusses the group's new "Simply Green" initiative to help emphasize SOI's power benefits vs. bulk Si.

07/22/2009  July 21, 2009: Representatives CEA-Leti, STMicroelectronics, IBM, and officials from across France have gathered to officially launch the Nano2012 R&D program, a public/private program led by ST to create advanced R&D clusters to develop new semiconductor technologies.

07/17/2009  At SEMICON West, SAFC Hitech unveiled details of its six-year-out (through 2014) materials roadmap for metalorganic chemical vapor deposition (MOCVD) and atomic layer deposition (ALD) processes on silicon semiconductor substrates, outlining development paths for advanced memory and logic including barrier layers, interconnects, dielectrics and metals.

07/16/2009  Semiconductor equipment manufacturers posted a book-to-bill ratio of 1.01 in June, according to VLSI Research. It was the first increase above parity since July 2008. Although bookings and billings remain well below normal levels, business activity is beginning to improve. Back-end suppliers are seeing a considerable pick up in business activity amid soaring utilization rates at the subcontractors.

07/16/2009  The main theme at this year's NCCAVS Junction Technology Group meeting will be 22nm junction, which many believe this will be the first node to use msec-only annealing (i.e. diffusionless), according to meeting chair John Borland, of J.O.B. Technologies. He also gives a quick recap of what's ahead at 16nm.

07/15/2009  Jeff Hebb of Ultratech talks about extending laser spike annealing to the 22nm node, the topic of a paper he's presenting at the NCCAVS Junction Technology Group meeting to be held Thursday, July 16 in San Francisco.

07/14/2009  3D IC technology, an alternative approach to wire-bonded chip stacking utilizing interconnets with through-silicon vias (TSVs) fabricated with front-end-like processes, is a hot topic at SEMICON West, and the focus of an on-line virtual forum hosted by public relations firm MCA.

07/14/2009  3D IC technology, an alternative approach to wire-bonded chip stacking utilizing interconnets with through-silicon vias (TSVs) fabricated with front-end-like processes, is a hot topic at SEMICON West, and the focus of an on-line virtual forum hosted by public relations firm MCA.

07/13/2009  EV Group has unveiled a next-generation UV-nanoimprint lithography (NIL) step and repeat system eyeing use for microelectronics applications including optics/image sensors, lens arrays, and certain R&D nanoelectronics processes.

07/13/2009  July 13, 2009: EV Group has unveiled a next-generation UV-nanoimprint lithography (NIL) step and repeat system eyeing use for microelectronics applications including optics/image sensors, lens arrays, and certain R&D nanoelectronics processes.

07/10/2009  WEB EXCLUSIVE: A quick scan across the landscape of suppliers that are betting the farm on nanotubes.

07/06/2009  This year's VLSI Symposium (June 14-17, Kyoto, Japan) was not as spirited as the past two years, which featured hot topics like high-k/metal gate approaches and bulk vs. SOI CMOS and planar vs. FinFETs, notes John O. Borland, in an exclusive report for SST. Nonetheless, many interesting papers and discussions emerged, notably finding out who else is adopting the same HK+MG scheme, and various analyses of device variability.

07/01/2009  July 1, 2009 -- To gain a better understanding of how new and existing wafer metrology technologies can be used, modified, or enhanced to measure and improve 3D interconnect processes, SEMATECH will host a workshop dedicated to 3D interconnect metrology on July 15 in conjunction with SEMICON West in San Francisco, CA.

06/25/2009  Much has been said about capital equipment consolidation, particularly in recent months under the weight of the economic slowdown, but in one of the more concentrated sectors the growth was lousy in 2008 and looks to be twice as bad in 2009.