07/13/2009  July 13, 2009: EV Group has unveiled a next-generation UV-nanoimprint lithography (NIL) step and repeat system eyeing use for microelectronics applications including optics/image sensors, lens arrays, and certain R&D nanoelectronics processes.

07/13/2009  July 13, 2009 - Cymer says it has delivered the world's first fully integrated laser produced plasma (LPP) EUV lithography source to ASML, achieving 75W of full-die exposure power, and says the system will hit 100W "within the current quarter," enabling 60 wafers/hr throughput.

07/06/2009  This year's VLSI Symposium (June 14-17, Kyoto, Japan) was not as spirited as the past two years, which featured hot topics like high-k/metal gate approaches and bulk vs. SOI CMOS and planar vs. FinFETs, notes John O. Borland, in an exclusive report for SST. Nonetheless, many interesting papers and discussions emerged, notably finding out who else is adopting the same HK+MG scheme, and various analyses of device variability.

07/06/2009  July 6, 2009: SEMATECH has accepted a Veeco Insight 3D atomic force microscope (AFM) to be put to use for non-destructive reference metrology for critical dimension (CD), overlay and contour, and 3D characterization of resist features in extreme-ultraviolet (EUV) lithography.

07/06/2009  KLA-Tencor's new upgrade package for its 28XX broadband brightfield inspection systems enables access to standard IC design layout files, from which the inspection system can use knowledge of the defect's location within the circuit to better estimate its probability of affecting device yield.

07/06/2009  On the heels of new funding and mask tool support from DNP, Mark Melliar-Smith, CEO of Molecular Imprints, lays out his case for imprint lithography vs. EUV for post-193nm lithography, particularly in memory.

07/06/2009  July 5, 2009: On the heels of new funding and mask tool support from DNP, Mark Melliar-Smith, CEO of Molecular Imprints, lays out his case for imprint lithography vs. EUV for post-193nm lithography, particularly in memory.

07/03/2009  Peter Wolters CEO Kay Peterson tells SST how three key capabilities in the company's new double-sided polishing tools meet lithography challenges for 22nm and beyond semiconductor manufacturing.

06/30/2009  In a pre-SEMICON west technology briefing, SEMATECH's director of lithography, Bryan Rice, gave a sobering assessment of the readiness of EUV mask infrastructure -- currently, there are no commercial suppliers committed to building solutions for high-volume manufacturing mask blank inspection, mask defect inspection, and patterned inspection.

06/26/2009  Samsung engineers discuss advancements in manufacturing using the company's S1 fab, a state-of-the-art 300mm foundry line, as an example in the areas of patterning and closed loop variation control systems.

06/19/2009  A highlight at Intel's annual research open house held this week, amid general updates on eco-innovation, 3D graphics, mobility, and enterprise computing, was a roundtable discussion of the company's manufacturing research, including a summary of the status of EUV.

06/09/2009  Amid preparations for IMEC's 25th anniversary celebration, SST spoke with Luc Van den hove, now president/CEO of European R&D consortium IMEC, who discussed the research center's strategy and the keys to its success over the years.

06/04/2009  Researchers at Georgia Tech say they have experimentally demonstrated the potential for graphene to replace copper for on-chip interconnects and help extend performance scaling for silicon-based ICs.

05/12/2009  A recent collaboration between SEMATECH and Japan's TOK presents an opportunity for a look at the consortium's Resist Materials and Development Center, and its 22nm litho efforts and progress toward "manufacturable EUV."

05/12/2009  Lasertec describes a proposal for a new NGL that uses a DUV light source oscillating at 172nm or 175nm -- at this wavelength, higher-index materials such as BaLiF₃ can still be used enabling 32nm half-pitch by a single exposure.

05/05/2009  In BEOL lithography layers, microbridge defects can manifest as catastrophic single-line open circuit faults in the metal lines of the finished device. Enhanced filtration of bi-layer resist and post-develop ozonated UPW is shown to contribute significantly to reduction in post-litho microbridge defects, and ultimately reduction in single-line opens at e-test.

05/01/2009  The trends of decreasing dimensions and new materials motivated the investigation of how these may affect the dielectric reliability of the interconnect structures.

04/29/2009  IITC 2009 program chair Mike Shapiro (IBM) and publicity chair Mike Armacost (Applied Materials) brief SST on selected papers from the more than 80 technical presentations expected at the summer conference, held for the first time in Japan.

04/28/2009  IMEC provides more details and some broader perspective on its progress using EUV lithography, now on 22nm SRAMs on both the contact and metal-1 layers.

04/27/2009  Toppan Photomasks exec Franklin Kalk talks with SST about the joint work with IBM on photomasks for 32nm and 28nm semiconductor manufacturing, the key differences vs. 45nm-40nm work, the emergence of OMOG and SMO -- and eventually (and carefully), EUV.