Semiconductors

SEMICONDUCTORS ARTICLES



Advantest to expand beyond semiconductor test

01/05/2012 

Haruo Matsuno, president and CEO of Advantest Corporation (TSE:6857, NYSE:ATE) shares the company's major goals, including expansion into new measurement applications, utilization of cloud computing, and more.

SuVolta raises $17.6M for IC power-control tech

01/05/2012 

SuVolta Inc. secured $17.6 million in venture funding from all existing investors as well as new investor Bright Capital. SuVolta developed the PowerShrink low-power IC technology, which cuts chip power consumption by 50-90%.

Nocilis Materials launches SiGe foundry

01/05/2012 

Nocilis Materials opened its silicon foundry service globally. Nocilis Materials AB provides epitaxy service of advanced Si-Ge-Sn-C alloys for electronic and photonic applications.

Chip inventories contract, reversing 7 quarter trend

01/04/2012 

Chip inventories held by semiconductor suppliers declined in the third quarter of 2011, putting a halt to the steady expansion of the previous seven quarters, as the industry cut production in order to reduce oversupply, shows IHS iSuppli research.

Semiconductor sales tip downward in November

01/03/2012 

The Semiconductor Industry Association (SIA) reports worldwide sales of semiconductors were $25.1 billion for the month of November 2011. The semiconductor industry closed 2011 with growth and looks towards 2012 for further improvement.

22nm node semiconductors: Technical forecasts

01/03/2012 

Solid State Technology asked top analysts and technologists to provide insights on the transition to 22nm semiconductor devices. Read through the whole 10-forecast series, or check out the individual articles as you have time to see perspectives on lithography, device architecture, and more.

Graphene FET enables high-frequency mixer circuits

01/03/2012 

Chalmers University of Technology researchers created a graphene FET (G-FET) that is compatible with silicon devices and offers space and high-frequency benefits over traditional mixer transistors.

20nm mask technology relies on SMO and DPT

01/02/2012 

20nm production will be done with 193nm ArF immersion lithography. The workhorse lithography technologies will be double-patterning, source mask optimization, or some combination of the two, says Franklin Kalk, Toppan Photomasks.

Startups pave the way to CMP at 22nm

01/02/2012 

Defect control at 22nm is a critical focus for chemical mechanical polishing (CMP). Michael A. Fury, Techcet Group, discusses the current companies and trends on the leading edge of CMP for 22nm.

Will 22nm need a mid-node?

01/02/2012 

Art Zafiropoulo of Ultratech shares predictions for 22nm: that everyone will be using gate-last fabrication, that there may be a mid-node at 20nm, and that TSVs and 450mm wafers will play an important role at the new node.

UMC debuts 200mm Al BEOL fab process

12/30/2011 

United Microelectronics Corporation (UMC) launched the A+ technology platform, a specialized 0.11

Tegal sells deposition patents

12/30/2011 

Tegal sold over 30 patents from the NLD portfolio, Lots 1-3, covering pulsed-chemical vapor deposition (CVD), plasma-enhanced atomic-layer deposition (PEALD) and NLD.

Chinese foundries Hua Hong, Grace merge (finally)

12/30/2011 

Fulfilling a long-anticipated consolidation in China's foundry sector, Hua Hong NEC and Grace Semiconductor say they have officially merged, a move that creates a business that just might be knocking outside the Big Four's foundry doors.

Strained silicon and HKMG take the stage at 22nm

12/30/2011 

Mohith Verghese, ASM America, covers the gate stack changes expected when 22nm semiconductors ramp in volume production. Topics include high-k gate dielectrics, strained silicon including nMOS strain, and the importance of conformal deposition wafer processing technology.

22nm requires foundry-to-packaging-house cooperation

12/30/2011 

At the 22nm node, die fragility and challenging interconnect materials will necessitate foundry collaborations with packaging houses, co-designing silicon and package, asserts E. Jan Vardaman, TechSearch International.

Mask-wafer double simulation: A new lithography requirement at 22nm

12/30/2011 

Accurate mask-wafer double simulation is a new, required step for lithography at the 20nm node and beyond because corner rounding becomes the dominant effect, explains Aki Fujimura, D2S.

IEST cleanroom apparel doc update includes measurement guide

12/29/2011 

The updated "Garment System Considerations for Cleanrooms and Other Controlled Environments" document includes new sections on measuring footwear, frocks and other garments, as well as a new subsection for tracking system use, such as RFID chips and barcodes.

At 22nm, the focus is first order effects

12/29/2011 

Regardless of transistor architecture, the impact of process variability on device and circuit performance has emerged as a significant concern at 22nm. Effects that until recently were negligible or could be mitigated with improved wafer manufacturing control are now first-order effects, says Howard Ko, Synopsys, who outlines the main culprits.

At 22nm, leave chip layout to the experts

12/28/2011 

The transition to 22nm silicon will have a major impact on the design community, most notably in process variation: timing and power. Because of this, we are seeing a dramatic increase in the 22nm process design rules, says Gary Smith. More and more design teams will decide to leave the IC layout portion of the design to the experts.

Semiconductor IPOs and M&As in November 2011

12/28/2011 

The Global Semiconductor Alliance (GSA) released its Global Semiconductor Funding, IPO and M&A Update, showing that initial public offerings surged in November, with 3 companies entering the stock market.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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