03/18/2009  In a year that ultimately was terrible for the semiconductor industry, a few firms managed to claw their way up the list of sales leaders, though the top firms remain well entrenched, according to data from VLSI Research.

03/18/2009  March 18, 2009: Researchers at Rensselaer Polytechnic Institute have developed a new technique for growing slimmer copper nanorods, a key step for advancing integrated 3-D chip technology.

03/17/2009  by Fran

03/17/2009  David Wang, founder and CEO of ACM Research, tells SST about his company's new Ultra C 300mm single-wafer megasonic cleaning tool debuting at this week's SEMICON China, targeting advanced cleans at the 65nm and below technology nodes where mechanical damage and defect levels are more fragile and challenging.

03/17/2009  March 17, 2009 -- CHASKA, MN -- Entegris, Inc. has introduced a new solution for accurately measuring and controlling volatile organic compounds that cause contamination in advanced semiconductor lithography processes.

03/16/2009  Reducing wafer fabrication cost is considered key to the goal of making solar energy competitive with grid power. To this end is the goal of a new platform from Applied Materials that slices ingots into ultra-thin wafers.

03/16/2009  By Manish Ranjan, Ultratech Inc.
Leading-edge consumer electronic products demand innovative silicon and packaging solutions. While front-end silicon technologies have progressed at a pace defined by Moore's Law, the back-end infrastructure has lagged in similar advancements. This has created an interconnect gap whereby the signal speed achieved on the silicon side is significantly higher than the speed achieved on the printed circuit boards.

03/12/2009  A new inspection product from KLA-Tencor/ICOS offers optical in-line dual-sided inspection of photovoltaic (PV) wafers and cells for all stages of the production process, from bare wafer to silicon nitride (SiN) coating, metallization, and final classification.

03/11/2009  MARCH 11, 2009 -- IC Insights reports there are eight U.S. companies in the top-20 semiconductor ranking (including three fabless semiconductor suppliers), six Japanese, three European, two South Korean, and one Taiwanese company (IC foundry supplier TSMC) in the ranking. It required at least $3.6 billion in 2008 sales to make the top 20 ranking.

03/10/2009  Ken Rygler offers his view of this year's SPIE event, and what's at stake in a proposed divergence of focus into EUV and "all other" litho technologies.

03/09/2009  How much longer can the industry stay on an 'optics forever' path? EUV is gaining momentum and closing the gap, with most infrastructure in place (but one missing piece could be a "showstopper"). This year's SPIE's Advanced Lithography Conference in San Jose, CA, provided a detailed update on this tightening horse race.

03/06/2009  Mark Slezak, director of lithography technology at JSR Micro, weighs in on Bernie Meyerson's (IBM) SPIE keynote urging industry "coopetition" -- a concept he notes is already alive and well in the materials sector.

03/05/2009  March 4, 2009: The Nanotechnology Knowledge Transfer Network, based in the UK, and the Joint Equipment Materials Initiative are collaborating on focus-group event to examine the technique of atomic layer deposition.

03/04/2009  Stefan Wurm, AMD assignee to SEMATECH and associate director of the lithography division, believes the industry wants to see EUV lithography work in anticipation of its potential at 22nm, 16nm, and possibly 11nm.

03/03/2009  Amkor's TMVPoP is a next-generation package-on-package (PoP) that incorporates the company's proprietary through mold via (TMV) technology, which uses lasers to create interconnect vias through the mold cap. TMV technology reportedly provides a stable bottom package that enables use of thinner substrates with a larger die to package ratio.

03/03/2009  by James A. Forster, Ph.D., Antares Advanced Test Technologies
As IC manufacturers rely more on the burn-in process to bring the latest devices from fabs to consumers, it is important to understand burn-in test. As feature size is reduced into the nanometer range, designers can place more circuits on a square of silicon. As the number of transistors and the total amount of circuitry on a chip increases, the potential for a defect increases, leading to immediate or future failures.

03/03/2009  Several lithography candidates seem promising for patterning circuits at 22nm and beyond: EUV, nano-imprint, direct write, and optical double patterning methods. But at an afternoon panel at SPIE hosted by Applied Materials, it became clear that only double patterning can deliver the necessary balance of performance and cost required for 22nm volume production.

03/03/2009  By Hans Hirsher, Ph.D. and Hans Auer, Oerlikon Systems The demand for thin and ultrathin semiconductor devices grows continuously. Discrete and bipolar IC's as well as devices for stacking or thin packages require thinner and thinner wafers. The challenge is to find a reliable processing method.

03/02/2009  The DRAM market will finally hit bottom to start this year, and gradually pick up through the year with "outstanding quarterly growth," according to a new analysis from IC Insights.

03/01/2009  Mark Melliar-Smith, CEO of Molecular Imprints, discusses the company's work to develop a 1X mask infrastructure.