08/04/2008  The AVIA 355-28, from Coherent extends the company's family of micromachining lasers to deliver] 28 Watts of output at 355 nm (at 110 kHz). This high power and repetition rate is said to increase throughput for micromachining applications in semiconductor fabrication and packaging. Target applications include dicing and scribing of silicon wafers and low-k semiconductors, and via-hole drilling in PCBs and flip chips.

08/04/2008  Memory concerns aside, there's still reason to be happy with growth in the semiconductor industry, mainly thanks to emerging markets' hunger for PCs and mobile phones, according to the latest data from the Semiconductor Industry Association (SIA).

08/01/2008  Sarnoff exec David Cheskis describes the company's backside thinning technology that enables the use of SOI substrates, and why SOI is a more cost-effective and better performance alternative than bulk silicon for back-illuminated image sensors.

08/01/2008  During SEMICON West, we arranged to interview as many technology leaders as possible through short video coverage — conversations really.

08/01/2008  Emerging micro-bump wafers present unique challenges for measurement and inspection.

08/01/2008  As we enter the second half of 2008, the sedate long-term growth pattern of the semiconductor industry continues.

08/01/2008  Thin, strong chips are assembled in chip packages; not bonded wafers. Therefore, die singulation must be considered from the start. Remote cold dry etching technology allows for the manufacturing of strong silicon chips in terms of highest possible mechanical properties and bending capability.

07/31/2008  Gartner and VLSI Research analysts tell SST what's the driving interest behind KLA-Tencor's proposed acquisition of Vistec Semiconductor Systems' inspection business, and where areas of overlap might be leveraged to take on other sector competitors.

07/31/2008  Fabs have historically relied upon optical inspection as a robust, reliable, well-understood technique to find all kinds of defects, but shrinking feature sizes and more demanding surface cleanliness requirements are exposing its limits. Enter Qcept Technologies, which says its technique can identify defects by measuring changes in work function.

07/30/2008  After several years of 40%-50% growth, the market for silicon-on-insulator (SOI) watched sales sink to nearly flat growth in 2007, and despite a projected spike over the next two years annual growth will barely be 10% by 2012, according to data from VLSI Research.

07/29/2008  Susan Felch, principal member of Spansion's frontend development staff, summarized recent work regarding ultrashallow junctions at the West Coast Junction Technology Group meeting held in conjunction with SEMICON West (July 17) in San Francisco.

07/25/2008  Double patterning was the talk of the litho panels during SEMICON West and in pitches by top scanner makers ASML, Canon, and Nikon -- but still none have evolved their tools to offer the required overlay capability, with throughput sufficient to be profitable. Even the closest one of the bunch is billed as the "ultimate" single-patterning tool.

07/24/2008  J P Sercel Associates (JPSA) and DynTest Technologies of Grassau, Germany, have entered into a collaborative partnership reportedly to develop and manufacture high-precision scriber / breaker solutions for wafer singulation. DynTest specializes in precise, accurate, and efficient breaking systems, while JPSA specializes in high-speed, high-accuracy laser workstations for wafer scribing.

07/24/2008  Execs from ASML and Applied Materials tell SST what's driving the re-emergence of memory as a driver for IC manufacturing, and how this trend is impacting development and adoption of new technologies such as double-patterning and EUV lithography.

07/23/2008  Concerns about the next steps in device scaling -- profitability at 32nm and beyond, challenges of double-patterning, worries about chipmakers' commitment to design-tool functionality -- were aired out in a SEMICON West TechXpot discussion.

07/22/2008  On Wednesday, July 16, 2008, the editors and publisher of Solid State Technology (SST) and Advanced Packaging Magazine presented the 2008 ACA Awards, in usual impromptu style on the floor at SEMICON West. This was the sixth straight year attendees of SEMICON West were invited to vote on products they saw at the annual trade show.

07/22/2008  John O. Borland, organizer of the West Coast Junction Technology Group Meeting (WCJTG) held the final morning of SEMICON West, talks on camera to discuss the group's latest research, and other presenters provide summaries of their talks.

07/22/2008  Designed for ultra-thin wafer handling, especially for back-end inspection, the NWL200 Series of wafer loaders from Nikon Instruments is said to be capable of loading wafers as thin as 100 µm. A chuck system to transfer wafers, an optimized arrangement of sensor beams that allow for accurate detection of wafer shape, and an optional edge-chipping detection function that automatically detects wafer cracking reportedly allows macro inspections of all areas.

07/22/2008  The second-generation SUSS MA300, from SUSS MicroTec is a highly automated mask aligner platform for 300-mm and 200-mm wafers. Specifically designed for 3D packaging, it features a dedicated alignment kit for creating 3D interconnects for applications like chip stacking and 3D image sensor packaging. It also targets wafer bumping and wafer level packaging (WLP) applications, but can be used for other technologies where geometries in the range of 5 and 100 µm must be exposed.

07/22/2008  With the Magellan XHR SEM, FEI Company has launched a class of instruments called extreme high-resolution scanning electron microscopes that allow scientists and engineers to view 3D surface images at different angles and at resolutions below one nanometer. The Magellan XHR SEM images samples at very low beam energies, avoiding distortions otherwise caused by the beam penetrating into the material below.