Semiconductors

SEMICONDUCTORS ARTICLES



Semiconductor Cleanrooms 101: Cleanroom training pays off in Texas

03/01/2007  Kelly Freeman, a physics major at Texas State University in San Marcos, wanted to explore her employment options and boost her chances of finding a job.

Nikon touts shipment of 45nm immersion tool

02/28/2007  February 28, 2007 - Nikon Corp. says it has shipped its newest ArF immersion lithography scanner, the NSR-S610C, to an unnamed IC manufacturer for 45nm production work and 32nm development. The selection came after a "one-year, head-to-head evaluation," according to Kazuo Ushida, president of Nikon Precision Equipment Co.

Luminescent touts 45-32nm benefits of "ILT"

02/27/2007  February 27, 2007 - At this week's SPIE Advanced Lithography Symposium, Luminescent Technologies claims to have data showing customers using its inverse lithography technology (ILT) in 45nm and 32nm development efforts. The company is touting ILT as an alternative to optical proximity correction (OPC), offering better pattern fidelity and broader lithography process windows.

SPIE keynotes dismiss EUV

02/27/2007  The organizing committee of SPIE Advanced Lithography Symposium -- the conference formerly known as "Microlithography" -- probably didn't plan for the Monday (Feb. 26) keynote addresses to dismiss EUV lithography, but that's exactly what happened. Prior to three days of detailed EUV presentations, executives presented perspectives that do not include place for this next-generation lithography technology any time in the near future.

Report: TSMC expanding Shanghai ops with NXP's used tools

02/27/2007  February 27, 2007 - Taiwan Semiconductor Manufacturing Co. (TSMC), recent beneficiary of relaxed government regulations regarding transfer of process technologies to mainland China, will likely utilize used equipment from NXP Semiconductor in order to triple the output from its 200mm, 30,000 WPM capacity site in Shanghai, according to the Taiwan Economic News.

Nikon, CEA-Leti partner for 32nm double patterning/exposure

02/27/2007  February 27, 2007 - Nikon Corp. and European R&D microelectronics research center CEA-Leti say they have formed a joint development program to develop optical lithography technologies at the 32nm node, including double exposure and double patterning. Work will be performed at CEA-Leti's Nanotec 300 research facility, utilizing a Nikon scanner.

SATS Industry Grows 26%

02/27/2007  The global semiconductor assembly and test services (SATS) market grew 25.7% in 2006, the fifth consecutive year this sector has exhibited double-digit growth, according to preliminary reports from Gartner, Inc. The SATS industry, the outsourcing portion of back-end packaging, assembly, and test, is propelled by major transitions to advanced packaging, including wafer-level, chip-scale, flip chip, and system-in-package (SiP) methods, said Jim Walker.

Gartner: Backend chip services surged 26% in 2006

02/26/2007  February 26, 2007 - Worldwide sales of semiconductor assembly and test services (SATS) marked the fifth consecutive year of double-digit growth in 2006, due to accelerated transition to and integration with new packaging technologies, according to data from Gartner Dataquest.

Merging Blaze, Aprio claim eDFM crown

02/26/2007  The announced merger of Blaze DFM and Aprio Technologies establishes an entity ready to claim the mantle of tops in "electrical DFM (eDFM)," in a highly fragmented DFM market with many companies positioning for leadership, according to execs announcing the deal. "We believe that there is room for one eDFM company that stands by itself...and we are going to be that company," stated Jacob Jacobsson, currently president/CEO of Blaze DFM.

Hitting up computational lithography with a 4x4

02/26/2007  Brion Technologies is unveiling its second-generation system, Tachyon 2.0, at this week's SPIE Advanced Lithography Conference (Feb. 26, San Jose, CA). Still using Xilinx FPGAs (current generation) to achieve hardware acceleration, the company claims that a single Tachyon 2.0 system rack can replace the production capacity of four of the first generation racks.

DNP, Takumi team for photomask inspection system

02/26/2007  February 26, 2007 - Dai Nippon Printing Co. Ltd. (DNP) and Takumi Technology Corp. say they are developing an automated criticality-aware photomask inspection system to help reduce manufacturing cost and turnaround times of advanced photomasks. The product, currently in beta phase with an unnamed semiconductor manufacturer, is expected to be ready by March 2008 for worldwide deployment to DNP's customers as a service, at no extra cost.

Volume production necessary for flexible electronics

02/26/2007  For the emerging flexible thin-film, organic, and printed electronics markets to flourish, most industry professionals agree that roll-to-roll (R2R) processing must be implemented on the factory floor. But how will manufacturing will be leveraged into successful, scaleable R2R approaches? Contributing Editor Tom Cheyney reports.

Cypress tabs UMC for 65nm SRAM manufacturing

02/26/2007  February 26, 2007 - Cypress Semiconductor Corp. says it will contract with Taiwan foundry United Microelectronics Corp. (UMC) to produce its next-generation flagship SRAM products, continuing efforts to retreat from leading-edge manufacturing and development following the planned sale of its 65nm process R&D shop, the Silicon Valley Technology Center (SVTC).

Chartered, IBM extend pact to 32nm

02/26/2007  February 26, 2007 - IBM and Chartered Semiconductor Manufacturing have formally extended their joint development efforts to include 32nm CMOS technology, building on their initial partnership begun in late 2002 starting at 90nm.

NEC closing older fabs, moving work to Asia

02/23/2007  February 23, 2007 - A wide-ranging restructuring plan unveiled by NEC Electronics Corp. aims to improve profitability over the next few years, by consolidating its facilities in Japan from nine to four; moving a variety of backend manufacturing overseas to elsewhere in Asia; and cutting back capex levels by 30% starting in 2008 once it finishes the bulk of its 300mm manufacturing investments.

KLA-Tencor tips new litho optimizer

02/23/2007  February 23, 2007 - KLA-Tencor says the new version of its PROLITH litho optimization product, PROLITH 10, enables users to accurately predict lithography process windows for integrated circuit (IC) designs down to 32nm.

Samsung revs up "world's fastest graphics memory"

02/23/2007  February 23, 2007 - Samsung Electronics Co. Ltd. says it has increased data transfer speeds in its GDDR (graphics double data rate v.4) graphics memory by two-thirds to 4Gbit/sec (2.0GHz), 66% faster than today's 2.4Gbit/s GDDR4.

Elpida sells 200mm tools to China chipmakers

02/23/2007  February 23, 2007 - Japanese DRAM firm Elpida Memory Inc. said it has agreed to sell 200mm wafer processing equipment from its Hiroshima facility to Cension Semiconductor Manufacturing Corp. in order to narrow its focus to 300mm chipmaking operations.

SICAS: Capacity adds still outpaced output in 4Q

02/22/2007  February 22, 2007 - The latest data from Semiconductor International Capacity Statistics (SICAS) shows that actual wafer starts have slowed behind rising capacity additions, causing utilization rates to decelerate further below the 90% mark historically used to signal new capacity investments.

Blaze, Aprio tie up in DFM merger

02/21/2007  February 21, 2007 - Staking their claim to the mantle of tops in "electrical DFM," Blaze DFM and Aprio Technologies have announced a merger that they say will create "the industry's only comprehensive electrical DFM solution."




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Environment, Safety & Health

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The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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