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The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced worldwide sales of semiconductors reached $37.6 billion for the month of January 2018, an increase of 22.7 percent compared to the January 2017 total of $30.6 billion. Global sales in January were 1.0 percent lower than the December 2017 total of $38.0 billion, reflecting normal seasonal market trends. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“After notching its highest-ever annual sales in 2017, the global semiconductor industry is off to a strong and promising start to 2018, posting its highest-ever January sales and 18th consecutive month of year-to-year sales increases,” said John Neuffer, president and CEO, Semiconductor Industry Association. “All major regional markets saw double-digit growth compared to last year, with the Americas leading the away with year-to-year growth of more than 40 percent. With year-to-year sales also up across all major semiconductor product categories, the global market is well-positioned for a strong start to 2018.”

Year-to-year sales increased substantially across all regions: the Americas (40.6 percent), Europe (19.9 percent), Asia Pacific/All Other (18.6 percent), China, (18.3 percent), and Japan (15.1 percent). Month-to-month sales increased slightly in Europe (0.9 percent), held flat in China, but fell somewhat in Asia Pacific/All Other (-0.6 percent), Japan (-1.0 percent), and the Americas (-3.6 percent).

To find out how to purchase the WSTS Subscription Package, which includes comprehensive monthly semiconductor sales data and detailed WSTS Forecasts, please visit http://www.semiconductors.org/industry_statistics/wsts_subscription_package/. For detailed data on the global and U.S. semiconductor industry and market, consider purchasing the 2017 SIA Databook: https://www.semiconductors.org/forms/sia_databook/.

Jan 2018

Billions

Month-to-Month Sales                              

Market

Last Month

Current Month

% Change

Americas

8.95

8.63

-3.6%

Europe

3.37

3.40

0.9%

Japan

3.24

3.21

-1.0%

China

12.01

12.01

0.0%

Asia Pacific/All Other

10.41

10.35

-0.6%

Total

37.99

37.59

-1.0%

Year-to-Year Sales                         

Market

Last Year

Current Month

% Change

Americas

6.14

8.63

40.6%

Europe

2.84

3.40

19.9%

Japan

2.79

3.21

15.1%

China

10.16

12.01

18.3%

Asia Pacific/All Other

8.73

10.35

18.6%

Total

30.64

37.59

22.7%

Three-Month-Moving Average Sales

Market

Aug/Sep/Oct

Nov/Dec/Jan

% Change

Americas

8.54

8.63

1.1%

Europe

3.36

3.40

1.1%

Japan

3.20

3.21

0.3%

China

11.65

12.01

3.1%

Asia Pacific/All Other

10.33

10.35

0.1%

Total

37.09

37.59

1.4%

BY SYAHIRAH MD ZULKIFLI, BERNICE ZEE AND WEN QIU, Advanced Micro Devices, Singapore; ALLEN GU, ZEISS, Pleasanton, CA

3D integration and packaging has challenged failure analysis (FA) techniques and workflows due to the high complexity of multichip architectures, the large variety of materials, and small form factors in highly miniaturized devices [1]. The drive toward die stacking with High Bandwidth Memory (HBM) allows the ability to move higher bandwidth closer to the CPU and offers an oppor- tunity to significantly expand memory capacity and maximize local DRAM storage for high throughput in the data center. However, the integration of HBM results in more complex electrical communications, due to the emerging use of a physical layer (PHY) design to connect the chip and subsystems. FIGURE 1 shows the schematic of a 2.5D stacked die package designed so that some HBM μbumps are electrically connected to the main CPU through a PHY connection. In general, the HBM and CPU signal length needs to be minimized to reduce drive strength requirements and power consumption at the PHY.

Screen Shot 2018-03-01 at 11.46.34 AM

This requirement poses new challenges in FA fault isolation. A traditional FA workflow using electrical fault isolation (EFI) techniques to isolate the defect becomes less effective for chip-to-chip interconnects because there are no BGA balls for electrically probing the μbumps at the PHY. As a result, new defect localization techniques and FA flows must be investigated.

XRM theory

X-ray imaging is widely employed for non-destructive FA inspection because it can explore interior structures of chips and packages, such as solder balls, silver paste and lead frames. Thus, many morphological failures, such as solder-ball crack/burn-out and bumping failure inside IC packages, can be imaged and analyzed through X-ray tools. In 2D X-ray inspection, an X-ray irradiates samples and a 2D detector utilizes the projection shadow to construct 2D images. This technique, however, is not adequate for revealing true 3D structures since it projects 3D structures onto a 2D plane. As a result, important information, such as internal faulty regions of electronic packages, may remain hidden. This disadvantage can be overcome by using 3D X-ray microscopic technology, derived from the original computed tomography (CT) technique. In a 3D imaging system, a series of 2D X-ray images are captured at different angles while a sample rotates.

These 2D images are used to reconstruct 3D X-ray tomographic slices using mathematic models and algorithms. The spatial resolution of the imaging technique can be improved through the integration of an optical microscopy system. This improved technology is called 3D X-ray microscopy (XRM) [2]. FIGURE 2 shows an example 3D XRM image for a stacked die. The image clearly shows the internal structures – including the TSV, C4 bumps and μbump of the electronic components – without physically damaging or altering the sample. The high resolution and quality shown here are essential to inspect small structural defects inside electronic devices. With its non-destructive nature, 3D XRM has been useful for non-destructive FA for IC packaging devices.

Screen Shot 2018-03-01 at 11.46.42 AM

Failure analysis approach

The purpose of an FA workflow is to have a sequence of analytical techniques that can help to effectively and quickly isolate the failure and determine the root cause. Typical FA workflows for flip-chip devices consist of non-destructive techniques such as C-Mode scanning acoustic microscopy (C-SAM) and time domain reflectometry (TDR) to isolate the failure, followed by destructive physical failure analysis (PFA). However, there are limitations to each of these techniques when posed with the failure analysis of a more complex stacked die package.

C-SAM allows the inspection of abnormal bumps, delamination and any mechanical failure. A focused soundwave is directed from a transducer to a small point on a target object and is reflected when it encounters a defect, inhomogeneity or a boundary inside the material. The transducer transforms the reflected sound pulses into electromagnetic pulses, which are displayed as pixels with defined grey values thereby creating an image [3]. However, stacked die composed of a combination of multiple thin layers may complicate C-SAM analysis. This is because the thin layers have smaller spacing between the adjacent interface, and shorter delay times for ultrasound traveling from one interface to another. Therefore, failures between the die and die attach may not be easily detected, and false readings may even be expected.

TDR is an electrical fault isolation tool that enables failure localization through electrical signal data. The TDR signal carries the impedance load information of electrical circuitry; hence, the reflected signals show the discontinuity location that has caused the mismatch of impedance. In-depth theory on TDR is further discussed in Chin et al [4]. However, TDR can only estimate where the failure lies, whether it is in the substrate, die or interposer region. To pin point the exact location within the area of failure is difficult, due to limitations in separating the various small structures through the TDR signal. Additionally, some of the pulse power is reflected for every impedance change, posing challenges regarding unique defect isolation and signal complexity – especially for stacked die [5]. In cases where the failure pins reside in the HBM μbump region, no BGA ball out is available to probe and send an electrical pulse through.

Physical Failure Analysis (PFA) is a destructive method to find and image the failure once non-destructive fault isolation is complete. PFA can be done both mechanically and by focused ion beam (FIB). For stacked dies, FIB is predominantly used to image smaller interconnect structures such as TSVs and μbumps. However, the drawback is that the success of documenting the failure through PFA is largely dependent on how well the non-destructive FA techniques can isolate the failure region. Without good clear fault isolation direction, the failure region might be destroyed or missed during the PFA process, and thus no root cause can be derived.

The integration of XRM into the FA flow can help to overcome the limitations of the various analysis techniques to isolate the failure. It is a great advantage to image small structures and failures with the high spatial resolution and contrast provided by XRM and without destroying the sample. For failures in stacked die, XRM can be integrated into the FA flow for further fault isolation with high accuracy. The visualization of defects and failed material prior to destructive analysis increases FA success rates. However, the trade-off for imaging small defects at high resolution is time. For stacked die failures, C-SAM and TDR can first be performed to isolate the region of failure. With a known smaller region of interest to focus on, the time taken for XRM to visualize the area at high resolution is significantly reduced.

In cases where failures are identified in the HBM μbump, XRM is an effective technique to isolate the failure through 3D defect visualization. With the failure region isolated, XRM can then act as a guide to perform further PFA. Following are three case studies where XRM was used to image HBM packages with stacked dies.

Case studies

In the first case study, we explore the application of XRM as the primary means of defect visualization where other non-destructive testing and FA techniques are not possible. An open failure was reported for non-underfilled stacked die packages during a chip package interaction (CPI) study. The suspected open location was within the μbump joints at the HBM stack/ interposer interface. The initial approach exposed the bottom-most die of the HBM stack, followed by FIB cross-sectioning at the specified location. Performing the destructive approach to visualize the integrity of μbump joints in non-underfilled stack die packages was virtually impossible due to the fragility of silicon. The absence of underfill (UF) means that the HBM does not properly adhere to the interposer and is susceptible to peel off. In addition, there was no medium to release shear stresses experienced by the μbump joints upon bending stresses, which could not be absorbed by the package. As seen in FIGURE 3, parallel lapping of the HBM stack without UF caused die crack and peeling.

Screen Shot 2018-03-01 at 11.46.50 AM

Consequently, to avoid aggravating the damage on the sample, 3D XRM was performed to inspect and visualize the suspected location using a 0.7μm/voxel and 4X objective without any sample preparation. FIGURE 4 shows an example virtual slice where the micro-cracks throughout the row of μbump joints are visualized. The micro-cracks are measured a few microns wide. It is worth noting that the micro-cracks were visible with a short scan time of 1.5 hrs.

Screen Shot 2018-03-01 at 11.47.00 AM

With the critical defect information in 3D, PFA was performed on a sample that was underfilled to facilitate ease of sample preparation. SEM images in FIGURE 5 validated the existence of μbump micro-cracks observed by 3D XRM inspection.

In the second case study, the 3D XRM technique was applied to a stacked die package with a failure at a specific HBM/XPU physical interface (PHY) μbump connection. This μbump connection provides specific communication between the HBM stack and XPU die, and there is no package BGA ball out to enable electrical probing. Accordingly, it was not possible to verify if the failure type was an open or short. In addition, there was no means to determine if the failure was at the HBM or XPU die. Since defects from previous lots were open failures at the PHY μbump of the HBM, 3D XRM was performed at the suspected HBM open region using a 0.85μm/voxel and 4X objective.

As no defect was observed, XRM was then applied to the corresponding XPU PHY μbump. Contrary to the anticipated μbump open, a short was observed between two μbumps as shown in FIGURES 6a and 6b.

Screen Shot 2018-03-01 at 11.47.22 AM Screen Shot 2018-03-01 at 11.47.28 AM

 

The μbump short resulted from a solder extrusion bridging two adjacent μbumps. If 3D XRM had not been performed, a blind physical cross-section likely would have been performed on the initially suspected open region. As a result, the actual failure region may have been missed and/or destroyed.

In the final case study, an open failure was reported at a signal pin of a stack die package. As per the traditional FA flow, C-SAM and TDR techniques were applied to isolate the fault. C-SAM results showed an anomaly, and TDR suggested an open in the substrate as demonstrated in FIGURE 7a and 7b respectively.

Screen Shot 2018-03-01 at 11.47.10 AM Screen Shot 2018-03-01 at 11.47.16 AM

To verify the observations made by C-SAM and TDR non-destructive techniques, 3D XRM was performed using a 0.80μm/voxel and 4X objective at the region of

FIGURE 8 revealed a crack between the failure C4 bump and associated TSV. A physical cross-section was performed and the passivation cracks between the TSV and interposer backside redistribution layer (RDL) was observed as shown in FIGURE 9.

Screen Shot 2018-03-01 at 11.47.35 AM

In this case, 3D XRM provided 3D information for the FA engineer to focus on. Without the visual knowledge on the defect’s nature and location, the defect would have been missed during PFA.

Summary and conclusions

3D integration and packaging have brought about new challenges for effective defect localization, especially when traditional electrical fault isolation is not possible. 3D XRM enables 3D tomographic imaging of internal structures in chips, interconnects and packages, providing 3D structural information of failure areas without the need to destroy the sample. 3D XRM is a vital and powerful tool that helps failure analysis engineers to overcome FA challenges for novel 3D stacked-die packages.

Acknowledgement

This article is based on a paper that was presented at the 24th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2017).

References

  1. F. Altmann and M. Petzold, “Innovative Failure Analysis Techniques for 3-D Packaging Developments,” IEEE Design & Test, Vol. 33, No. 3, pp. 46-55, June 2016.
  2. C. Y. Liu, P. S. Kuo, C. H. Chu, A. Gu and J. Yoon, “High resolution 3D X-ray microscopy for streamlined failure analysis workflow,” 2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore, 2016, pp. 216-219.
  3. M. Yazdan Mehr et al., “An overview of scanning acoustic microscope, a reliable method for non-destructive failure analysis of microelectronic components,” 2015 16th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Micro- electronics and Microsystems, Budapest, 2015, pp.1-4.
  4. J. M. Chin et al., “Fault isolation in semiconductor product, process, physical and package failure analysis: Importance and overview,” Microelectronics Reliability, Vol. 51, Issue 9, pp. 1440-8, Nov. 2011.
  5. W. Yuan et al., “Packaging Failure Isolation with Time-Domain Reflectometry (TDR) for Advanced BGA Packages,” 2007 8th International Conference on Electronic Packaging Technology, Shanghai, 2007, pp. 1-5.

Entering 2018 on solid ground


February 22, 2018

By Walt Custer, Custer Consulting Group

2017 finished on an upturn – both in the USA and globally.  Based on consolidated fourth-quarter actual and estimated revenues of 213 large, global electronic manufactures, sales rose in excess of 7 percent in 4Q’17 vs. 4Q’16 (Chart 1).  This was the highest global electronic equipment sales growth rate since the third quarter of 2011. Because some companies in our sample didn’t close their financial quarter until the end of January, final results will take a few more weeks – but all evidence points to a very strong fourth quarter of last year.

Custer1-Electronic-Equipment

 

Using regional (country specific) data (Chart 2), the normal, consumer electronics driven seasonal downturn began again in January.  However the recent year-over-year growth is still substantial.  On a total electronic equipment revenue basis, January 2018 was up almost 19.5 percent over January 2017.

Custer2-World-Electronic

Because this regional data in local currencies was converted to U.S. dollars at fluctuating exchange, the dollar denominated-growth was amplified by currency exchange effects.  At constant exchange the January growth was only 14 percent.   That is, when the stronger non-U.S. currencies were converted to weakening dollars, the dollar-denominated January 2018 fluctuating exchange growth was amplified by 5.5 percent.

Chart 3 shows 4Q’17/4Q’16 growth of the domestic electronic supply chain.  U.S. electronic equipment shipments were up 9.1 percent.  Only computer equipment and non-defense aircraft sales declined in the fourth quarter.  And of note, SEMI equipment shipments to North America rose almost 31 percent!

Custer3-US-Electronic-Supply

 

Chart 4 shows estimated fourth-quarter growth for the world electronic supply chain.  Only “Business & Office” equipment revenues declined in 4Q’17 vs. 4Q’16.

Custer4-Global-Electronic

Total global electronic equipment sales increased more than 7 percent in the fourth quarter and SEMI equipment revenues rose 32 percent.

2017 was a strong year and 2018 is off to a good start!  The 2017 lofty growth rates will temper, but this current expansion will likely continue.  Watch the monthly numbers!

Originally published on the SEMI blog.

The ten largest semiconductor R&D spenders increased their collective expenditures to $35.9 billion in 2017, an increase of 6% compared to $34.0 billion in 2016. Intel continued to far exceed all other semiconductor companies with R&D spending that reached $13.1 billion.  In addition to representing 21.2% of its semiconductor sales last year, Intel’s R&D spending accounted for 36% of the top 10 R&D spending and about 22% of total worldwide semiconductor R&D expenditures of $58.9 billion in 2017, according to the 2018 edition of The McClean Report that was released in January 2018.  Figure 1 shows IC Insights’ ranking of the top semiconductor R&D spenders, including both semiconductor manufacturers and fabless suppliers.

Figure 1

Figure 1

Intel’s R&D expenditures increased just 3% in 2017, below its 8% average annual growth rate since 2001, according to the new report.  Still, Intel’s R&D spending exceeded the combined R&D spending of the next four companies—Qualcomm, Broadcom, Samsung, and Toshiba—listed in the ranking.

Underscoring the growing cost of developing new IC technologies, Intel’s R&D-to-sales ratio has climbed significantly over the past 20 years.  In 2017, Intel’s R&D spending as a percent of sales was 21.2%, down from an all-time high of 24.0% in 2015.  In 2010, the ratio was 16.4%, 14.5% in 2005, 16.0% in 2000, and just 9.3% in 1995.

Qualcomm—the industry’s largest fabless IC supplier—was again ranked as second-largest R&D spender, a position it first achieved in 2012.  Qualcomm’s semiconductor-related R&D spending was down 4% in 2017, after a 7% drop in 2016, and it was close to being passed up by third place Broadcom and fourth placed Samsung, whose R&D spending increased 4% and 19%, respectively.

Despite increasing its R&D expenditures by 19% in 2017, Samsung had the lowest investment-intensity level among the top-10 R&D spenders with research and development funding at 5.2% of sales last year.  Samsung’s 49% increase in semiconductor revenue in 2017 (driven by strong growth in DRAM and NAND flash memory) lowered its R&D as a percent of sales ratio from 6.5% in 2016.  Micron Technology’s revenues surged 77% in 2017, but its research and development expenditures grew 8%, resulting in an R&D/sales ratio of 7.5% compared to 12.5% in 2016.  Similarly, SK Hynix’s sales climbed 79% in 2017, while its research and development spending increased 14% in the year, which resulted in an R&D/sakes ratio of 6.5% versus 10.2% in 2016.

Fifth-ranked Toshiba and sixth-ranked Taiwan Semiconductor Manufacturing Co. (TSMC) each allocated about the same amount for R&D spending in 2017.  Toshiba’s R&D spending was down 7% while TSMC had one of the largest increases in R&D spending among the top 10 companies shown in the figure. TSMC’s R&D expenditures grew by 20% as the foundry raced rivals Samsung and GlobalFoundries in launching new process technologies, while its sales rose 9% to $32.2 billion in the year.

Rounding out the top-10 list were MediaTek, Micron, Nvidia, which moved from 11th place in 2016 to 9th position to displace NXP in the 2017 ranking, and SK Hynix.  Collectively, the top-10 R&D spenders increased their outlays by 6% in 2017, two points more than the 4% R&D increase for the entire semiconductor industry.  Combined R&D spending by the top 10 exceeded total spending by the rest of the semiconductor companies ($35.9 billion versus $23.0 billion) in 2017.

A total of 18 semiconductor suppliers allocated more than more than $1.0 billion for R&D spending 2017.  The other eight manufacturers were NXP, TI ST, AMD, Renesas, Sony, Analog Devices, and GlobalFoundries.

ASML’s dominance in the semiconductor equipment market continued in 2017, according to the report “Sub-100nm Lithography: Market Analysis and Strategic Issues,” recently published by The Information Network (www.theinformationnet.com), a New Tripoli, PA-based market research company.

ASML’s led the semiconductor lithography equipment market for its 12th straight year, with a market share of more than 60% for system sales. The company led the market in revenue share for its 16th straight year, achieving a share of more than 85% in 2017.

information network

 

ASML is also the only supplier of EUV lithography systems, which cost over $100 million. Intel, Samsung Electronics, TSMC, and Globalfoundries are planning on introducing EUV at the 7nm technology node to reduce multi-patterning process steps required of immersion DUV lithography as dimensions approach 7nm. The replacement of immersion DUV by EUV will dramatically reduce deposition, etch, and metrology step, impacting equipment suppliers.

By Jamie Girard and Jay Chittooran, SEMI Public Policy

With much pride, President Donald Trump, in his State of the Union address last week, touted the signature legislative achievement of his first year in office – passage of the Tax Cuts and Jobs Act.  As companies doing business globally, SEMI members have long stressed their concern that the US business tax code was putting them at a disadvantage.  SEMI has worked for many years to voice its position that the US code needed to be reformed to lower the overall tax rate on businesses while also retaining incentives for innovation, like the research and development (R&D) and tax credits.  SEMI also pushed for the US to move to a territorial tax system to bring the US into alignment with the rest of the world.

President Donald Trump, State of the Union speech. Photo credit: CNN

President Donald Trump, State of the Union speech. Photo credit: CNN

The Tax Cuts and Jobs Act implements all the of principle that SEMI members have advocated for, and included other industry priorities like repatriation of foreign held assets at a lower rate.  The new structure promises to allow for a more competitive business environment for companies doing business from the US, and greater growth for them globally.

“As tax cuts create new jobs, let us invest in workforce development and job training,” Trump noted in his State of the Union speech, addressing another major industry priority. “Let us open great vocational schools so our future workers can learn a craft and realize their full potential.”

Workforce development (Talent) is a critical issue for the industry, and SEMI recognizes the pressing need on multiple fronts to find the workers, both technical and highly-educated, to continue the work of driving innovation in the semiconductor industry.  While SEMI works with industry partners to boost the industry talent pool, we also recognize that the federal government has a role to play in ensuring that the US is doing its share to help address the problem. That’s why SEMI supports legislation like H.R. 4023, the Developing Tomorrow’s Engineering and Technical Workforce Act, aimed at providing federal dollars to promote engineering education at all levels of learning. The bill has bipartisan support in Congress, and SEMI will continue to work to see the bill travel to President Trump’s desk for his signature.

Facilitating trade and lowering barriers for good and services to move across borders is key to SEMI’s mission to support its members. The semiconductor industry has catalyzed growth across the global economy – growth that relies heavily on trade.

“America has also finally turned the page on decades of unfair trade deals that sacrificed our prosperity and shipped away our companies, our jobs, and our nation’s wealth,” Trump noted last Tuesday. “The era of economic surrender is over. From now on, we expect trading relationships to be fair and to be reciprocal. We will work to fix bad trade deals and negotiate new ones.”

Unfortunately, trade has been turned into a hot-button political issue, raising many new trade challenges to companies throughout the semiconductor industry. The Trump Administration has levied intense criticism of China, launched a number of trade investigations citing foreign overproduction, and has threatened to withdraw from the Korea-U.S. Free Trade Agreement (KORUS). The United States has also levied tariffs on a number of products, including solar cells. This is all on top of the North American Free Trade Agreement (NAFTA) modernization talks, which have seen slow and shallow progress.

While the United States “reexamines” and stands still, other countries are filling the leadership void. China, Canada, Korea, and the European Union, among others, are negotiating or have concluded trade deals in the last year. Indeed, the updated Trans-Pacific Partnership, which now excludes the US but covers many of the fastest-growing Asian markets, is on track to be enacted by the end of the year. SEMI will continue to work on behalf of its members around the globe to open up new markets and lessen the burden of regulations on cross-border trade and commerce.

Additionally, although President Trump devoted much his address to immigration, he overlooked the opportunity to address the need for immigration reform for high-skilled workers.  This important aspect of the immigration debate, which also has major implications for economic growth, will fall to Congress to sort out in any immigration package it considers in the coming weeks.

Fortunately, Sen. Orrin Hatch (R-UT) recently reintroduced his Immigration Innovation Act, also known as “I-Squared,” which would implement a number of reforms to the H1-B visa and green card system for highly-skilled workers.  The bill would raise the cap for H1-B visas from the current 65,000 to allow for as many as 190,000 in good economic times, while also lifting the cap on greed card holders with STEM degrees from US institutions.  SEMI has long supported these efforts and will continue to work with policymakers to see reforms implemented to improve the system.

While partisanship in Washington remains high, SEMI continues to work on behalf of its members to advance crucial public policy matters for its members with policymakers in Washington, DC. In particular, SEMI focuses on how these issues impact the four 4T’s – Trade, Taxes, Technology and Talent. The path forward on many of these issues will be complicated by midterm election year politics, but the opportunity remains to see real positive changes enacted, even in such a challenging environment.

If you’d like more information on SEMI’s public policy work, or how you can be involved, please contact Jamie Girard at [email protected].

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced the global semiconductor industry posted sales totaling $412.2 billion in 2017, the industry’s highest-ever annual sales and an increase of 21.6 percent compared to the 2016 total. Global sales for the month of December 2017 reached $38.0 billion, an increase of 22.5 percent over the December 2016 total and 0.8 percent more than the previous month’s total. Fourth-quarter sales of $114.0 billion were 22.5 percent higher than the total from the fourth quarter of 2016 and 5.7 percent more than the third quarter of 2017. Global sales during the fourth quarter of 2017 and during December 2017 were the industry’s highest-ever quarterly and monthly sales, respectively. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

Worldwide semiconductor revenues, year-to-year percent change

Worldwide semiconductor revenues, year-to-year percent change

“As semiconductors have become more heavily embedded in an ever-increasing number of products – from cars to coffee makers – and nascent technologies like artificial intelligence, virtual reality, and the Internet of Things have emerged, global demand for semiconductors has increased, leading to landmark sales in 2017 and a bright outlook for the long term,” said John Neuffer, SIA president and CEO. “The global market experienced across-the-board growth in 2017, with double-digit sales increases in every regional market and nearly all major product categories. We expect the market to grow more modestly in 2018.”

Several semiconductor product segments stood out in 2017. Memory was the largest semiconductor category by sales with $124.0 billion in 2017, and the fastest growing, with sales increasing 61.5 percent. Within the memory category, sales of DRAM products increased 76.8 percent and sales of NAND flash products increased 47.5 percent. Logic ($102.2 billion) and micro-ICs ($63.9 billion) – a category that includes microprocessors – rounded out the top three product categories in terms of total sales. Other fast-growing product categories in 2017 included rectifiers (18.3 percent), diodes (16.4 percent), and sensors and actuators (16.2 percent). Even without sales of memory products, sales of all other products combined increased by nearly 10 percent in 2017.

Annual sales increased substantially across all regions: the Americas (35.0 percent), China (22.2 percent), Europe (17.1 percent), Asia Pacific/All Other (16.4 percent), and Japan (13.3 percent). The Americas market also led the way in growth for the month of December 2017, with sales up 41.4 percent year-to-year and 2.1 percent month-to-month. Next were Europe (20.2 percent/-1.6 percent), China (18.1 percent/1.0 percent), Asia Pacific/All Other (17.4 percent/0.2 percent), and Japan (14.0 percent/0.9 percent).

“A strong semiconductor industry is foundational to America’s economic strength, national security, and global technology leadership,” said Neuffer. “We urge Congress and the Trump Administration to enact polices in 2018 that promote U.S. innovation and allow American businesses to compete on a more level playing field with our counterparts overseas. We look forward to working with policymakers in the year ahead to further strengthen the semiconductor industry, the broader tech sector, and our economy.”

By Jay Chittooran, Manager, Public Policy, SEMI

International trade is one of the best tools to spur growth and create high-skill and high-paying jobs. Over 40 million American jobs rely on trade, and this is particularly true in the semiconductor supply chain. Over the past three decades, the semiconductor industry has averaged nearly double-digit growth rates in revenue and, by 2030, the semiconductor supply chain is forecast to reach $1 trillion. Trade paves the way for this growth.

Unfortunately, despite its importance to the industry, trade has been transformed from an economic issue into a political one, raising many new trade challenges to companies throughout the semiconductor industry.

GHz-ChinaChina’s investments in the industry will continue to anchor the country as a major force in the semiconductor supply chain. China’s outsized spending has spawned concern among other countries about the implications of these investments. According to SEMI’s World Fab Forecast, 20 fabs are being built in China – and construction on 14 more is rumored to begin in the near term – compared to the 10 fabs under construction in the rest of the world. China is clearly outpacing the pack.

The Trump Administration has levied intense criticism of China, citing unfair trade practices, especially related to intellectual property issues. The U.S. Trade Representative has launched a Section 301 investigation into whether China’s practice of forced technology transfer has discriminated against U.S. consumers. Even as the probe unfolds, expectations are growing that the United States will take action against China, raising fears of not only possible retaliation in time but rising animosity between two trading partners that rely deeply on each other.

A number of other open investigations also cloud the future. The Administration launched two separate Section 232 investigations into steel and aluminum industry practices by China, claiming Chinese overproduction of both items are a threat to national security. The findings from these investigations will be submitted to the President, who, in the coming weeks, will decide an appropriate response, which could include imposing tariffs and quotas.

Another high priority area is Korea. While U.S. threats to withdraw from the U.S.-Korea Free Trade Agreement (KORUS) reached a fever pitch in August, rhetoric has since tempered. Informal discussions between the countries on how best to amend the trade deal are ongoing. The number of KORUS implementation issues aside, continued engagement with Korea – instead of scrapping a comprehensive, bilateral trade deal – will be critically important for the industry.

Lastly, negotiations to modernize the North American Free Trade Agreement (NAFTA) will continue this year. The United States wants to conclude talks by the end of March, but with the deadline fast approaching and the promise of resolution waning, tensions are running high. Notably, the outcome of the NAFTA talks will inform and set the tone for other trade action.

What’s more, a number of other actions on trade will take place this year. As we wrote recently, Congress has moved to reform the Committee on Foreign Investment in the United States (CFIUS), a government body designed to review sales and transfer of ownership of U.S. companies to foreign entities. Efforts have also started to revise the export control regime – a key component to improving global market access and making international trade more equitable.

SEMI will continue its work on behalf of its members around the globe to open up new markets and lessen the burden of regulations on cross-border trade and commerce. In addition, SEMI will continue to educate policymakers on the critical importance of unobstructed trade in continuing to push the rapid advance of semiconductors and the emerging technologies they enable into the future. If you are interested in more information on trade, or how to be involved in SEMI’s public policy program, please contact Jay Chittooran, Manager, Public Policy, at [email protected].

Worldwide semiconductor revenue is forecast to total $451 billion in 2018, an increase of 7.5 percent from $419 billion in 2017, according to Gartner, Inc. This represents a near doubling of Gartner’s previous estimate of 4 percent growth for 2018.

“Favorable market conditions for memory sectors that gained momentum in the second half of 2016 prevailed through 2017 and look set to continue in 2018, providing a significant boost to semiconductor revenue,” said Ben Lee, principal research analyst at Gartner. “Gartner has increased the outlook for 2018 by $23.6 billion compared with the previous forecast, of which the memory market accounts for $19.5 billion. Price increases for both DRAM and NAND flash memory are raising the outlook for the overall semiconductor market.”

However, these price increases will put pressure on margins for system vendors of key semiconductor demand drivers, including smartphones, PCs and servers. Gartner predicts that component shortages, a rising bill of materials (BOM) and the resulting prospect of having to raise average selling prices (ASPs) will create a volatile market through 2018.

Despite the upward revision for 2018, the quarterly growth profile for 2018 is expected to fall back to a more normal pattern with a mid-single-digit sequential decline in the first quarter of the year, followed by a recovery and buildup in both the second and third quarters of 2018, and a slight decline in the fourth quarter.

On January 3, a security vulnerability that spans all microprocessor vendors was revealed, impacting nearly all types of personal and data center computing devices. While this is an obscure security vulnerability that is difficult to achieve, the potential of a high-impact security issue cannot be ignored and must be mitigated.

“The current mitigation solution is via firmware and software updates, and has a potential processor performance impact. This may result in an increased demand for high-performance data center processors in the short term, but Gartner expects that in the longer term, microprocessor architectures will be redesigned, reducing the performance impact of the software mitigations and limiting the long-term forecast impact,” said Alan Priestley, research director at Gartner.

Taking the memory sectors out of the equation, the semiconductor market is forecast to grow 4.6 percent in 2018 (compared with 9.4 percent in 2017) with field-programmable gate array (FPGA), optoelectronics, application-specific integrated circuits (ASICs) and nonoptical sensors leading the semiconductor device categories.

The other significant device category driving the 2018 forecast higher is application-specific standard products (ASSPs). The predicted growth in ASSPs was influenced by an improved outlook for graphics cards used in gaming PCs and high-performance computing applications, a broad increase in automotive content and a stronger wired communications forecast.

The mixed fortunes of semiconductor vendors in recent years serves as a reminder of the fickleness of the memory market,” said Mr. Lee. “After growing by 22.2 percent in 2017, worldwide semiconductor revenue will revert back to single-figure growth in 2018 before a correction in the memory market results in revenue declining slightly in 2019.”

By Dan Tracy and Ji-Won Cho, SEMI

2017 proved to be record-setting year for the semiconductor industry. According to World Semiconductor Trade Statistics (WSTS), worldwide semiconductor market will have grown 20 percent, exceeding $400 billion for the first time. Among all major product segments, memory is the strongest, with sales are on track to grow 60 percent year-over-year, contributing to 30 percent of worldwide semiconductor sales in 2017. The consensus is that the growth momentum in memory will continue in 2018, driven by stable market demand and a favorable pricing environment.

Korean memory makers are the biggest beneficiaries of this memory super cycle. According to the Korea International Trade Association (KITA), the memory export value from Korea grew 86 percent through November 2017 compared to a year earlier, indicating that Korean memory makers are gaining more market share. On the supply side of the market, both Samsung and SK Hynix saw record high capital expenditures in 2017, contributing to the revenue surge from Korean suppliers. The spending spree is expected to continue in 2018. Together, Samsung and SK Hynix are forecast to invest over $20 billion in fab tools worldwide in 2018. (Track fab projects in detail with the SEMI World Fab Forecast or SEMI FabView databases).

WFF-Dec2017-chart

Samsung’s anchor project in 2018 is the ramp of its new Fab P1 phase 2 line in Pyeongtaek. Samsung plans to add new 3D NAND as well as DRAM capacity at this fab, fortifying its leading position in memory market. Beyond 2018, Samsung’s Xian phase 2 plan is also underway for future expansion.

SK Hynix, on the other hand, will ramp up M14 fab in 2018, adding new capacity for both 3D NAND and DRAM. In the meantime, SK Hynix is building a new fab, M15, in Cheongju, Korea, for 3D NAND and Fab C3 in Wuxi, China, for DRAM.

Both of these leading memory makers plan to ride this memory cycle and intend to vault ahead of the competition. Future demand for 3D NAND will continue to be the strongest, driving new fab projects in Korea now and later in China. Nevertheless, DRAM supply will also see new capacity coming online this year, followed by rare new fab projects. Memory not only accounts for a major portion of worldwide semiconductor sales but will also propel the investment momentum in the coming years.

SEMICON Korea 2018

The strong memory growth sets the stage for SEMICON Korea, January 31 through February 2 in Seoul. The largest microelectronics event in Korea, with over 40,000 attendees expected, SEMICON Korea will focus on enabling participants to “Connect, Collaborate, and Innovate.”

Key SEMICON Korea highlights include:

  • The 1,919 booths are sold out as major equipment, materials, and subsystem/parts companies exhibit their new products and technology solutions at the show.
  • Industry giants including Samsung, Micron, Intel, Toshiba, Sony, SK Hynix and LAM Research will connect with Korean equipment, materials and subsystems/parts manufacturers through the Supplier Search Program.
  • Participation by engineers is expected to be strong this year, after more than 10,000 engineers from​ Samsung Electronics, SK Hynix and DB Hitek attended SEMICON Korea 2017.

Major SEMICON Korea programs, including the following, will provide key insights into the Korea electronics manufacturing ecosystem:

  • Smart Automotive Forum
  • Smart Manufacturing Forum
  • Test Forum
  • SEMI Technology Symposium
  • Market Seminar

For a complete schedule of programs, visit www.semiconkorea.org/en/agenda-glance.