Tag Archives: Advanced Packaging

March 7, 2012 — Semiconductor fab equipment supplier Applied Materials Inc. (AMAT) opened the new Centre of Excellence in Advanced Packaging at Singapore’s Science Park II with its partner in the endeavor, the Institute of Microelectronics (IME), a research institute under Singapore’s Agency for Science, Technology and Research (A*STAR). Singapore’s Minister for Trade and Industry, Lim Hng Kiang, presided at the official opening ceremony.

Plans for the Centre were first announced in April 2011.

The Centre of Excellence in Advanced Packaging will focus on wafer-level and 3D packaging technologies, with a 14,000 square foot Class-10 cleanroom housing 300mm wafer processing equipment. It was created with combined investment of over USD100 million from Applied Materials and IME.

Applied Materials will provide the leading-edge equipment and process technology to be used by IME

March 6, 2012 — DfR Solutions, quality, reliability, and durability (QRD) services provider for the electronics industry, installed micro bond and die testing tools from XYZTEC at its College Park, MD headquarters. The Condor Series tools will perform JEDEC JESD22 qualification, dynamic bend testing of small structures, copper wire bond pull and shear testing, and material characterization of lead-free solders.

DfR Solutions selected XYZTECH for package testing after an extensive survey of existing micro testing technologies. The Condor bond testers (systems pictured above and at bottom) perform high-speed shear testing and micro cyclic bend testing. The series offers a range of tools and loadings for precise characterization. A tester can evaluate pull strength on fine-pitch bond wires in multi-stack architectures and high-power die shear strength without changing equipment.

XYZTEC is looking to future expansions at DfR Solutions’ European and Asian facilities to grow the equipment partnership, said Bas van Tilborg, managing director of XYZTEC.

DfR Solutions provides quality, reliability, and durability (QRD) research and consulting for the electronics industry. For more information regarding DfR Solutions, visit www.dfrsolutions.com.

XYZTEC designs and manufactures quality assurance equipment for multiple industries, with a focus on bond testing. For more information about XYZTEC Inc., visit www.XYZTEC.com.

Subscribe to Solid State Technology/Advanced Packaging

Follow Advanced Packaging on Twitter.com by clicking www.twitter.com/advpackaging. Or join our Facebook group

March 6, 2012 — Semiconductor test and advanced packaging service provider STATS ChipPAC Ltd. (SGX-ST:STATSChP) uncrated its next-generation 3D embedded wafer-level ball grid array (eWLB) package-on-package (PoP) technology, with a package profile height below 1.0mm.

The PoP format aims for higher thermal and electrical performance, increased bandwidth and speed in an ultra thin package profile, with design flexibility in integrating memory and logic semiconductors. Industry standard is 1.4mm total stacked package height, 30% more than STATS ChipPAC’s new 3D eWLB. STATS uses fan-out wafer level packaging (FOWLP) to reduce the bottom PoP package height below 0.5mm. The technology also offers tighter substrate line/space capability. eWLB PoP is available in single or double-sided configurations.

STATS ChipPAC also offers a co-design process with packaging customers to optimize the functional performance of the ultra thin 3D package. The 3D PoP form factor targets advanced mobile applications: smartphones, media tablets, cloud computing, etc. Microprocessors are adopting the technology. Computing-sector customers are also using eWLB to reduce substrate complexity and cost.

Over 200 million eWLB units are in the market, with package architectures including small die, large die, multi-die and multi-layer designs.

STATS ChipPAC will present on innovative 3D packaging, covering eWLB, low-cost copper (Cu) column flip chip PoP technology, and stacked die integration of RF packages at the IMAPS International Conference and Exhibition on Device Packaging this week in Scottsdale, AZ.

STATS ChipPAC Ltd. provides semiconductor packaging design, assembly, test and distribution services. STATS ChipPAC is listed on the SGX-ST. Further information is available at www.statschippac.com.

Subscribe to Solid State Technology/Advanced Packaging

Follow Advanced Packaging on Twitter.com by clicking www.twitter.com/advpackaging. Or join our Facebook group

March 6, 2012 – PRNewswire — Flip chip bumping and wafer-level packaging (WLP) supplier FlipChip International (FCI) signed a set of license, sales, and marketing agreements with NANIUM S.A., semiconductor manufacturing, test and engineering services provider, for 300mm flip chip bumping and WLP.

The partnership revolves around NANIUM’s 300mm WLP services and FCI turnkey bump services for 150mm and 200mm wafers. NANIUM will license the FCI Spheron plated copper (Cu) redistribution technology, adding fan-in wafer-level packaging (FIWLP) and wafer-level chipscale packaging (WLCSP) technologies to its portfolio of fan-out WLP (FOWLP). "Together, FCI and NANIUM offer a complete WLP service portfolio covering 150, 200 and 300mm wafer sizes," summarized Armando Tavares, NANIUM president of Executive Board.

NANIUM signed a similar technology agreement with Tessera Inc. in 2010.

The companies have an eye on next-generation packaging needs for high-performance/small form factor semiconductors in smartphones, medical devices, tablets, automotive ICs, graphics processors, microprocessors, and wireless 3G/4G integrated products. WLP and flip chips are gaining "global strategic importance," said Bob Forcier, FCI president and CEO.

NANIUM provides package and system design, development, manufacturing, testing and engineering services in the semiconductor business, operating mainly in WLP. NANIUM also offers packaging based on laminated organic substrates and metal leadframes. Website: www.nanium.com.

FCI provides products and services for the wafer bumping and wafer level packaging market. FCI is a subsidiary of RoseStreet Labs LLC, a supplier of products and services for the semiconductor, renewable energy and life science markets. Website: www.flipchip.com.

Subscribe to Solid State Technology/Advanced Packaging

Follow Advanced Packaging on Twitter.com by clicking www.twitter.com/advpackaging. Or join our Facebook group

March 5, 2012 — Plessey Semiconductors developed the Electric Potential Integrated Circuit (EPIC) sensor, optimized for use as an ECG sensor, at a reportedly lower cost and better resolution than conventional electrodes. It enables ECG monitoring in mobile phone applications.

"EPIC is a completely new kind of sensor that detects changes in electric field potential," explained Barry Dennington, Plessey’s COO.

The product was developed as part of the Precision Passive Component Design and Manufacture in Micro Module Electronics project (PPM2), co-funded by the Technology Strategy Board. The Precision Passive Component Design and Manufacture in Micro Module Electronics project encouraged the integration of precision passive components into advanced packaging schemes, improving performance.

The Nanotechnology Knowledge Transfer Network (NanoKTN), a UK knowledge-based network for Micro and Nanotechnologies, announced details of the product, developed by UK-based semiconductor manufacturer Plessey, and supports promotion to potential end-users and partners, along with JEMI UK.

Plessey Semiconductors and JEMI UK organized a technical visit to its facilities in Plymouth to disseminate outcomes from the PPM2 project and to launch the EPIC sensor. Delegates discussed opportunities for the UK supply chain and IC manufactures to utilize these techniques in their own devices.

The NanoKTN played a key role in disseminating results from the PPM2 project and encouraged a number of potential end-users for Plessey’s products developed through the program, to attend the event and hear more about the potential benefits. By disseminating the outcomes to key audiences via the NanoKTN’s website and the NanoKTN’s extensive database of contacts, key target audiences were brought together in a personal setting to network and develop business relationships.

"Building relationships and contacts within relevant industries is vital to companies in the early stages of commercial development, enabling them to build connections and to raise their profile nationally and overseas. We hope that by helping to disseminate outcomes from this project, that UK businesses will come together and look at ways of using the intelligence gathered throughout the programme," explained Dr Alec Reader, Director at the NanoKTN.

The NanoKTN’s primary aim is to encourage collaboration and knowledge transfer between key players in industry, as well as start-ups and small/medium enterprises (SMEs). The NanoKTN is dedicated to helping its members understand how to write a successful proposal and identify suitable partnerships for collaborative work. The NanoKTN facilitates the transfer of knowledge and experience between industry and research, offering companies dealing in small-scale technology access to information on new processes, patents and funding as well as keeping up-to-date with industry regulation. The four broad areas that the NanoKTN focuses on are: Promoting and facilitating knowledge exchange, supporting the growth of UK capabilities, raising awareness of Nanotechnology, and providing thought leadership and input to UK policy and strategy. Established by the Technology Strategy Board, the NanoKTN is managed by Centre for Process Innovation Ltd, a leading technology development and consulting company. Further information about the NanoKTN can be found at www.nanoktn.com.

JEMI UK is the Joint Equipment and Materials Initiative; a non-profit organization, representing more than 55 companies and part of a network of organizations throughout Europe. JEMI UK was founded to promote the development of a strong infrastructure to support the growth of companies in the Semiconductor supplier industry, while ensuring that the interests of manufacturers and suppliers within the industry are properly represented.

Plessey Semiconductors develops and manufactures semiconductor products used in sensing, measurement and controls applications.

The Technology Strategy Board is a business-led government body that works to create economic growth by ensuring that the UK is a global leader in innovation. Sponsored by the Department for Business, Innovation and Skills (BIS), the Technology Strategy Board brings together business, research and the public sector. For more information, please visit www.innovateuk.org.

KTNs have been set up by government, industry and academia to facilitate the transfer of knowledge and experience between industry and the science base. The first KTNs were set up in 2005; they are active in sectors, technologies and market-based areas and they interact strongly with the government’s Technology Programme and overall technology strategy.

The Centre for Process Innovation (CPI) is a UK based technology innovation centre and part of the government’s High Value Manufacturing Catapult. CPI offers market and technology expertise along with cutting-edge development assets to help its public and private sector clients build and prototype the next generation of products, processes and services quickly and efficiently, and with minimal risk.

March 2, 2012 — Test equipment supplier Multitest launched a new Quad Tech contactor, the Triton contactor, for high-end digital test applications such as server, computer, mobile smartphone, digital TV, and graphics chips.

The Triton contactor is designed for these large-array, highly integrated semiconductor packages with high I/O count and many high-speed differential I/Os. It eliminates contactor bowing, limited compliance and test handler force limitations by offering an enhanced compliance window to accommodate stack height variations, an optimized force to support large BGAs and LGAs and multisite package test. It uses up to 20GHz differential bandwidth.

The Triton was successfully evaluated at high-volume production. Multitest has received several re-orders for the contactors.

Multitest is a designer and manufacturer of final test handlers, contactors and load boards used by integrated device manufacturers (IDMs) and final test subcontractors. For more information about Multitest’s Triton contactors, visit www.multitest.com/Triton.

Subscribe to Solid State Technology/Advanced Packaging

March 2, 2012 — Chemicals supplier WACKER expanded and relocated its South Korea technical laboratories and offices, bringing together R&D operations, applications technology, and basic and advanced training in silicones and polymers applications.

The 3,600 m

March 1, 2012 – Marketwire — Docea Power, power and thermal analysis software supplier, released AceThermalModeler (ATM) for generating compact thermal models of system on chips (SoCs), 3D ICs, systems in package (SiP) devices, and complete boards.

Compact thermal models enable early system floorplan exploration or partitioning, new system packaging and integration architectures, and early exploration of power management policies to reduce peak temperatures and manage temperature gradients across the system.

The ATM tool can be used by thermal experts to create RC compact thermal models quickly, then handed off to the system architecture team to estimate various corner use cases, floorplans, architecture options for multi-core designs, operating points or power management policies impact on temperature across the system.

Enabling early dynamic or steady state estimations of thermal distributions for the most power hungry use cases allows system architects to optimize systems and architectures and avoid loss of revenue due to thermal issues found late in the project.

Docea Power’s Aceplorer simulator considers the relationship between power and temperature. The next tool in the flow is ATM, to perform both thermal steady state or coupled power and thermal analysis for dynamic application profiles running on different architecture configurations.

ATM will be demonstrated at the Design, Automation & Test (DATE) conference in Dresden, Germany, March 12 to 16, 2012.

Docea Power develops and commercializes power and thermal modeling tools for system-level architectues. Learn more at www.doceapower.com.

Subscribe to Solid State Technology/Advanced Packaging

Follow Advanced Packaging on Twitter.com by clicking www.twitter.com/advpackaging. Or join our Facebook group