July 5, 2012 — Xilinx Inc. (NASDAQ:XLNX) will invest $50 million to expand its electronics engineering operations, located at the company
Tag Archives: Advanced Packaging
July 4, 2012 — EV Group (EVG), wafer bonding and lithography equipment supplier, introduced the EVG 850TB/DB automated temporary bonding and debonding system built on the company’s new XT Frame platform, which has been optimized to support thin-wafer processing for high-volume 3D IC and through silicon via (TSV) manufacturing.
"Temporary bonding and debonding of device wafers to wafer carriers for thin-wafer processing are critical steps to enabling the successful integration and implementation of 3D ICs into high-volume production," stated Dr. Thorsten Matthias, Business Development Director, EV Group.
A combination of hardware and software design enhancements enables double the processing throughput over EVG’s previous-generation platform, to up to 40 stacks per hour. The EVG850TB/DB accommodates up to 9 process modules, doubling the previous maximum processing capability of EVG’s temporary bonding and debonding systems. The new XT Frame-configured EVG850TB/DB is designed for EV Group’s open materials platform approach, which enables the use of a wide range of adhesives from various materials suppliers, including ZoneBOND.
The new XT Frame design enables highly efficient continuous mode operation (zero idle time) capability via an ultra-fast handling system, up to four front opening unified pod (FOUP) load ports, and a material buffer in the form of a local FOUP storage system that holds up to 10 additional FOUPs. The platform also features an in-line metrology module option to enable real-time monitoring of the bonding/debonding process-enabling maximum yields and helping to lower production costs for thin-wafer processing.
EV Group (EVG) is a world leader in wafer-processing solutions for semiconductor, MEMS and nanotechnology applications. More information is available at www.EVGroup.com.
July 3, 2012 – BUSINESS WIRE — Electro Scientific Industries Inc. (ESI, NASDAQ:ESIO), which makes laser-based tools for microelectronics manufacturing, received multiple-unit orders for its model 3510 test system from leading Japanese and Korean electronic components manufacturers.
The customers are expanding production of small-geometry multi-layer ceramic capacitors (MLCCs), which are integrated into smartphones by the hundreds. The devices are small form factor (size 0603 and 0402) with metalized terminals.
The ESI 3510 performs electrical testing with a rotary technology that supports multiple tests simultaneously. The system offers high-throughput small device handling with reliable sorting capability. It can test and sort up to 840,000 MLCC chips per hour. Precision-controlled dynamic contact force eliminates marking on the MLCC
July 2, 2012 — Seiko Epson Corporation (TSE: 6724) launched the NX1032XS pick-and-place IC test handler, boasting high throughput for transferring, inspecting, and sorting semiconductors in downstream processes.
The IC test handler transfers finished semiconductors to inspection equipment for electrical, visual and other final performance tests, then sorts them by good/defective or other parameters. It transfers, inspects, and sorts up to 20,000 ICs per hour.
With the ability to transfer 32 semiconductors to inspection equipment at a time, this new model offers twice the capacity of Epson’s previous top model, the NS-8160W. Epson also uses its original Smart Motion Control robot control technology to enable fast movement while maintaining low vibration when transferring semiconductors. In addition, the plate can be heated to enable testing at extreme temperatures of up to 155
July 2, 2012 – BUSINESS WIRE — Tessera Technologies Inc. (NASDAQ:TSRA) has received notice from Powertech Technology Inc. (PTI) that it will terminate its license agreement with the semiconductor packaging and optics technology company. Tessera also completed phase 1 of its acquisition of camera module technologies from Flextronics.
Tessera Inc., a wholly-owned subsidiary of Tessera Technologies Inc., received a letter from Powertech Technology Inc. (PTI) that purports to terminate its license agreement with Tessera Inc. PTI stated that on July 30, 2012, it will make a payment to Tessera Inc. in protest under the license agreement for the quarter ended June 30, 2012.
PTI filed a complaint against Tessera, Inc. in December of 2011, seeking a declaratory judgment that PTI had the right to terminate its license agreement due to a breach of contract by Tessera, Inc.
June 29, 2012 — Semiconductor assembly and test services (SATS) provider UNISEM (M) BERHAD (183314-V) relaunched its business model with the name
June 29, 2012 – BUSINESS WIRE — Semiconductor fab tool supplier Ultratech Inc. (Nasdaq:UTEK) acquired the rights to a collection of patents from semiconductor leader IBM. Ultratech gained semiconductor packaging technologies including C4 bumping, ball grid array (BGA) methods, lead-free solders, and 3D packaging IP.
Representing both U.S. and foreign patents, the portfolio includes claims directed at methods of making, at compositions and at structures of semiconductor devices. This acquisition strengthens and broadens Ultratech’s offerings to facilitate advanced packaging at the lower device nodes.
Ultratech, Inc. (Nasdaq: UTEK) designs, manufactures and markets photolithography and laser processing equipment. Visit Ultratech online at: www.ultratech.com.
IBM makes semiconductors and other microelectronics. For more information on IBM, please visit:www.ibm.com
June 26, 2012 — Solid State Technology is hosting 3D and 2.5D Integration: A Status Report, airing live tomorrow at noon EST/9AM PST. The webcast is sponsored by EV Group (EVG) and ALLVIA, and is free for all attendees. This preview shares a sneak peek at
June 26, 2012 — Solid State Technology is hosting a free webcast, 3D and 2.5D Integration: A Status Report, airing live tomorrow at noon EST/9AM PST. A fourth presenter has just been announced, Brent Przybus, Senior Director, Product Line Marketing, Xilinx Inc.
3D and 2.5D Integration: A Status Report will cover through-silicon via (TSV) formation, interposers, and other die stacking methods. What is the present status of these advanced packaging technologies?
Przybus will present
June 25, 2012 – BUSINESS WIRE — Materials supplier Dow Corning will collaborate with semiconductor processing tool supplier SUSS MicroTec on a temporary bonding process (materials and equipment) for through-silicon vias (TSV) in high-volume advanced semiconductor packaging.
Comprised of both an adhesive and release layer, the Dow Corning silicon-based material is optimized for simple processing with a bi-layer spin coating and bonding process. Combined with SUSS MicroTec equipment, the total solution offers the benefits of simple bonding using standard manufacturing methods and provides compatibility with thermal and chemical requirements for via-middle and interposer TSV processing, as well as faster room-temperature de-bonding required for advanced packaging applications.
Also read: Imec’s via-middle TSV fab ‘reveals’
Dow Corning provides performance-enhancing silicones and silicon-based technology and innovation. Dow Corning is equally owned by The Dow Chemical Company and Corning, Incorporated. Learn more at dowcorning.com.
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