Sensor Fusion and the Role of MEMS in IoT

Date: Thursday May 28, 2015 at 1:00 p.m. EST

Free to attend

Length: Approximately one hour

MEMS have quite different process and material requirements compared to mainstream microprocessor and memory types of devices. This webcast will explore the latest trends in MEMS devices – including sensor fusion and the important role that MEMS will play in the Internet of Things (IoT). Marcellino Gemelli, Head of Business Development at Bosch Sensortec will discuss how smart systems are enabled through sensor fusion. Karen Lightman, Executive Director of MEMS Industry Group (MIG), will provide a “debrief” from the recent MEMS Technical Congress and a preview of a SEMICON West workshop focused on back-end challenges.

Speakers: 

Marcellino Gemelli, Head of Business Development, Bosch Sensortec

Marcellino Gemelli received the ‘Laurea’ degree in Electronic Engineering at the University of Pavia, Italy in 1994, while in the Italian Army and an MBA from MIP, the Milano (Italy) Polytechnic business school. He is currently based in Palo Alto (CA) and is responsible for business development of Bosch Sensortec’s MEMS product portfolio and Bosch’s IoT wireless sensor network initiative. He previously held various engineering and product management positions at STMicroelectronics from 1995 to 2011 in the fields of MEMS, electronic design automation and data storage. He was also a contract professor for the Microelectronics course at the Milano (Italy) Polytechnic from 2000 to 2002.

Tony Massimini, Chief of Technology at Semico Research Corporation

Tony has been analyzing the market for microprocessors (MPUs) and microcontrollers (MCUs) in both the computing and embedded control markets.  He is also an expert for Micro-Electrical Mechanical Systems (MEMS). Tony analyzes the MEMS market covering such topics as Sensor Fusion, smart phones, medical applications, oscillators, energy harvesting, electronic standards and the Internet of Things.  Tony is instrumental in coordinating the development of Semico’s Bill of Materials for Semico’s online MAP Model analysis tool.

Karen Lightman, Executive Director, MEMS Industry Group (MIG)

Karen played a pivotal role in launching MIG in January 2001. Karen is active on the worldwide MEMS conference circuit as a keynote speaker and panelist promoting MIG’s role as the leading trade association advancing MEMS and sensors across global markets. Karen manages the operations of MIG; spearheads strategic growth; and oversees sales, public relations, marketing and outreach. Karen plays a critical role in creating the content for all MIG and MIG-partner conferences, events and programming. She is instrumental in establishing and maintaining partnerships with other international organizations to advance the MEMS industry. Karen has a BA from the University of Vermont (UVM) and a MS in Public Policy from Carnegie Mellon University. Karen and her family reside in Pittsburgh, PA.

Sponsored by Air Products 

Air Products has been a leading global supplier of high-purity gases, chemicals, and delivery systems to the electronics industry for over 40 years. We serve all major segments of the industry with a unique combination of offerings, experience, and commitment.  We’re advancing materials science. We’re advancing semiconductors. We’re advancing mobility. What can we help you advance?  www.airproducts.com/advancing

Trends in Materials: The Smartphone Driver

Date: Thursday, April 30, 2015 at 1:00 p.m. EST

Free to attend

Length: Approximately one hour

Today the semiconductor industry is driven by smartphone with 1.24B units sold in 2014 out numbering tablets & PC sales.  The expected increase in smartphone application processor (AP) demand in 2015 (Apple A9, Samsung Exynos 7 and Qualcomm Snapdragon) is driving the rapid ramp to 14/16nm 3-D FinFET at foundries, 3-D memory devices such as 128Gb Flash with 32-layers and 3-D stacked chips for package area saving.  Intel was first to production with 3-D bulk-FinFET devices at the 22nm technology node in 2012 and reported their SOC for Chinese low-end smartphones.  Intel’s 2^nd generation bulk-FinFET devices at 14nm node was introduced in Aug 2014 and their SOC to follow.  Apple uses Sony’s 8M pixel 3-D stacked backside CMOS image sensor for rear-facing cell phone camera and Samsung offers two versions of the 128Gb Flash memory either 16nm 2-D NAND or 32nm 3-D NAND with 32-layers.  Samsung Galaxy S6 will also use 3-D ePoP (embedded package on package) which stacks AP+DRAM+Flash+MMC saving 40% area and use 20M pixel rear-facing cell phone camera and 8M pixel RWB image sensor for front-facing camera.

To understand 3-D FinFET doping and high mobility channel material, this talk will first review the current doping and Fin/channel mobility enhancement techniques used for 22nm FinFET production by Intel for both high performance logic and SOC devices and the changes they made for their 2^nd generation 14nm FinFET.  Apple A6 and A7 used Samsung/Foundry’s 32nm and 28nm technology while the A8 uses TSMC’s 20nm technology.  Later this year, Apple will introduce the A9 which will switch from 2-D planar to 3-D FinFET using both Samsung’s 14nm FinFET and TSMC’s 16nm FF+ technologies. Then at the 10nm or 7nm node higher mobility Fin/channel material (SiGe, Ge or III-V) is expected to be introduced and currently exploratory research of gate-all-around nanowire for 5nm technology node.  Traditional gas/vapor phase epitaxial growth techniques by chemical vapor deposition (CVD) or an alternative liquid phase epitaxial (LPE) regrowth of an amorphous material layer by melt solidification for direct channel mobility enhancement are under investigation.  Finally, a discussion on dopant activation in high mobility material.

PDF of the presentation materials are available here.

Speakers:

John O. Borland, President, JOB Technologies

John Ogawa Borland received his B.S. and M.S. degrees in Material Science and Engineering from the Massachusetts Institute of Technology (MIT) in Cambridge, MA. He completed his BS thesis research on InP Liquid Phase Epitaxial (LPE) crystal growth at Hughes Malibu Research Labs in 1980 and his MS thesis research on InP Molecular Beam Epitaxial (MBE) crystal growth at Nippon Telephone and Telegraph (NTT) Labs in Musashino, Tokyo, Japan in 1981. He is a senior member of IEEE and the IEEE Hawaii section chair, a member of the Electrochemical Society (ECS) and Materials Research Society. He is co-organizer for the Symposium on ULSI Process Integration IV (2005) and was on the organizing committee for the 2001 & 2003 symposiums, Semiconductor Silicon (1994 & 1998) and Chemical Vapor Deposition X, XI & XII (1987, 1989, & 1991). He also is advisory committee co-chair for the IEEE International Workshop on Junction Technology (2008, 2010, 2011, 2012, 2013 and 2014). He has published over 135 technical and invited papers around the world and has been awarded 6 patents all in the areas of advanced semiconductor device manufacturing techniques. He is also on the Editorial Advisory Board of Solid State Technology magazine.

John was Director of Operations of APIC’s subsidiary Advanced Integrated Photonics which is their Silicon Photonics Foundry Fab in Honolulu, Hawaii from April 2013 to Aug 2014. In June 2003 he founded and is president of JOB Technologies a strategic marketing, sales and technology consulting company providing service to the semiconductor device manufacturing and equipment companies in the area of 14nm down to 7nm node front end of line process development focusing on Ge high mobility material and technology for CMOS.

From July 1998 to May 2003 he was Director of Advanced Business Development at Varian Semiconductor Equipment Associates. While at VSEA, he invented the high tilt high current PoGI process for process simplification and improved device lateral channel and source drain engineering. He also led the revived interest in low temperature diffusion-less activation by solid phase epitaxy (SPE) and its inclusion in the 2003 ITRS roadmap. From Nov. 1992 to July 1998 he was Vice President of Strategic Technology at Genus before they were acquired by Varian and invented the MeV BILLI structure for CMOS epi replacement, process simplification and improved latch-up performance. From Sept. 1983 to Nov. 1992 he was at Applied Materials and pioneering advanced silicon epitaxial and polysilicon/amorphous deposition techniques and equipment designs for blanket epi and polysilicon. He also patented some of his work on selective epi (SEG) and selective poly through surface interface cleaning techniques. This led to the successful implementation of SEG for local strap and elevated source drain by a major DRAM manufacturing company in 1987. Also, a variation to his epitaxial lateral overgrowth (ELO) for SOI is used today for epitaxial bonded SOI wafer manufacturing. From Aug. 1981 to Sept. 1983 he was at National Semiconductor Corp. developing the VHSIC-CMOS front end processing including bulk and epi wafer intrinsic gettering for improved gate oxide integrity and yield as well as substrate and CMOS well engineering for improved latch-up immunity.

Sponsored by Air Products

Air Products has been a leading global supplier of high-purity gases, chemicals, and delivery systems to the electronics industry for over 40 years. We serve all major segments of the industry with a unique combination of offerings, experience, and commitment.  We’re advancing materials science. We’re advancing semiconductors. We’re advancing mobility. What can we help you advance?  www.airproducts.com/advancing

3D Integration

Date: Thursday, April 23, 2015 at 12:00 p.m. EST

Free to attend

Length: Approximately one hour

It is well recognized that dimensional scaling has reached its diminishing return phase. The industry is now looking at monolithic 3D to be the future technology driver. Yet, until recently, the path to monolithic 3D has required the development of new transistor types and processes. This Webcast will present game-changing monolithic 3D process flows which use the existing transistor of existing manufacturing line and existing process flows. Now the most effective path for future IC scaling is indeed monolithic 3D, which offers the lowest development and manufacturing cost for future ICs.

PDF of Dr. Vinet’s presentation is available here.

PDF of Mr. Or-Bach’s presentation is available here.

Speakers:

Dr. Maud Vinet, Advanced CMOS Manager, CEA/Leti

Dr. Maud Vinet is in charge of the Advanced CMOS Laboratory at CEA Leti in Grenoble, France, a position she has held since 2013. The laboratory pursues conventional scaling through improved electrostatics and transport properties, and also studies alternative paths to conventional scaling either by stacking CMOS over CMOS in a monolithic 3D integration or by adding beyond CMOS devices (Tunnel FET, Single Electron Transistor, nano-mechanical switches) to CMOS to develop a hybrid logic with an optimized cost-energy efficiency trade-off. Maud Vinet has authored or co-authored more than 120 papers (conferences and journals) and owns 40 patents related to nanotechnology.

Zvi Or-Bach, President and CEO of MonolithIC 3D Inc.

Zvi Or-Bach is the founder President and CEO of MonolithIC 3D Inc. Or-Bach has more than 30 years of innovative development including the breakthroughs of monolithic 3D ICs and fast-turn ASICs. Prior to MonolithIC 3D, Or-Bach founded eASIC in 1999 and served as the company’s CEO for six years (eASIC is in process of IPO these days).

Earlier, Or-Bach founded Chip Express in 1989 (recently acquired by Gigoptix) and served as the company’s President and CEO for almost 10 years, bringing the company to $40M revenue. He holds over 150 issued patents, primarily in the field of 3D integrated circuits and semi-custom chip architectures. He is the Chairman of the Board for Zeno Semiconductors, Bioaxial and VisuMenu.

Sponsored by Nordson DAGE

Nordson DAGE is part of the Advanced Technology – Electronics Systems Group of Nordson Corporation (NASDAQ: NDSN) and manufactures and supports a complete range of Industry leading Test and Inspection equipment for the PCBA and Semiconductor industries.  The Nordson DAGE XM8000 Wafer Metrology Platform provides an automated, high-throughput X-ray metrology and defect review system for both optically hidden and visible features of TSVs, 2.5D and 3D IC packages, MEMS and wafer bumps and provides unprecedented, non-destructive, in-line wafer measurement of voiding and fill levels, overlay, critical dimensions. www.measuringtheinvisible.com