Tag Archives: letter-ap-tech

Leti, a research institute of CEA-Tech, and Silvaco Inc., a global provider of software, IP and services for designing chips and electronic systems for semiconductor companies, today announced during the IEDM 2018 conference a project to create innovative and unified SPICE compact models for the design of advanced circuits using nanowire and nanosheet technologies.

The new predictive and physical compact model under development, Leti-NSP, builds on Leti’s 15 years of model development, including the popular Leti-UTSOI model for FD-SOI technology. The Leti-NSP compact model uses a novel methodology for the calculation of the surface potential, including quantum confinement. The model is able to handle arbitrary cross-section shapes of stacked planar and vertical GAA MOSFETs (circular, square, rectangular). It provides an excellent tool for design exploration of nanowire and nanosheet device architectures.

This three-year collaboration will make the new device models available to designers through SmartSpiceTM, Silvaco’s high-performance parallel SPICE simulator for use by circuit designers. The corresponding model-parameters extraction flow will be implemented in Utmost IVTM, Silvaco’s database-driven environment for characterizing semiconductor devices, to ensure an accurate fit between simulated and measured device characteristics.

Accuracy of analysis at the nanometer scale is essential for co-optimization of silicon process technology and circuit performance. Besides accurate device characterization and simulation, a complete solution includes TCAD simulation, and 3D parasitic extraction. Silvaco’s partnership with leading research institutions for atomistic TCAD, and its proven in-house extraction solver technology, will provide the most accurate Design Technology Co-Optimization (DTCO) solution for nanometer technologies.

“Over two decades, CEA-Leti and Silvaco have collaborated on design-technology co-optimization, ranging from innovative TCAD simulation to the design of advanced nanoelectronics, and thus expanded and strengthened Silvaco’s suite of tools for designers,” said Emmanuel Sabonnadière, CEA-Leti CEO. “This project continues that partnership, andwhen these physics-based compact models are made available to designers worldwide, they will be able to evaluate the potential of advanced nanowire-based CMOS technologies under development at CEA-Leti.”

“DTCO, including circuit simulation, is fundamental to the development of electronic devices, and shrinking silicon geometries are placing an even greater premium on accuracy to capture and evaluate all the new physical effects in nanometer design,” said Eric Guichard, vice president of Silvaco’s TCAD Division. “Building on past successes of Leti and Silvaco’s collaboration, this project will provide circuit designers and technologists with powerful, advanced design flows that combine CEA-Leti’s physical, predictive, and easy-to-use models with Silvaco’s high-accuracy EDA tools.”

MIRPHAB, a European Commission project to create a pilot line to fabricate mid-infrared (MIR) sensors by 2020, is accepting proposals from companies that want to develop and prototype new MIR devices that operate in gas-and-liquid media.

The project produces MIR photonic devices via assembled and/or packaged devices for laser-based, analytical MIR sensors, and expert design for sensor components that are fabricated on the pilot line. The platform is organized so that development of novel sensors and sensing systems is based on MIR integrated optic components and modules already incorporated in MIRPHAB’s portfolio.

The aim of the MIRPHAB pilot line is to provide each customer with a unique chemical spectroscopic system by combining sources, photonic circuits and detectors in standard packaging.

“European industry requires more efficient control processes to gain greater productivity and operational efficiency, and this project will deliver the devices required to improve those processes,” said CEA-Leti’s Sergio Nicoletti, who is coordinating the project. “MIRPHAB also will develop new sensor technology that provides novel analytical tools for companies to help improve people’s overall quality of life via environmental monitoring (e.g to measure VOC), food quality control (e.g. food spoilage or  adulteration ) and fast clinical diagnoses (e.g. provide cancer cells images). These are some of the areas where MIR sensors will play an increasingly significant role.”

In addition to providing device-design services for customers, the MIRPHAB team will help them develop sound business cases and strong business plans to commercialize their new devices. Potential cost-and-performance breakthroughs will be shown for reliable MIR sensing products based on building blocks provided by MIRPHAB. MIRPHAB also will be a sustainable source of key components for new and highly competitive MIR sensors, and will support their successful market introduction, while strengthening the competitiveness of European industry.

Mid-infrared light interacts strongly with molecular vibrations as each molecule gives a unique absorption spectrum that provides a simple solution for sensing. The sensors’ reduced size and flexible design make them ideal candidates for integration into already existing equipment for in-line/on-line detection.

The MIRPHAB team will host a booth, #ZB24, at the Sensors USA event in Santa Clara, Calif., Nov. 14-15, 2018.

MIRPHAB is funded by the Photonics Public Private Partnership. The project brings together 18 leading European organizations and is coordinated by CEA-Leti. For more information visit the project’s website.

Micron Technology, Inc., (Nasdaq: MU) today announced that its GDDR6 memory, Micron’s fastest and most powerful graphics memory, will be the high-performance memory of choice supporting Achronix’s next-generation stand-alone FPGA products built on TSMC 7nm process technology. GDDR6 is optimized for a variety of demanding applications, including machine learning, that require multi-terabit memory bandwidth and will enable Achronix to offer FPGAs at less than half the cost of FPGAs with comparable memory solutions.

Achronix’s high-performance FPGAs, combined with GDDR6 memory, are the industry’s highest-bandwidth memory solution for accelerating machine learning workloads in data center and automotive applications.

This new joint solution addresses many of the inherent challenges in deep neural networks, including storing large data sets, weight parameters and activations in memory. The underlying hardware needs to store, process and rapidly move data between the processor and memory. In addition, it needs to be programmable to allow more efficient implementations for constantly changing machine learning algorithms. Achronix’s next-generation FPGAs have been optimized to process machine learning workloads and currently are the only FPGAs that offer support for GDDR6 memory.

“From GPUs and beyond, Micron delivers high-performance memory solutions that meet the needs of today’s most demanding applications, including artificial intelligence (AI) and machine learning — most recently demonstrated by achieving throughput of up to 16 Gb/s on our GDDR6 solutions,” said Andreas Schlapka, director of Micron’s networking segment. “In addition to offering increased performance, Micron has developed an ecosystem to support companies like Achronix whose FPGAs with GDDR6 will enable rapid creation of designs. This, in effect, translates into faster time to market for customers using this powerful new memory technology.”

Achronix’s next-generation FPGAs include up to eight hardened GDDR6 memory interfaces that provide customers the flexibility to choose from multiple memory configurations for their end application. Customers can use from one to eight GDDR6 memory devices, which can offer over 4 Tb/s memory bandwidth and from 8Gb to 128Gb density. This type of flexibility allows customers to optimize cost and power for their application, which is not currently possible with alternate high-bandwidth memory solutions like HBM2.

“With more than 14 years’ experience in developing high-performance FPGAs, Achronix is the first FPGA company to support GDDR6 memory and deliver multi-terabit memory bandwidth at the lowest cost for data center, blockchain, networking and automotive applications that require the highest-performance programmable platform,” said Manoj Roge, vice president of strategic planning and business development at Achronix Semiconductor Corporation. “Achronix is excited to work closely with Micron and other ecosystem partners to accelerate time to market for GDDR6-based solutions for our customers’ most demanding workloads and applications.”

Micron works closely with partners like Achronix to accelerate engineering efforts to build robust models and toolsets and deliver board layout validation. Through this ecosystem approach, Micron delivers high-bandwidth memory technology that provides a path for engineers to incorporate GDDR6 in designs and bring bandwidth-intensive applications to market.

EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that IHP – Innovations for High Performance Microelectronics (IHP), a German research institute for silicon-based systems, highest-frequency integrated circuits, and technologies for wireless and broadband communication, has purchased an EVG® ComBond® automated high-vacuum wafer bonding system for use in developing next-generation wireless and broadband communication devices.

The EVG ComBond features micron-level wafer-to-wafer alignment accuracy and room-temperature covalent bonding, which enables a wide variety of substrate and interconnect combinations for producing advanced engineered substrates, next-generation MEMS and power devices, stacked solar cells, and high-performance logic and “beyond CMOS” devices. The ability to conduct oxide-free aluminum-to-aluminum (Al-Al) direct bonding at low temperature is a unique capability of the EVG ComBond platform, and is among the new bonding applications that IHP will explore with the system.

The EVG ComBond® features micron-level wafer-to-wafer alignment accuracy and room-temperature covalent bonding, which enables a wide variety of substrate and interconnect combinations.

Covalent bonding enables wafer-level packaging and heterogeneous integration

Heterogeneous integration through wafer-level-packaging (WLP) — where multiple semiconductor components with different design nodes, sizes or materials are combined into a single package at the wafer level — is key to extending the semiconductor technology roadmap. Metal and hybrid wafer bonding are key process technologies for WLP and heterogeneous integration due to their ability to enable ultra-fine pitch interconnections between the stacked devices or components. The continuous drive to higher performance and functionality of these integrated systems requires constant reductions in the dimensions and pitch of the interconnects — which in turn drives the need for tighter wafer bond alignment accuracy.

In addition, for certain WLP applications, Al-Al direct bonding is a promising new method of metal-based bonding due to aluminum’s low cost coupled with its high thermal and electrical conductivities. However, conventional Al-Al thermo-compression bonding requires high temperatures and bond forces to provide reliable bonding interfaces — making it incompatible with heterogeneous integration efforts.

According to Paul Lindner, executive technology director at EV Group, “Combining different materials and device components into a single package has taken on greater importance in adding performance and value to electronic devices. The EVG ComBond facilitates the bonding of nearly ‘anything on anything’ in wafer form. This provides our customers with a powerful solution for researching new material combinations for future semiconductor devices. Its micron-level alignment capability also makes the EVG ComBond uniquely suited for use in high-volume manufacturing of emerging heterogeneous integration device designs.”

EVG’s breakthrough ComBond wafer activation technology and high-vacuum handling and processing allow the formation of covalent bonds at room or low temperature for fabricating engineered substrates and device structures. The EVG ComBond facilitates the bonding of heterogeneous materials with different lattice constants and coefficients of thermal expansion (CTE) as well as the formation of electrically conductive bond interfaces through a unique oxide-removal process. The EVG ComBond maintains a high-vacuum and oxide-free environment throughout the entire bonding process, enabling low-temperature bonding of metals, such as aluminum, that re-oxidize quickly in ambient environments. Void-free and particle-free bond interfaces and excellent bond strength can be achieved for all material combinations.

GLOBALFOUNDRIES and indie Semiconductor today announced the release of a new generation of customized microcontrollers on GF’s 55nm Low Power Extended (55LPx) automotive-qualified platform, which includes embedded non-volatile memory (SuperFlash®) technology. indie Semiconductor’s new Nigel products are based on ARM Cortex-M4 microcontroller cores, capable of supporting advanced functionalities in IoT, medical and automotive markets. indie Semi is already shipping products, manufactured on GF’s 55LPx process, to automotive customers in volume.

indie’s custom microcontrollers integrate in a single device mixed-signal functionality for sensing, processing, controlling and communicating. GF’s 55LPx platform, with SST’s SuperFlash® memory technology, enables the use of high-density memory and high-performance processing combined with mixed-signal functions in indie’s Nigel M4 controllers, delivering a highly integrated automotive solution at 55nm node.

“indie’s Nigel controller is designed to support high performance computing for automotive system architectures,” said Paul Hollingworth, executive vice president of sales and marketing at indie Semiconductor. “As automotive system requirements get more complex, our customers need solutions to perform complex processing while combining multiple functions into a single chip to minimize size and weight. We chose GF’s automotive-qualified 55LPx platform for its combination of density, performance and cost.”

“GF is pleased to be working with indie Semiconductor, a leader in state-of-the-art SoC technology,” said Rajesh Nair, vice president of mainstream offering management at GF. “indie Semiconductor joins our rapidly growing client base for GF’s 55LPx platform, which offers a combination of superior low-power logic, embedded non-volatile memory, extensive IP, and superior reliability for consumer, industrial and automotive grade 1 applications.”

The 55LPx RF-enabled platform provides a fast path-to-product solution that includes silicon-qualified RF IP and Silicon Storage Technology’s (SST) highly reliable embedded SuperFlash® memory. The platform is in volume production on GF’s 300mm line in Singapore. In addition to Nigel, indie Semiconductor is currently developing several products on the technology, many of which are for automotive applications.

Process design kits and an extensive offering of silicon proven IP are available now. For more information on GF’s mainstream CMOS solutions, contact your GF sales representative or go to globalfoundries.com.

By using an x-ray technique available at the National Synchrotron Light Source II (NSLS-II), scientists found that the metal-insulator transition in the correlated material magnetite is a two-step process. The researchers from the University of California Davis published their paper in the journal Physical Review Letters. NSLS-II, a U.S. Department of Energy (DOE) Office of Science user facility located at Brookhaven National Laboratory, has unique features that allow the technique to be applied with stability and control over long periods of time.

“Correlated materials have interesting electronic, magnetic, and structural properties, and we try to understand how those properties change when their temperature is changed or under the application of light pulses, or an electric field” said Roopali Kukreja, a UC Davis professor and the lead author of the paper. One such property is electrical conductivity, which determines whether a material is metallic or an insulator.

If a material is a good conductor of electricity, it is usually metallic, and if it is not, it is then known as an insulator. In the case of magnetite, temperature can change whether the material is a conductor or insulator. For the published study, the researchers’ goal was to see how the magnetite changed from insulator to metallic at the atomic level as it got hotter.

In any material, there is a specific arrangement of electrons within each of its billions of atoms. This ordering of electrons is important because it dictates a material’s properties, for example its conductivity. To understand the metal-insulator transition of magnetite, the researchers needed a way to watch how the arrangement of the electrons in the material changed with the alteration of temperature.

“This electronic arrangement is related to why we believe magnetite becomes an insulator,” said Kukreja. However, studying this arrangement and how it changes under different conditions required the scientists to be able to look at the magnetite at a super-tiny scale.

The technique, known as x-ray photon correlation spectroscopy (XPCS), available at NSLS-II’s Coherent Soft X-ray scattering (CSX) beamline, allowed the researchers to look at how the material changed at the nanoscale–on the order of billionths of a meter.

“CSX is designed for soft x-ray coherent scattering. This means that the beamline exploits our ultrabright, stable and coherent source of x-rays to analyze how the electron’s arrangement changes over time,” explained Andi Barbour, a CSX scientist who is a coauthor on the paper. “The excellent stability allows researchers to investigate tiny variations over hours so that the intrinsic electron behavior in materials can be revealed.”

However, this is not directly visible so XPCS uses a trick to reveal the information.

“The XPCS technique is a coherent scattering method capable of probing dynamics in a condensed matter system. A speckle pattern is generated when a coherent x-ray beam is scattered from a sample, as a fingerprint of its inhomogeneity in real space,” said Wen Hu, a scientist at CSX and co-author of the paper.

Scientists can then apply different conditions to their material and if the speckle pattern changes, it means the electron ordering in the sample is changing. “Essentially, XPCS measures how much time it takes for a speckle’s intensity to become very different from the average intensity, which is known as decorrelation,” said Claudio Mazzoli, the lead beamline scientist at the CSX beamline. “Considering many speckles at once, the ensemble decorrelation time is the signature of the dynamic timescale for a given sample condition.”

The technique revealed that the metal-insulator transition is not a one step process, as was previously thought, but actually happens in two steps.

“What we expected was that things would go faster and faster while warming up. What we saw was that things get faster and faster and then they slow down. So the fast phase is one step and the second step is the slowing down, and that needs to happen before the material becomes metallic,” said Kukreja. The scientists suspect that the slowing down occurs because, during the phase change, the metallic and insulating properties actually exist at the same time in the material.

“This study shows that these nanometer length scales are really important for these materials,” said Kukreja. “We can’t access this information and these experimental parameters anywhere else than at the CSX beamline of NSLS-II.”

MRSI Systems (Mycronic Group) announces new demonstration capability at its sister company, Shenzhen Axxon Automation (Mycronic Group) facility in the Longhua district, Shenzhen, China. MRSI will be offering local demonstrations of its market leading MRSI-HVM3 die bonder and also die bonding applications using customer’s sample materials, by arrangement.

This offers existing and prospective customers in China the opportunity to review the detailed performance capability of the MRSI-HVM3 in a local setting, supported by MRSI’s world-class local application engineers for a quick turn-around of product demonstration and die bonding sample building. The MRSI-HVM3 product family delivers industry-leading speed, future-proof high precision (< 3 micrometers), and superior flexibility for true multi-process, multi-chip, high-volume production. The superior performance is enabled by dual head, dual stage, integrated “on-the-fly” tool changer, ultrafast eutectic stage, and multi-levels of parallel processing optimizations.

The MRSI-HVM3 is designed for specific applications including Chip-on-Carrier (CoC), Chip-on-Submount (CoS), and Chip-on-Baseplate (CoB) assembly using eutectic and/or epoxy stamping die bonding. This also provides great opportunities to discuss with MRSI’s local process experts for solutions within the extended product configurations of HVM3e, HVM3P, H3TO, and H3LD. These configurations are based upon the same design as HVM3 but configured specifically for local top heating, inline conveyor CoB, AOC and gold-box packaging, WDM & EML TO-can packaging and high power laser diode packaging, respectively.

MRSI Systems Launches MRSI-HVM3P for New Applications

MRSI-H3TO Die Bonding Product Family Targeted at the 5G Wireless Network Supply Chain

MRSI-H3LD Die Bonder Targeted at the High Power Diode Laser Market

3D NAND is poised to become the dominant NAND flash technology and promises both enhanced performance and capacity. The Innodisk 3D NAND solid state drive (SSD) series is designed to fulfill the more stringent requirements for ruggedness and endurance seen in the industrial market.

The series uses pure industrial-grade Toshiba 3D TLC NAND flash with a rated P/E cycle number of 3000, ensuring solid longevity, while the fully in-house designed firmware is geared towards industrial usage. The SSDs uses direct write, and avoids using SLC cache which eventually causes an SSD performance drop and bloated P/E cycle numbers. Furthermore, the firmware can be customized to a large degree to suit any specialized requirement.

The series includes two product lines: the DRAM-less 3TE7 and the 3TG6-P with integrated DRAM using a Marvell controller. The product lines are available in capacities up to 1TB and 2TB respectively. They can both be fitted with Innodisk’s trio of power stabilizing technologies iCell™, iPower Guard™ and iData Guard™ to further strengthen data integrity in areas susceptible to power fluctuations.

The 3D NAND SSDs also use End-to-End Power Path Protection that ensures error correction at every data transfer point with the host and within the drives themselves. For more sensitive data, drives that utilize AES encryption are available with in-house designed software for easier deployment and management.

Samsung Electronics Co., Ltd. today announced several groundbreaking additions to its comprehensive semiconductor ecosystem that encompass next-generation technologies in foundry as well as NAND flash, SSD (solid state drive) and DRAM. Together, these developments mark a giant step forward for Samsung’s semiconductor business.

Unveiled at its annual Samsung Tech Day include:

  • 7nm EUV process node from Samsung’s Foundry Business, providing significant strides forward in power, performance and area.
  • SmartSSD, a field programmable gate array (FPGA) SSD, that will offer accelerated data processing and the ability to bypass server CPU limits.
  • QLC-SSD for enterprise and datacenters that offer 33-percent more storage per cell than TLC-SSD, consolidating of storage footprints and improving total cost of ownership (TCO).
  • 256-gigabyte (GB) 3DS (3-dimensional stacking) RDIMM (registered dual in-line memory module), based on 10nm-class 16-gigabit (Gb) DDR4 DRAM that will double current maximum capacity to deliver higher performance and lower power consumption.

“Samsung’s technology leadership and product breadth are unparalleled,” said JS Choi, President, Samsung Semiconductor, Inc. “Bringing 7nm EUV into production is an incredible achievement. Also, the announcements of SmartSSD and 256GB 3DS RDIMM represent performance and capacity breakthroughs that will continue to push compute boundaries. Together, these additions to Samsung’s comprehensive technology ecosystem will power the next generation of datacenters, high-performance computing (HPC), enterprise, artificial intelligence (AI) and emerging applications.”

Advanced Foundry Technology

Initial wafer production of Samsung’s 7nm LPP (Low Power Plus) EUV process node represents a major milestone in semiconductor fabrication. The 7LPP EUV process technology provides great advances, including a respective maximum of 40-percent area reduction, 50-percent dynamic power reduction and 20-percent performance increase over 10nm processes. The 7LPP process represents a clear demonstration of the foundry business’ technology roadmap evolution, providing Samsung’s customers a direct path forward to 3nm.

Powering Server-less Computing

Samsung enables the most advanced providers of server-less computing through products including the new SmartSSD, quad-level cell (QLC)-SSD, 256GB 3DS RDIMM as well as High Bandwidth Memory (HBM) 2 Aquabolt. By accelerating data processing, bypassing server CPU limits and reducing power demands, these products will enable datacenter operators to continue to scale at faster speeds while containing costs.

Samsung’s industry-leading flash memory products for future datacenters will also include Key Value (KV)-SSD and Z-SSD. KV-SSD eliminates block storage inefficiency, reducing latency and allowing datacenter performance to scale evenly when CPU architectures max out. The company’s next-generation Z-SSD will be the fastest flash memory ever introduced, with dual port high availability, ultra-low latency and a U.2 form factor, designed to meet the emerging needs of enterprise clients. Z-SSD will also feature a PCIe Gen 4 interface with a blazing-fast 12-gigabytes-per-second (GB/s) sequential read, which is 20 times faster than today’s SATA SSD drives.

Accelerating Application Learning

A range of revolutionary Samsung solutions will enable the development of upcoming machine learning and AI technologies. The Tech Day AI display highlighted astounding data transfer speeds of 16Gb GDDR6 (64GB/s), ultra-low latency of Z-SSD and industry-leading performance of Aquabolt, which is the highest of any DRAM-based memory solution currently in the market. Together, these solutions help Samsung’s enterprise and datacenter clients open new doors to application learning and create the next wave of AI advancements.

Streamlining Data Flow

Samsung’s new solutions will enable not just faster speeds and higher performance but also improved efficiency for its enterprise clients. Enterprise products on display at Tech Day included D1Y 8Gb DDR4 Server DRAM, which incorporates the most advanced DRAM process, resulting in lower power usage. Samsung’s 256GB 3DS RDIMM also helps to improve enterprise performance and enables memory-intensive servers capable up to 16-terabytes (TB).

Additionally, Samsung’s dual-port x4 PCIe Gen 4 32TB SSD offers 10GB/s performance. Samsung’s 1Tb QLC-SSD presents a cutting-edge storage option for enterprise clients with competitive efficiency when compared to hard disk drives (HDD), while KV-SSD allows server performance to scale even as CPU architectures max out, also providing a competitive TCO, write amplification factor (WAF) improvement and scalability.

Breaking Performance Barriers

With their leading-edge specs, Samsung’s QLC-SSD, Z-SSD and 8GB Aquabolt help high-performance computing clients blast through performance barriers and reach new heights. The 8GB Aquabolt provides the fastest data transmission speed and highest performance of any DRAM-based memory solution on the market today at 307GB/s per HBM cube. QLC-SSD and Z-SSD, both powerful on their own, are also offered in a tiered storage solution that results in a 53-percent increase in overall system performance.

Enabling Future Innovation

Emerging tech requires the most innovative and flexible components. Samsung’s SmartSSD will increase speed and efficiency, and lower operating costs by pushing intelligence to where data lives. Movement of data for processing has traditionally caused increased latency and energy consumption while reducing efficiency. Samsung’s new SmartSSDs will overcome these issues by incorporating an FPGA accelerator into the SSD unit. This allows for faster data processing through bypassing server CPU limits. As a result, SmartSSDs will have higher processing performance, improved time-to-insight, more virtual machines (VM), scalable performance, better de-duplication and compression, lower power usage and fewer CPUs per system.

Unparalleled Product Ecosystem

Samsung’s comprehensive product portfolio with state-of-the-art solutions set new standards for data processing speed, capacity, bandwidth and energy conservation. By leveraging such solutions, data centers, enterprise companies, hyper-scalers and emerging tech platforms are able to configure product solutions based on their requirements and develop exciting new tech offerings such as 5G, AI, enterprise and hyperscale data centers, automotive, networking and beyond.

Samsung will continue to push boundaries in tomorrow’s semiconductor technologies through innovations such as its sixth-generation V-NAND built on a single structure, or with ‘1-stack technology,’ and sub-10nm DRAM with EUV for super-high density and performance.

Experts across the industry, including Apple co-founder, Steve Wozniak, were invited at Samsung Tech Day to address the advancements and challenges in today’s semiconductor market, and offer insights for the future of semiconductors. More than 400 customers, partners and industry influencers attended the event.

MagnaChip Semiconductor Corporation (“MagnaChip”) (NYSE: MX), a designer and manufacturer of analog and mixed-signal semiconductor platform solutions, today announced the introduction of a new High-Voltage Super Junction MOSFET with a 900V breakdown voltage and low total gate charge (Qg) (“”90R1K4P”). The device with two package types, I-PAK and D-PAK, will sample to customers in November 2018 and will be manufactured in high volume in early first quarter of next year.

90R1K4P features the maximum peak voltage of 950V and a breakdown voltage as high as 900V, which enables enhanced system stability and reliability. It is well-suited for high-voltage applications such as:

  • an auxiliary power supply for industrial smart metering, which uses a three-phase input power to alternate current electric power generation, transmission, and distribution.
  • the lighting of flyback topology in both AC/DCand DC/DC high-speed switching converters.
  • a power supply for lighting equipment due to its characteristics of high stability that help prevent an unstable system condition that could lead to outages.

90R1K4P increases its switching speed due to its low total gate charge (Qg), which reduces heat generation in the system, keeps power loss down and improves energy efficiency. It also enables smaller form factors than the High-Voltage Planar MOSFET, since the die size of 90R1K4P is more than 50% smaller under the same condition of conduction loss.

To enable the use of 90R1K4P product in small form factors, MagnaChip will house the device in a small I-PAK package type under the code MMIS90R1K4P. As a result of the die size reduction and choice of packaging, this new MOSFET has the potential to be adopted in a wide range of applications.

Moreover, to ensure 90R1K4P product can be adopted for applications where space is at a premium, the company also can mount the Super Junction MOSFET into the slim SMD (Surface-Mount Devices) package type, D-PAK. It will be available under the code MMD90R1K4P.

“MagnaChip’s High-Voltage Super Junction MOSFET with a high breakdown voltage and a low total gate charge (Qg) will provide customers with high system reliability and energy efficiency,” said YJ Kim, CEO of MagnaChip. “We will continue to develop products based on the newly launched High-Voltage Super Junction MOSFET and extend our product portfolio with a diverse line of Super Junction MOSFETs with improved performance.”