Tag Archives: letter-wafer-business

The Semiconductor Industry Association (SIA) today commended the launch of the Congressional Semiconductor Caucus. SIA recognized members of the caucus at a reception on Capitol Hill Tuesday evening and honored the caucus’s co-chairs, Sen. James Risch (R-Idaho), Sen. Angus King (I-Maine), Rep. Pete Sessions (R-Texas), and Rep. Zoe Lofgren (D-Calif.).

“Semiconductors form the foundation of America’s technological and economic strength, national security, and global competitiveness,” said John Neuffer, president and CEO, Semiconductor Industry Association. “The Congressional Semiconductor Caucus will provide a venue for Members of Congress and industry professionals to share ideas and work collaboratively to advance policies that preserve and strengthen the semiconductor industry and our country. We applaud Sen. Risch, Sen. King, Rep. Sessions, and Rep. Lofgren for leading the caucus and for their longstanding support of policies that promote growth and innovation.”

Semiconductors are the brains of modern electronics, making possible the myriad devices we use to work, communicate, travel, entertain, harness energy, treat illness, and make scientific discoveries. SIA is the voice of the U.S. semiconductor industry, uniting companies that account for 80 percent of America’s semiconductor production.

The semiconductor industry directly employs nearly a quarter of a million people in the U.S. and supports more than 1 million additional U.S. jobs. In 2014, sales from U.S. semiconductor companies accounted for more than half of the $336 billion in total global semiconductor sales. Semiconductors are America’s third-leading manufactured export, behind aircraft and automobiles. The industry is highly research-intensive, investing one-fifth of revenues in R&D annually – more than any other industry.

“In the semiconductor industry and across the tech sector, innovation is made possible through the hard work and ingenuity of the industry’s scientists and engineers and is aided by smart public policy from the federal government,” Neuffer said. “SIA looks forward to working with members of the Semiconductor Caucus to advance policies that facilitate free trade and open markets, modernize America’s tax system, strengthen America’s technology workforce, advance university research, and protect intellectual property, among other priorities.”

SEMI today announced the fourth annual European 3D Summit. Entitled “European 3D Summit 2016: Above and Beyond TSV,”  the advanced semiconductor Summit will take place on January 18-20, 2016 in Minatec in Grenoble, France.

The 2016 SEMI European 3D Summit will include a wide scope of 3D integrated circuit topics beyond Through-Silicon-Via (TSV) technology – with talks on FO-WLP/ e-WLB, Embedded Die, and 3D alternative technologies. Keynote and invited speakers will present their approaches and strategies for 3D Integration technologies, with specific attention on current adoption for applications such as memory, mobile, automobiles, wearables and more.

The increasing implementation of 3D technology in microelectronics devices has reshaped the electronics market. SEMI will highlight the latest business challenges and opportunities with a market briefing where 3D and packaging industry experts will present business and market insights. Up to 30 companies working in the 3D sector will have the opportunity to exhibit their technologies at the 3D Summit exhibition.

SEMI will provide attendees networking opportunities throughout the event, including lunches, coffee breaks, a gala dinner and a complimentary one-on-one business meeting service. New this year: SEMI will offer attendees a chance to visit the Minatec Showroom, to learn about the latest innovations being developed in the Grenoble tech hub.

The  European 3D Summit steering committee includes executives from: ams AG, BESI, CEA-Leti, Evatech, EV Group, Fraunhofer-IZM, imec,  Scint-X,  SPTS, STMicroelectronics and SUSS Microtec.

Please visit www.semi.org/European3DSummit to register as an attendee or book a booth as an exhibitor.

North America-based manufacturers of semiconductor equipment posted $1.51 billion in orders worldwide in June 2015 (three-month average basis) and a book-to-bill ratio of 0.98, according to the June EMDS Book-to-Bill Report published today by SEMI.  A book-to-bill of 0.98 means that $98 worth of orders were received for every $100 of product billed for the month.

SEMI reports that the three-month average of worldwide bookings in June 2015 was $1.51 billion. The bookings figure is 2.6 percent lower than the final May 2015 level of $1.55 billion, and is 3.5 percent higher than the June 2014 order level of $1.46 billion.

The three-month average of worldwide billings in June 2015 was $1.54 billion. The billings figure is 1.0 percent lower than the final May 2015 level of $1.56 billion, and is 16.2 percent higher than the June 2014 billings level of $1.33 billion.

“The June book-to-bill saw slight declines in the three-month averages for both booking and billings compared to May,” said Denny McGuirk, president and CEO of SEMI.  “Both figures, however, are above the trends reported one year ago and the first half of the year has been one of positive growth.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

Billings
(3-mo. avg)

Bookings
(3-mo. avg)

Book-to-Bill
January 2015 

$1,279.1

$1,325.6

1.04
February 2015 

$1,280.1

$1,313.7

1.03
March 2015 

$1,265.6

$1,392.7

1.10
April 2015 

$1,515.3

$1,573.7

1.04
May 2015 (final)

$1,557.3

$1,546.2

0.99
June 2015 (prelim)

$1,542.1

$1,506.1

0.98

Source: SEMI (www.semi.org), July 2015

Semiconductor Research Corporation (SRC), a university-research consortium for semiconductors and related technologies, today announced that Analog Devices, Inc. has joined SRC’s hardware cybersecurity research program called Trustworthy and Secure Semiconductors and Systems (T3S).

T3S is a new SRC targeted research effort aimed at developing cost-effective strategies and tools to design and manufacture chips and systems that are reliable, trustworthy, secure and resistant to attack, tampering or counterfeiting. With the emergence of the Internet of Things, the increasing reliance on connected mobile and embedded devices, and the lengthy and global supply chain, the ability to provide assurance that hardware systems do what they are intended to and nothing else is more important than ever.

“Semiconductors are key enablers to the innovation and economic growth potential embodied in the next wave of information and communications technology where all manner of physical phenomena and digital devices are sensor-equipped and connected. The magnitude of this wave will depend in large part on the semiconductor industry’s ability to offer the assurances of security and reliability to customers. We see the SRC T3S program as an excellent, research, university-based program that will develop tools and design methods to secure the distributed sensor networks of the future,” said Samuel H. Fuller, Vice President of R&D at Analog Devices.

“We are pleased to have Analog Devices participating in the T3S program as we work to develop techniques and tools that provide assurance to customers across the entire supply chain,” said Celia Merzbacher, SRC Vice President for Innovative Partnerships.

T3S is collaborating with the National Science Foundation (NSF) to jointly fund university research on Secure, Trustworthy, Assured and Resilient Semiconductors and Systems (STARSS).

This collaboration substantially increases the impact of the T3S investment and enhances the value of the federal program by utilizing funding and connecting industry and academia. Last year STARSS announced a first set of projects at 10 universities totaling approximately $4 million and is in the process of selecting a second round of proposals to begin in late 2015.

CH2M has seen many changes and trends in the semiconductor industry since the company was involved designing many of the industry’s first wafer fabs back in the 1980s. As the industry matured and became more competitive, every new capital investment was more carefully scrutinized to make sure every investment yielded a good return.

For many years, investments in sustainable design weren’t regarded as attractive ROI generators. The technologies were there to save energy, water, and reduce waste. But the desire to avoid the cost of achieving such admirable improvements was stronger than the gratification gained by “doing the right thing.”

But times have changed. Rising regulatory rigor and improving sustainable design technologies have increasingly made doing the right thing also the economical thing.

The popularity of green building certification spawned by the USGBS’s LEED program has proliferated into an international family of green building rating systems.

CH2M has found growing acceptance of sustainable design among our semiconductor clients. For one client, the company designed a new fab achieving signif- icant reductions in energy (20%), water (35%), and emissions (50%). Another client OK’d a project called the semiconductor industry’s most environmentally friendly fab, including reductions of 15% in greenhouse gas emissions and 70% in water consumption. This trend is being supported by the advent of “smart building,” “Internet of Things,” and “Machine to Machine” technologies being applied to next generation wafer fabs. These technologies are driving new levels of achievement in such arenas as Fab Resource Management (Net Zero water/waste/energy, renewables integration, co-generation heat recovery); Building Systems (passive solar, natural ventilation critical systems redundancy, disaster planning); Information Management (building management system, building information model, energy simulation model, zone sensor controls, performance monitoring, predictive maintenance); and Optimized Human Experience via online dashboards.

Seeing this trend gain momentum, the industry approached the USGBC and formed the LEED User Group: Industrial Facilities (LUGIF), a small team of green building lead- ers including Assa Abloy, CH2M, Colgate Palmolive, GAF, Intel, Johnson Controls, Kohler Co., Procter & Gamble, Turner Construction, United Technologies and AECOM.

This group was instrumental in shaping LEED’s latest Version 4, which better address- es the green certification standards for industrial buildings including semiconductor fabs.

CH2M has helped advance this next generation fab movement with its design of the world’s first LEED Gold semiconductor fab, first LEED Gold semiconductor Process Utility Building, and first LEED Gold data center. These projects save long-term operating costs while burnishing the brand of these companies that choose to take a greener path.

Green certification programs aren’t a fit for every building. But owners who don’t think they’re a fit for green design need to know there are now more creative approaches for actively linking green design to attractive long-term economic benefits.

Today’s approach for green design is to reflect before you reject: there are refined and reliable tools to assess a fab retrofit or greenfield project for its green design suit- ability. If owners don’t think the ROI is good enough, they can always take a pass. But if they take the time to take a look, they may be surprised at how good the green design ROI has become.

The ClassOne Technology Solstice S4 won the Best of West award, presented by Solid State Technology and SEMI. The award was presented to Byron Exarcos, president of ClassOne, at the company’s booth in the North Hall on Wednesday afternoon.

Byron Exarcos, president of ClassOne Technology; Karen Salava, president of SEMI Americas; and Pete Singer, Editor-in-Chief of Solid State Technolgy

Byron Exarcos, president of ClassOne Technology; Karen Salava, president of SEMI Americas; and Pete Singer, Editor-in-Chief of Solid State Technolgy

Solstice S4 is the first automated plating tool that delivers advanced performance on smaller substrates at affordable prices. Described as “advanced plating for the rest of us,” Solstice is designed specifically for the smaller-substrate users in emerging technologies such as MEMs, LEDs, Power Devices, RF Communications, Interposers, Photonics and Microfluidics. Solstice sets new standards for plating performance and affordability.

“There’s a convergence of forces for the different trends that we all see in the market, and right now, it’s the internet of things, it’s the More than Moore, and it’s the flexibility of the manufacturers to achieve all these things,” said Kevin Witt, chief technology officer at ClassOne Technology, after the award presention. “We’ve felt that we had a product that reflected a lot of what those requirements were.”

Witt said there’s a lot of work being done at the cutting edge of 300mm, as well it should. “But there’s an equally important 200mm and below surge. Those folks need equipment. What they can buy now is from the ‘90s,” he said.

Until now, with the Solstice. “The people that are building the 200mm and below fabs need the modern capability of wafer level packaging and interfacing for chip stacking. They need something that fits their budget profile, that is not a 300mm tool that has been repurposed for 200mm,” he said.

Witt concluded: “We went for best of show in the hopes that the world would see that there are companies that are focused on meeting the needs of the smaller level producers that are the next growth area.”

Designed for high-performance, cost-efficient ≤200mm electroplating, Solstice systems are priced at less than half of what similarly configured plating tools from the larger manufacturers would cost — which is why Solstice has been described as delivering “Advanced Plating for the Rest of Us.” Solstice can electroplate many different metals and alloys in a spectrum of processes, on transparent or opaque substrates. ClassOne now offers three Solstice models: the LT for plating process development, the S4 for mid-volume production, and the S8 for high-volume, cassette-to-cassette production, with throughput of up to 75 wph.

Earlier this week, at SEMICON West, ClassOne Technology announced a configuration for optimizing Through Silicon Via (TSV) and Through Wafer Via (TWV) processes on its Solstice® electroplating systems. The Solstice family, introduced last year, is designed to provide advanced yet cost-efficient plating for MEMS, Sensors, RF, Interposers and other emerging technologies for ≤200mm wafers. Flexibly configurable, the Solstice for TSV/TWV combines chambers for the critical blind via pre-wet operation with advanced copper plating on the robust and reliable automation frame that is the heart of the Solstice.

“In recent months customer requests for TWV, whether alone or in combination with forming redistribution layers (RDL), have skyrocketed,” said Witt. “Many of our smaller-wafer customers seek the advantages of 2.5 and 3D packaging needed for their next generation products; and cost-effective TSV or TWV processing is mission critical. The new Solstice configuration addresses their needs effectively and elegantly with a plating tool that is affordably priced for 200mm and smaller substrates.”

Witt explained that the new Solstice TSV configuration, which has already been sold to customers, employs a unique, high-efficiency but simple vacuum pre-wet chamber followed by copper via electroplating. This combination of capabilities enables the ClassOne tool to routinely produce fully-filled or lined vias with widths ranging from 5 to 250 micron having aspect ratios as high as 9:1. Traditionally, this level of performance has been challenging even for plating systems costing twice as much as Solstice. The Solstice can also be configured to perform additional downstream processing such as resist strip and seed layer etch making it a cluster tool that delivers a suite of critical processes, reducing cycle time and saving money. This technology makes it possible to process TSV alone or TSV and redistribution layers simultaneously to provide a complete solution on a single tool.

SEMI honored six industry leaders for their outstanding accomplishments in developing Standards for the microelectronics and related industries. The annual SEMI Standards awards were announced at the SEMI Standards reception held last night during SEMICON West 2015. 

2015 SEMI International Standards Excellence Award, inspired by Karel Urbanek

The SEMI International Standards Excellence Award, inspired by Karel Urbanek, is the most prestigious award in the SEMI Standards Program. The 2015 recipient is Dr. Jean-Marie Collard of Solvay Chemicals. The Award recognizes the leadership of the late Karel Urbanek, co-founder of Tencor Instruments and a past SEMI Board of Directors member who was a key figure in the successful globalization of the Standards Program.

Active in SEMI Standards development since 1997, Collard co-chaired the European Chapters of the Gases and Liquid Chemicals Committees since 2003. Under his leadership, the committees created numerous Standards for the semiconductor and solar manufacturing industries.  Collard has been instrumental in ensuring that the standards developed are relevant. He has actively recruited key players in the supply chain to contribute to development efforts, making certain that the published Standards reflect the true needs of the industry.  He also served as co-chair of the European Regional Standards Committee (ERSC) from 2009 to 2013, steering the ERSC through difficult economic times. As ERSC co-chair, Collard was also an International Standards Committee member, and provided valuable, practical input for new proposals, including the current effort to establish virtual meetings.

Collard earned his Master’s degree and Ph.D. in analytical chemistry from the University of Liege, Belgium. He joined Solvay in 1988 and has worked in Belgium, France, and the United States.

Merit Award

The Merit Award recognizes a Standards volunteer major contributions to the semiconductor industry through the SEMI Standards Program. Award winners typically take on a complex problem at the task force level, gain industry support, and drive the project to completion. Matt Milburn of UCT established the Surface Mount Sandwich Component Dimensions Task Force, within the North America Chapter of the Gases Committee, in April 2013 to develop standards for “sandwich” components (components located between substrate and another component). At the time of Task Force formation, these components did not have dimensional standards in place and varied by each manufacturer, resulting in interchangeability issues between manufacturers of functionally equivalent components.  Milburn addressed this problem by leading the successful development of ballot 5595, Specification for Dimensions of Sandwich Components for 1.125 Inch Type Surface Mount Gas Distribution Systems, which was recently approved by the Gases Committee and will be published as SEMI C88-0715.

Leadership Award

The Leadership Award recognizes volunteers who have demonstrated outstanding leadership in guiding the SEMI Standards Program. This Award is presented to individuals who have strengthened the Program through member training, mentoring, and new member recruitment. Frank Parker of ICL Performance Products and Frank Flowers of PeroxyChem have co-chaired the North America Chapter of the Liquid Chemicals Committee for over ten years. During this time, Parker and Flowers have overseen the development of new specifications and analytical test methods for liquid chemicals while keeping the extensive catalog of previously developed liquid chemical standards up-to-date with current industry needs. Their experience and patience has been critical in transforming new volunteers into productive committee contributors, effectively guiding them through the standardization process and minimizing wasted efforts.

Honor Award

The Honor Award is presented to an individual who has demonstrated long-standing dedication to the advancement of SEMI Standards. Dr. Jaydeep Sinha of KLA-Tencor has contributed to the Silicon Wafer Committee for over 15 years and has led the development of numerous metrology standards. In addition to leading the Advanced Wafer Geometry Task Force, Sinha organized several SEMI Standards workshops around the world, recruiting technologists from leading device makers, equipment suppliers, and consortia to educate local audiences on recent developments and future needs in wafer geometry. Sinha also actively works to keep the Silicon Wafer Committee familiar with oncoming industry trends, frequently inviting industry experts to speak at committee meetings on hot topics.

Corporate Device Member Award 

The Corporate Device Member Award recognizes the participation of the user community and is presented to individuals from device manufacturers. Dr. Jan Rothe of GLOBALFOUNDRIES is this year’s recipient. Rothe has been active in SEMI Standards since the mid-2000s, and has led the International E84 (Specification for Enhanced Carrier Handoff Parallel I/O Interface) Revision Task Force since 2007. Rothe’s consistent participation in the Physical Interfaces and Carriers Committee and feedback on ballot proposals has ensured that the customer perspective is reflected in all committee output.

CEA-Leti and EV Group launched a new program in nano-imprint lithography (NIL) called INSPIRE to demonstrate the benefits of the nano-patterning technology and spread its use for applications beyond semiconductors.

Leti and EVG Launch INSPIRE Figure 2

In addition to creating an industrial partnership to develop NIL process solutions, the INSPIRE program is designed to demonstrate the technology’s cost-of-ownership benefits for a wide range of application domains, such as photonics, plasmonics, lighting, photovoltaics, wafer-level optics and bio-technology.

Leti and EVG will jointly support the development of new applications from the feasibility-study stage to supporting the first manufacturing steps on EVG platforms and transferring integrated process solutions to their industrial partners, thus significantly lowering the entry barrier for adoption of NIL for manufacturing novel products.

In its effort to support high-volume manufacturing applications, EVG recently launched the HERCULES NIL equipment platform, and the INSPIRE program’s activities will complement the company’s efforts within the framework of its NILPhotonics competence center that was launched in December 2014.

“EVG is excited about the value that the partnership with Leti in the INSPIRE program will provide to industry,” said Markus Wimplinger, corporate technology development and IP director at EV Group. “After more than a decade of research and development activities, EVG has propelled NIL technology to a level of maturity that enables significant advantages for certain applications compared to traditional optical lithography.”

After launching its NIL technology-development program more than 10 years ago, Leti oriented the use of this technology mainly for photonics applications. In early 2014, the program was integrated in the Silicon Technologies Division to establish a NIL collaborative program.

“Leti and EVG have a long history of collaborating on ways to bring new technologies to market at reasonable costs for the benefits of our customers,” said Laurent Pain, patterning program manager in Leti’s Silicon Technologies Division. “Through INSPIRE, we will develop new ways for them to use this flexible, powerful nano-patterning technology to create new products for a wide range of applications.”

SEMI today announced that Stephen S. Schwartz, CEO of Brooks Automation, and Toshikazu Umatate, senior vice president and general manager of the Semiconductor Lithography Business at Nikon Corporation, were elected as new directors to the SEMI International Board of Directors in accordance with the association’s by-laws.

Four current board members were re-elected for a two-year term: Bertrand Loy, president and CEO of Entegris; Dave Miller, president of DuPont Electronics & Communications; Kyu Dong Sung, CEO of EO Technics; and Xinchao Wang, chairman and CEO of JCET.

Additionally, the SEMI Executive Committee confirmed Yong Han Lee, chairman of Wonik as SEMI Executive Committee chairman, and Tetsuo Tsuneishi, chairman of the Board of Tokyo Electron, Ltd. as SEMI vice-chairman.

The leadership appointments and the elected board members’ tenure become effective at the annual SEMI membership meeting on July 15, during SEMICON West 2015 in San Francisco, California.

“These two distinguished industry leaders will be tremendous assets to the SEMI Board of Directors,” said Denny McGuirk, president and CEO of SEMI. “We also appreciate the continued service of those re-elected to the Board — their counsel and wisdom is valued as SEMI responds to new industry challenges, inflections, and opportunities.”

SEMI’s 19 voting directors and 11 emeritus directors represent companies from Europe, China, Japan, Korea, North America, and Taiwan, reflecting the global scope of the association’s activities. SEMI directors are elected by the general membership as voting members of the board and can serve a total of five two-year terms.

Blood and tears at DAC


July 14, 2015

BY PETE SINGER, Editor-in-Chief

At this year’s Design Automation Conference (DAC) in San Francisco, Brian Otis, a Director at Google, talked about how hundreds of millions of people are at risk of diabetes – and how a smart contact lens that continuously monitors blood glucose levels and transmits the data to a smartphone might just be the ideal solution.

There is a good correlation between your glucose levels in tears and that in blood (although it’s a factor of magnitude lower), so a smart contact lens can measure glucose levels using a wireless chip and miniaturized glucose sensor. The devices are embedded between two layers of soft contact lens material.

Google announced the smart lens project in January of 2014, at which time multiple clinical studies had been completed. A partnership was subsequently announced with Novartis’s Alcon eye-care division in July of 2014.

Otis said that the universe of people who are either bona fide pre-diabetic or at risk is huge. “It’s hundreds of millions of people,” he said. “Our hypothesis is that if we are able to create more comfortable CGMs (continuous glucose monitors), this will significantly impact the diabetes management problem we’re facing. No one has solved this problem yet, but we really want to do this because it could improve people’s lives,” he said.

A smart contact lens could solve the problem because it’s a wearable device that many millions of people already wear on a daily basis. “If there is an option of wearing the device that many people wear, that’s comfortable and also corrects your vision and gives you this valuable information, you’re likely to do that over than, let’s say, pricking your finger,” Otis said.

Otis described smart contact lenses as not just another gadget. “It’s really part of an ecosystem that can form a new type of proactive healthcare. We’re going to work really hard on that,” he said.

What makes this all possible, of course, is the work that the semiconductor industry has done in minia- turization over the last several decades. Otis said more work is needed: “The chips, the passive components, the power supplies, the antennas: Everything needs to shrink,” he said.