Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



Noise cancellation: The new failure and yield analysis superpower

06/22/2014  Root cause deconvolution is a quick and cost effective way to determine the underlying root causes represented in a population of failing devices from test data alone.

Applied Materials enables cost-effective vertical integration of 3D chips

05/28/2014  Applied Materials, Inc. today introduced the Endura Ventura PVD system that helps customers reduce the cost of fabricating smaller, lower power, high-performance integrated 3D chips.

STATS ChipPAC introduces robust encapsulated wafer level packaging technology

05/28/2014  STATS ChipPAC Ltd., a provider of advanced semiconductor packaging and test services, today introduced encapsulated Wafer Level Chip Scale Package, a packaging technology that raises the industry standard of durability for Wafer Level Chip Scale Packaging (WLCSP).

Ziptronix and EV Group demonstrate submicron accuracies for wafer-to-wafer hybrid bonding

05/27/2014  ­ Ziptronix Inc. and EV Group today announced they have successfully achieved submicron post-bond alignment accuracy on customer-provided 300mm DRAM wafers.

MediaTek, SK Hynix, AMD, and Micron sales surge in first quarter

05/19/2014  Top 20 ranking shows that semiconductor industry company consolidation continues to accelerate.

Deca Technologies ships 100-millionth wafer-level packaged component

04/16/2014  Deca Technologies, an electronic interconnect solutions provider to the semiconductor industry, today announced that it has shipped its 100-millionth component.

Global Semiconductor Alliance celebrates 20 years of industry collaboration

04/08/2014  The Global Semiconductor Alliance (GSA) is celebrating 20 years of industry collaboration this year.

Imec achieves record 8.4 percent conversion efficiency in fullerene-free organic solar cell

03/12/2014  In this week’s Nature Communications, imec presents the development of fullerene-free organic photovoltaic (OPV) multilayer stacks achieving a record conversion efficiency of 8.4 percent.

STATS ChipPAC introduces breakthrough manufacturing method for wafer level packaging

03/12/2014  STATS ChipPAC, a provider of advanced semiconductor packaging and test services, has designed and implemented an innovative new manufacturing method that is a significant paradigm shift from conventional wafer level manufacturing.

GlobalFoundries and Fraunhofer IIS to collaborate on EUROPRACTICE, Europe's MPW wafer shuttle program

02/26/2014  GLOBALFOUNDRIES and Fraunhofer Institute for Integrated Circuits IIS today announced the extension of their long-term collaboration, focusing on 40nm and 28nm processes. GLOBALFOUNDRIES will also join the European Multi Product Wafer (MPW) Program EUROPRACTICE.

International Rectifier opens ultra-thin wafer processing facility in Singapore

02/24/2014  International Rectifier, IR, today announced that the company has commenced initial production at its new ultra-thin wafer processing facility in Singapore (IRSG).

North American semiconductor equipment industry posts January 2014 book-to-bill ratio of 1.04

02/21/2014  A book-to-bill of 1.04 means that $104 worth of orders were received for every $100 of product billed for the month.

SMIC and JCET establish joint venture for 12 inch bumping and testing

02/21/2014  Semiconductor Manufacturing International Corporation, China's largest and most advanced semiconductor foundry, and Jiangsu Changjiang Electronics Technology Co., Ltd., the largest packaging service provider in China, jointly announced today a joint venture for 12" bumping and related testing.

Epoxy Technology and John P. Kummer Group announce a new specialty adhesive packaging company

02/20/2014  Epoxy Technology, Inc. and John P. Kummer Group announce the formation of a new specialty adhesive packaging company, Epoxy Technology Europe Ltd (ETEL).

The 2014 European 2.5/3DIC Summit

02/06/2014  SEMI’s second annual European 3D TSV Summit was held in Grenoble in late January. Three hundred and twenty attendees met to discuss the status of 2.5/3DIC and other advanced packaging technologies.

Global wafer-level packaging equipment market to grow at a CAGR of 2.9

02/05/2014  Analysts at ReportsNReports.com forecast the global wafer-level packaging equipment market to grow at a CAGR of 2.9 percent over the period 2013-2018.

2014 Outlook: An era of unprecedented change

01/24/2014  We asked leading industry experts and analysts to give us their perspectives on what we can expect in 2014.

Synthetic diamond’s role in thermal management

01/23/2014  Synthetic diamond is ideally suited for thermal management of semiconductor packaging, as it combines exceptionally high thermal conductivity with electrical isolation.

Substrate impact on 2.5/3D IC costs

01/23/2014  At the recent Georgia Tech Global Interposer Technology (GIT) Workshop in Atlanta, the pervasive theme appeared to be whether a change in substrate is required to lower overall costs and help drive HVM (high volume manufacturing) applications.

A bilayer temporary bonding solution for 3D-IC TSV fabrication

01/23/2014  New technology eliminates the need for specialized equipment for wafer pre- or post-treatment.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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