Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



TSRA faces stockholder challenge to Board of Directors

01/04/2012 

Tessera Technologies (TSRA) received a letter from Starboard Value and Opportunity Master Fund Ltd, intending to nominate 3 candidates for the TSRA Board of Directors. Tessera issued a response, saying that it has the right Board and management team in place.

JCAP, Enpirion partner on MEMS manufacturing

01/03/2012 

Enpirion, Inc. entered into a strategic partnership agreement with JiangyinChangdian Advanced Packaging Co., Ltd. (JCAP) for the manufacturing of silicon-based magnetics utilizing Enpirion's proprietary micro electronic magnetic silicon (MEMS) technology.

TSMC repeats call for foundry-centric 2.5/3D industry

12/29/2011 

The readiness of suppliers to offer 2.5D packaging technologies was in full debate at the RTI 3D ASIP event this month, with presentations and rumors questioning how soon customers will need 2.5D/3D, and whether some offerings are worth the investment.

Diodes keeps MOSFETs cool with new package

12/29/2011 

Diodes Incorporated (Nasdaq:DIOD) began packaging MOSFETs in the miniature DFN1212-3 package for cooler operation than the equivalent-footprint SOT723 package.

Advanced package technologies' growth through 2015

12/27/2011 

Small, mobile, Internet-connected devices are bucking the slow economy and use advanced packaging technologies to pack an enormous amount of functionality into a very small form factor, notes New Venture Research, which provides forecasts for each advanced packaging device type.

MEMS die size grows, test evolves, and other trends

12/26/2011 

Yole studies the evolution of inertial MEMS and magnetometers and provides reverse costing analysis of the MEMS devices in "Technology Trends for Inertial MEMS." The report considers 23 MEMS devices.

Amkor PoP tech surpasses 100M units

12/24/2011 

Amkor Technology Inc. (Nasdaq:AMKR), semiconductor assembly and test services (SATS) provider, has shipped more than 100 million units of its Through Mold Via (TMV) package-on-package (PoP) products.

Fan-in WLCSP outpaces semiconductor packaging market

12/22/2011 

Yole identifies the fan-in wafer-level chipscale packaging (WLCSP) market for strong growth, and a diverse base of chip technologies. Fan-in WLCSP reached 2.3 million 300mm-equivalent wafers shipped in 2011, or about $1.7 billion in revenue.

Powertech seeks 30-51% of Greatek

12/19/2011 

Powertech Technology Inc. (PTI) has approved a tender offer of NT$25.28 per share for the common shares of Greatek with a minimum acquisition target of 30% of outstanding shares.

IPC, JEDEC devise package strain test

12/15/2011 

IPC and JEDEC created

TSMC, Arteris develop silicon-interposer-based NOCs

12/07/2011 

Arteris Inc., network-on-chip (NoC) interconnect IP company, will incorporate its FlexNoC NoC interconnect IP into an SoC die on silicon interposer test chip with TSMC.

Partnership forms to commercialize advanced photonic chip innovations

11/29/2011 

The Institute of Microelectronics, a research institute of Singapore's A*STAR, plans to commercialize key innovations in silicon photonic chips designed to support high-speed, high-bandwidth optical communications.

OSRAM envelops LED chip in reflective package

11/29/2011 

OSRAM Opto Semiconductors introduced the Oslon Square LED for lighting applications, packaged enclosed in a reflective layer to boost light output.

Cirrus Logic awards STATS ChipPAC for packaging services

11/28/2011 

SATS provider STATS ChipPAC Ltd. (SGX-ST:STATSChP) was named "Supplier of the Year" by Cirrus Logic Inc. (NASDAQ:CRUS), analog and mixed-signal processing components maker.

Hynix renews Tessera license

11/24/2011 

Hynix Semiconductor Inc. exercised the renewal option in its March 31, 2005 license agreement with Tessera Technologies Inc. (NASDAQ:TSRA) to extend the term of that license to May 22, 2017.

DAC seeks speakers bureau experts

11/23/2011 

The Design Automation Conference (DAC) is soliciting semiconductor industry experts for participation in invited sessions, panels, and other events at the 49th DAC, June 3-7, 2012 in San Francisco, CA.

AKM consigns chip test equipment to ChipMOS' ThaiLin under new service agreement

11/22/2011 

ChipMOS subsidiary ThaiLin Semiconductor Corp. will take on dedicated semiconductor testing capacity for a new long-term service agreement with its client Asahi Kasei Microdevices Corporation (AKM).

STATS ChipPAC expands wafer-level chipscale packaging in Taiwan

11/17/2011 

STATS ChipPAC Ltd. completed the expansion of its 300mm wafer bump and wafer-level chipscale packaging (WLCSP) operation in Taiwan.

Report examines fan-out wafer-level packaging momentum, assembly pricing trends

11/16/2011 

Fan-out wafer-level packaging (FO-WLP) is gaining momentum as an option for devices with large numbers of I/Os, vs. going finer-pitch to keep using conventional fan-in technology, says TechSearch International in an updated report.

SUSS MicroTec sends equipment to SVTC in MEMS, 3D IC dev partnership

11/15/2011 

Nanotechnology accelerator SVTC Technologies partnered with SUSS MicroTec on wafer-level packaging for MEMS, and 3D IC bonding technology development.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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