Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



WLCSP QFN ELP Semiconductor packaging for consumer applications

01/12/2011 

Semiconductor packaging for consumer products. Source: UnisemThere are a few key attributes in new consumer electronics: a reduced footprint and/or profile, high electrical performance, fine-pitch design, custom features, and a low cost. Multi-row, wafer-level, flip-chip, and multi-chip packaging can meet these needs, say Unisem writers Rico San Antonio and Chris Stai. They compare the value of each packaging type.

Tooling and process technology vital for thin packages

01/11/2011 

Getting thinner appears to be the goal driving the market in both the wafer-level and substrate-level sectors, and innovative tooling and process technology will become paramount in addressing thinned packaging and ramping up to volume reliably, writes Dave Foggie from DEK.

China WLCSP established R and D subsidiary in CA

01/10/2011 

China WLCSP Co. Ltd., provider of wafer level (WLP) miniaturization technologies for the electronics industry, confirmed its commitment to the US market with the opening of a new R&D center in Sunnyvale, CA.

Aries 0.30mm pitch test sockets suit BGA CSP MLF packages

01/07/2011 

High-frequency center probe test sockets from AriesAries Electronics, an international manufacturer of standard, programmed and custom interconnection products, now offers machined high-frequency center probe test sockets to accommodate IC devices with a lead pitch of 0.30mm.

Nautic_acquires Aavid Thermalloy for thermal management products

01/04/2011 

Nautic Partners has partnered with management to acquire Aavid Thermalloy LLC. Aavid designs and manufactures high-performance thermal management products used in a wide range of electronics systems and energy supplies.

IEDM Reflections, last day: Novel process technologies

01/04/2011 

Michael A. Fury of Techcet blogs about the papers he saw at IEDM 2010. The final afternoon continued with 4 parallel sessions and the halls and conference rooms were as crowded as they had been all week. I was compelled to spend nearly all of my time in the novel process technologies session.

ISSI-spins-off-Giantec-Semiconductor

01/04/2011 

Integrated Silicon Solution Inc. (Nasdaq: ISSI) completed the spin-off of its subsidiary, Giantec Semiconductor Inc., which focuses on the ASSP business that includes EEPROM and SmartCard products.

CoorsTek acquires Saint Gobain Advanced Ceramics

01/04/2011 

CoorsTek Inc., technical ceramics manufacturer, completed its purchase of the advanced ceramics business of Saint-Gobain. CoorsTek adds manufacturing facilities and product lines such as silicon carbide for semiconductors.

TCS to acquire Trident Space & Defense to bolster expertise in secure wireless communications

01/03/2011 

Trident Space & Defense, which specializes in semiconductor packaging, data storage solid state drives, high-reliability electronic components, and turnkey full-tracking ground stations, will become part of the TeleCommunication Systems Inc. (TCS) government segment, as part of an acquisition announced in 2010.

Wafer level packaging of image sensors

01/01/2011  Wafer-level packages that use a glass cover over the package cavity and through-silicon vias to interconnect the die bond pads satisfy the packaging requirements for CMOS image sensors: compact, reliable, low cost, and accommodate both front- and back-illuminated image sensors with no external changes. Giles Humpston, Tessera Inc., San Jose, California, USA

Cohu-names-prez-of-Semiconductor-Equipment-Group

12/29/2010 

Cohu Inc. (NASDAQ:COHU) appointed Luis A. Müller president of its newly formed Semiconductor Equipment Group, which encompasses Cohu subsidiaries Delta Design and Rasco GmbH.

RoodMicrotec-adds-almost-EUR2m-capital

12/29/2010 

RoodMicrotec N.V. has successfully secured mezzanine capital of € 1.994 million without repayment obligation, providing a long-term strengthening of the company’s equity position.

MEMS packaging conference planned for 2011

12/28/2010 

The University of Michigan College of Engineering will present Packaging for MEMS March 31 to April 1, 2011, in Boston, MA. MEMS packaging is a significant part of product cost. This program highlights what to consider in developing application-specific packaging that will meet your goals for product performance, durability, and total cost.

Silbond semiconductor chemical supplier acquired by investment firm

12/28/2010 

O2 Investment Partners, LLC, announced it has acquired all outstanding shares of Silbond Corporation, a specialty chemical manufacturing business based in Weston in southeastern Michigan.

Terepac-expands-to-Silicon-Valley

12/27/2010 

Terepac Corporation has been accepted into the Plug and Play Tech Center in Sunnyvale, California, an incubator in the heart of Silicon Valley. Terepac’s footprint in Silicon Valley is the company’s first presence in the United States.

SemiSouth-sends-SiC-die-to-Micross-for-hermetic-packaging-aimed-at-mil-aero-drilling-apps

12/21/2010 

Micross Components, Inc. and SemiSouth Laboratories, Inc. announced a collaborative effort to expand SemiSouth's line of Silicon Carbide (SiC) Power JFETs and Schottky Diodes. SemiSouth will provide select JFET and diode die to Micross for packaging and test in metal hermetic packages

Foundry-orders-Nanometrics-TSV-metrology-system

12/17/2010 

Nanometrics Incorporated (Nasdaq: NANO) announced that a leading semiconductor foundry has ordered a UniFire 7900 metrology system for advanced 3D wafer-scale packaging process control.

DCG-sends-wafer-test-systems-to-CIMPACA

12/16/2010 

The Centre Intégré de Microélectronique Provence Alpes Côte d'Azur (CIMPACA) selected DCG Systems products for its characterization and failure analysis platform: the ELITE lock-in thermography system and the Meridian WaferScan emission microscopy wafer prober with LVx option.

Cu protrusion, keep-out zones highlight 3D talks at IEDM

12/15/2010 

Dr. Phil Garrou looks at 3D IC technology discussions at IEDM 2010, including details of TSMC's integration of 3D into its advanced CMOS foundry processes, and a close examination of 3D-induced stresses.

Flip-chip-wafer-level-packaging-see-double-digit-CAGR-says-TechSearch-International

12/15/2010 

TechSearch International’s new study, "2010 Flip Chip and WLP: Market Projections and New Developments," projects a CAGR of more than 15% for flip chip units. In unit volumes, WLPs are expected to see a 12.48% CAGR from 2009 to 2014. The report profiles drivers for the demand for gold and solder bumping, as well as WLP.




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Environment, Safety & Health

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The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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