10/01/2008  In semiconductor manufacturing, there’s a lot of talk about ends. First, there’s the front-end and the back-end.

10/01/2008  Cellular handsets and mobile handheld products are defining a new application space that goes beyond the realm of traditional flip chip and 3D packaging.

09/24/2008  SMT editor-in-chief Gail Flower chaired a panel comprising equipment supplier, laboratory, EMS provider, and consultant voices at IPC Midwest in Schaumburg, Ill. David Geiger, Flextronics International; Jacques Coderre, Unovis Solutions; Vern Solberg, STI - Madison; and Gene Dunn, Panasonic Factory Solutions of America spoke about emerging packaging technologies.

09/16/2008  SCHOTT Electronic Packaging offers a hermetic transistor outline (TO) for fiber channel applications of 17 gigabits/second and beyond. The TO PLUS Line reportedly overcomes the normal limitations of a TO by combining glass and packaging design aspects. Up to 6 pins, including higher frequency and DC (electrical) ports, most of the necessary electronics can be packaged into a regular TO footprint, rather than resorting bulky complex hybrid packages.

09/16/2008  Using 2D and 3D X-ray techniques to find and confirm manufacturing defects in flip-chip devices
By Evstatin Krastev, Ph.D. Dage Precision Industries, a Nordson Company
While flip chip design eliminates excessive packaging, high-density flip chip devices place a greater burden upon device inspection. The combination of 2D x-ray and CT analysis offers powerful analytical capabilities need for the complete inspection of flip-chip devices and stacked packages.

09/01/2008  In celebration of its new 55,000 sq.ft. wafer bumping and back-end processing facility in Penang, Malasia, Pac Tech Packaging Technologies is planning a grand opening ceremony and technical symposium on September 18 and 19, 2008, respectively. The festivities are intended to bring attendees up to date on all facility's capabilities, and inform them on new developments in packaging technology.

08/31/2008  STATS ChipPAC Ltd. and Infineon Technologies have signed a second agreement in which STATS ChipPAC will provide manufacturing services for products based on Infineon's first generation embedded wafer-level ball grid array (eWLB) technology. This agreement between the two companies comes closely follows the Aug. 7 release announcing an agreement between Infineon, STMicroelectronics and STATS ChipPAC on joint development of next generation eWLB technology.

08/12/2008  In recognition of MEPTEC's 30th year, MEPTEC and Advanced Packaging magazine will present Packaging Developments and Innovations: From System Design to Integrated Delivery, Thursday, November 13, 2008, at the Wyndham Hotel in San Jose, CA. The symposium will include a special luncheon featuring keynote speaker, Glenn Daves, director of packaging technology, Freescale Semiconductor.

08/07/2008  STMicroelectronics, STATS ChipPAC, and Infineon Technologies AG have signed an agreement to jointly develop the next-generation of embedded wafer-level ball grid array (eWLB) technology, based on Infineon's first-generation technology, for use in manufacturing future-generation semiconductor packages.

08/05/2008  Shifting away from focus on 3D IC and TSV processes, this year's Advanced Packaging Conference at SEMICON Europa, titled "Technologies, Manufacturing and Supply Chain", will focus on more immediate issues facing the back-end sector of the semiconductor industry. Eef Bagerman, general manager operations, back-end innovation, NXP Semiconductors offered some insight about how the program was selected, and what technologies will be most likely to spark discussion.

08/04/2008  A line of fast-setting, one-component conductive adhesives designed for connecting passive components and bare die on lead frames and PCB substrates has been introduced by the Contact Materials Division (CMD) of Heraeus. Intended uses for these materials include smart cards and flexible circuits found in camera phones and automotive or semiconductor applications.

08/04/2008  encompassing die, dielectric, passives, and ultimately resulting in thin packages. This series of articles will overview trends from thick to thin packages with embedded RF passive and active components.

08/01/2008  STUTTGART, GERMANY — Shifting away from focus on 3D IC and TSV processes, this year’s Advanced Packaging Conference, at SEMICON Europa, titled “Technologies, Manufacturing And Supply Chain”, will focus on more immediate issues facing the back-end sector of the semiconductor industries.

08/01/2008  In a slowing economy, everyone looks for signs of hope for a strong future. Unfortunately at times like these, funding for R&D often takes a back seat to the basic needs of a company to conduct commerce and basically stay in business by doing the same things in the same way just to keep pace.

07/25/2008  Following its acquisition of the Adhesives and Electronics Materials businesses from National Starch and Chemical Company, Henkel has announced its executive team to take the company forward. Under the direction of Alan Syzdek, corporate senior V.P. the electronics group of Henkel will be organized on a global basis by industry sector.

07/22/2008  On Wednesday, July 16, 2008, the editors and publisher of Solid State Technology (SST) and Advanced Packaging Magazine presented the 2008 ACA Awards, in usual impromptu style on the floor at SEMICON West. This was the sixth straight year attendees of SEMICON West were invited to vote on products they saw at the annual trade show.

07/21/2008  Hermes, the Eurpoean consortia for the development and industrialization of embedded die technology, has partnered with Flip Chip International (FCI) to leverage the company's proprietary embeddable die customization (EDC) technology to enable the consortium's pursuit of heterogeneous systems integration.

07/21/2008  By Christian Pichler, Datacon Technology GmbH
Originally targeted to high-end applications, flip chip assembly technology is rapidly finding its way into low-end applications for high-volume products with multiple chips, due to cheaper substrates and cost-effective bumping. This requires high speed and precision, which can be achieved cost-effectively by processing directly from the wafer using tried-and-tested, high-throughput flip-chip bonder platforms.

07/14/2008  IMEC and Qualcomm collaborate on 3D packaging technologies; IPC meets internationally to discuss urgent trends; iNEMI releases recommendations for lead-free alloy alternatives.

07/08/2008  with nutria feeding on the grounds, ducklings gathering in the lake, tulips in bloom, and greening outdoor soccer fields — provided a great spot for quiet thinking.