Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



Cookson expands India R&D center

10/12/2007  October 12, 2007 - Cookson Electronics is finalizing a three-year expansion of its India Research Center, moving to a 32,000-sq.ft. facility in Bangalore where it will focus on semiconductor manufacturing and packaging technologies as well as solar technologies.

Nextreme Introduces Thermal Copper Pillar Bump

10/11/2007  ; Nextreme, manufacturer of micro-scale thermal and power management products, announces the integration of cooling and power generation into the copper pillar bumping process used in high-volume electronic packaging. This breakthrough in flip chip process technology reportedly addresses two serious issues in electronics today — thermal and power management constraints.

Semicon Europa sneak peek: Tracking Europe's present, future in PV, R&D, TAP, MEMS

10/02/2007  After bouncing around on the calendar and in venue, Semicon Europa, formerly a springtime event in Munich, Germany, is ready to open its doors next week in Stuttgart (conveniently at the same time as Germany's second-biggest beer festival, Cannstatter Volksfest...complete with multistory fruit tower). Here follows a quick scan of highlights from Europa's program schedule, and sessions you'll want to bookmark.

Test Socket for QFN Packages — Antares Advanced Test Technologies

10/02/2007  Quatrix Kelvin QFN, the latest test socket from Antares, uses a single set of photolithographic-based contacts, with two distinct electrical connections per terminal, on an IC package. Developed for the migration of Kelvin-configuration testing of QFN packages, it suits test processes from the R&D environment to mass production down to 0.5 mm pitch.

Wafer Inspection System — RVSI

10/02/2007  The WS-3800 Xpress, RVSI's next-generation model in its WS-Series Wafer Inspection Systems, is said to perform macro-defect inspection on up to 115 wafers-per-hour, offering high throughput while maintaining the same high-resolution, advanced macro-inspection capability as its predacessor.

SUSS and partners plan 3-D MEMS packaging seminars

09/27/2007  SUSS MicroTec, NEXX Systems, and Surface Technology Systems (STS) will collaborate with Fraunhofer IZM in a series of seminars to demonstrate integrated processes for 3-D wafer level packaging.

FlipChip International Names VP Sales and Marketing for WLP and Bumping Business

09/25/2007  FlipChip International (FCI) announced the appointment of David McComb as global vice president, sales and marketing for its wafer level packaging (WLP) and bumping business. McComb, who joined FCI in 2005 as the director of European business and sales, will assume responsibilities for sales, marketing, and licensing for FCI's activities for international customers.

Die-attach Paste and Flip Chip Underfill
Henkel


09/18/2007  Hysol QMI708 targets applications with copper leadframes and small footprints. It was developed to attach 2.5- × 2.5-mm and smaller die in QFN and SOIC packages.

Emerging MEMS manufacturers look beyond auto apps

09/12/2007  September 12, 2007 - MEMS revenue will double from $5B in 2005 to $10B in 2011, with a "select group of large, well-established MEMS suppliers" benefiting from growth in the automotive sector, and "new, emerging entrants" to the MEMS market capitalizing on opportunities in consumer, communications, and portable end-product sectors, according to Semiconductor Partners.

Tracking growth in PAT, and the rise of outsourcing

09/11/2007  Global packaging and testing (PAT) revenues are expected to grow at half the rate in 2007 that they did in 2006, and will improve marginally in 2008, according to new data from Gartner Dataquest. A closer look inside the numbers reveals the emergence of outsourced semiconductor assembly and test services (SATS), which is poised to balloon by nearly a third over the next three years and reach equal footing with IDMs.

Plasma, Thermal Partnership Yields Combined Equipment

09/04/2007  UniTemp GmbH, in partnership with plasma-finish GmbH, developed a semiconductor processing and packaging system that combines plasma and thermal applications. The resulting plasma-temperature processing oven, Model PTP, features a compact chamber and fast ramp rates.

What, Me Worry?

09/01/2007 

Viscom Buys IR Inspection Line

08/24/2007  Viscom AG will acquire the MX family of infrared (IR) inspection systems for semiconductor, MEMS, and package inspection from Phoseon Technology. The deal includes intellectual property (IP), product development, licensing, customer base, and employees attached to the inspection line. It will broaden Viscom's offering beyond AOI and X-ray inspection tools, said Volker Pape, co-founder and board member, Viscom.

QLP adds manufacturing site in CA

08/23/2007  August 23, 2007

Surfect launches wafer-bumping service

08/23/2007  August 23, 2007 -- Surfect Technologies says it has launched a wafer bumping service program utilizing its single-cell electroplating process for 200mm and 300mm IC manufacturers and OEMs performing low-volume production, preliminary wafer-level packaging, R&D, or new product introduction (NPI), or evaluating wafer-bumping systems.

Nano Micro Facility Installs Vistec VB6

08/22/2007  The Forschungszentrum Karlsruhe independent science and research institute (Germany) began running applications on a Vistec VB6 electron beam lithography system in its Karlsruhe Nano Micro Facility. The system will allow researchers to develop new applications in nanotechnology and microsystems technologies.

DoD Supplements EI's MCM Contract

08/21/2007  The U.S. Department of Defense (DoD) awarded Endicott Interconnect Technologies, Inc. (EI), a $19 million contract modification to existing work, requiring additional multi chip module (MCM) assemblies and equipment. EI provides fully assembled MCMs for a high-reliability, high-performance DoD computing application.

TDI ramps InGaN substrates for LEDs

08/20/2007  August 17, 2007 - Technologies and Devices International Inc. (TDI) says it is now producing indium-gallium-nitride (InGaN) substrates for packaging GaN-based high-brightness LEDs and blue and green laser diodes, targeting volume production for early 2008.

TSMC Approves WLP Plan

08/15/2007  TSMC board members approved a proposal for capacity investments leading to 300-mm wafer-level packaging (WLP) production capability. The investment equals $59.8 million in capital appropriation. It is designed to reduce form factor for more competitve end products.

TSMC approves 300mm WLP packaging plan, 0.18-micron upgrade

08/15/2007  August 15, 2007 - TSMC board members have given their approval to a pair of proposals targeting capacity investments for 300mm wafer-level packaging and an upgrade to its 200mm/0.18-micron logic process.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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