Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



Satisfying the Appetite of Power-hungry Chips

03/01/2007  Increasing complexity of chips - more transistors operating faster at lower and varied voltages with more I/O - is a well-known phenomenon.

SolVision Nabs IC Inspection Contract

02/28/2007  A major Korean semiconductor contract manufacturer (CM) selected AV6010 vision systems from SolVision Inc. for IC package inspection at its assembly and test house. The manufacturer will use multiple systems to inspect packages, including advanced flip chip devices.

Discera begins shipping MEMS oscillators

02/27/2007  In addition to announcing the shipment of long-anticipated silicon oscillators, Discera Inc. boasts an agreement to help push those MEMS into OEM products. Discera hopes the moves will shake up the $3.5 billion market for quartz crystal oscillators.

SATS Industry Grows 26%

02/27/2007  The global semiconductor assembly and test services (SATS) market grew 25.7% in 2006, the fifth consecutive year this sector has exhibited double-digit growth, according to preliminary reports from Gartner, Inc. The SATS industry, the outsourcing portion of back-end packaging, assembly, and test, is propelled by major transitions to advanced packaging, including wafer-level, chip-scale, flip chip, and system-in-package (SiP) methods, said Jim Walker.

Gartner: Backend chip services surged 26% in 2006

02/26/2007  February 26, 2007 - Worldwide sales of semiconductor assembly and test services (SATS) marked the fifth consecutive year of double-digit growth in 2006, due to accelerated transition to and integration with new packaging technologies, according to data from Gartner Dataquest.

Dynaloy, BASF Expand WLP Partnership

02/22/2007  Dynaloy LLC and BASF AG entered into an expanded sales and distribution agreement for strippers and cleaners used in wafer-level packaging (WLP) and bumping processes. BASF expects the partnership to broaden its back-end semiconductor market penetration, while Dynaloy is targeting Asian and European markets.

Back-end Process — Wafer Bumping

02/20/2007  Advanced Packaging Techniques
By Terence Q. Collier, CVInc.

Traditionally, die are electrically connected to the outside world using fine gold or aluminum wires that attach from the die's bond pad to the land of a substrate or PCB. Wafer bumping involves taking those traditional aluminum pads and converting into a format that provides a desirable structure for solder adhesion (bumping). There are a number of new, old, and relatively untested techniques for bumping wafers.

Honeywell expanding packaging center

02/16/2007  February 16, 2007 - Honeywell Electronic Materials, Tempe, AZ, says it will invest >$1 million to expand its advanced packaging materials R&D center in Spokane, WA.

Honeywell to Expand Packaging Materials R&D

02/15/2007  Honeywell Electronic Materials will expand its Spokane, WA, R&D center for advanced packaging materials, investing more than $1 million and adding about 85 pieces of equipment. The company plans to develop thermal management, electrical interconnect, and burn-in materials. The construction project is expected to finish by the end of 2007.

Vectron Acquires BiODE, Establishes R&D Center

02/06/2007  Vectron International, a Dover company, completed its acquisition of BiODE Inc., a fluid-viscosity sensor and viscometer reader designer and manufacturer. The BiODE organization will be integrated into Vectron's sensors and advanced packaging (SAP) business unit. The company will also construct an R&D facility in Westbrook, ME, to facilitate integration of BiODE's core technologies into Vectron products.

WLP Photoresist Descuming with Plasma Treatment

02/05/2007 

By Scott D. Szymanski, March Plasma Systems

Commercially available plasma treatment systems can be used for a variety of wafer-level packaging (WLP) process steps including removal of photoresist residue after development (i.e. descum); organic, metal, and oxide contamination removal; wafer surface cleaning; and other processes. Through various alterations to the plasma chemistry or chamber configurations, these systems meet demanding WLP processing requirements.

PACKAGING BEAT: Substrates, thin packaging highlight ITRS changes

01/30/2007  A minor update to the International Technology Roadmap for Semiconductors was released in December, before next year's full ITRS revision. An examination of the new content in the assembly and packaging chapter illuminates concerns about package substrates keeping up with advances in silicon technology, as well as a variety of challenges in thinned-die packaging.

ASMI ramps production with AIT's SiP

01/29/2007  January 29, 2007 - AMI Semiconductor is in full production mode with Advanced Interconnect Technologies' (AIT) stacked-die quad flat package no leads (QFN) modules, which AMI will incorporate into several consumer electronics applications, the companies said today.

Consumers, Integration Dictate Future of MEMS, 3-D Packages

01/24/2007  The future of MEMS and 3-D packages relies on similar factors — consumer drivers and increased integration — according to industry analysts. 3-D integration will affect MEMS and IC packaging industries, says Yole Développement's "3-D ICs." Advanced packages require acceptance from the consumer market to reach targets for technological advancement, commercialization, and sector revenues.

Vistec selling to sensor and MEMS manufacturers

01/23/2007  Vistec Semiconductor Systems received orders for infrared inspection equipment from a Japanese sensor manufacturer and an European MEMS manufacturer.

STS lands Pegasus order from Fraunhofer IZM

01/23/2007  Surface Technology Systems, announced that they won an EU tender for an MPX Pegasus system from the Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration IZM.

Ultratech shareholder demands sale

01/16/2007  January 16, 2007 - Thales Fund Management, claiming to be the largest shareholder in San Jose, CA-based photolithography toolmaker Ultratech Inc., is seeking a sale of the company, saying growth prospects can be better monetized as part of a larger organization.

Merger Consolidates Prototyping Services

01/01/2007  PLANO, TX - A merger between CV Inc. Business Solutions, FIB-X, Microtech Analytical Labs LP (MAL), and Fast Semiconductor, Inc. (FAST Semi), has created a full-scale prototyping house for chip-scale, flip chip, BGA, and QFN packages, with bumping and wire-bonding, assembly, failure analysis, design debug, and other packaging services.

2007: Packaging Saves the World

01/01/2007  Perhaps for the first time in electronics, packaging has come into its own. As you read this forecast for 2007, you will notice a new attitude filled with confidence and enthusiasm.

APEX Commemorates 50 Years of IPC

01/01/2007  LOS ANGELES - IPC Printed Circuits Expo/APEX/Designers Summit, February 18-22 in Los Angeles, will host the 50th anniversary celebration of the IPC - Association Connecting Electronic Industries, as well as various other celebratory and informative events.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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