Wafer Level Packaging

WAFER LEVEL PACKAGING ARTICLES



Unitive opens die level processing facility

04/15/2004  (April 15, 2004) Research Triangle Park, N.C.—Unitive Inc. has opened a new Die Level Processing (DLP) facility, which the company says represents the industry's most advanced turnkey chip scale packaging capability. Integrated services include design, wafer bumping, multilayer redistribution, backgrind, dicing, probe, tape and reel, backside laminate, backside metallization and laser marking.

Amkor, CASIO team up to assemble/test wafer-level packages

03/23/2004  (March 23, 2004) Chandler, Ariz.—Amkor Technology Inc., CASIO COMPUTER Co. Ltd. and CASIO MICRONICS Co. Ltd. have established business and technology licensing agreements for assembly and test of wafer-level semiconductor packages.

FlipChip International achieves high-volume lead-free bumping and wafer-scale packaging production

03/17/2004  (March 17, 2004) Phoenix, Ariz.—FlipChip International LLC has achieved high-volume production of lead-free bumping and wafer-scale packaging services for several customers, according to the company.

Blending plastics, semiconductors to form flexible chips

03/11/2004  (March 11, 2004) Fayetteville, Ark.—Disposable cell phones, flexible computer screens and wristwatch computers could be within technology's grasp if organic plastics and electronic materials are combined to share a few traits.

Plastic packaging materials market set for growth, led by laminate substrates

03/11/2004  (March 11, 2004) San Jose, Calif.—The market for semiconductor packaging materials is expected to grow from $7.9 billion in 2003 to $11.7 billion by 2008, according to a just-released study, 'Global Semiconductor Packaging Materials Outlook,' by SEMI and TechSearch International.

Hymite raises $12 million for MEMS packaging

03/09/2004  Hymite A/S, a Denmark-based manufacturer of silicon-based hermetic packages for optoelectronic and MEMS components, announced it closed a second round of financing for $12 million.

Shedding the 'Subcontractor' Moniker

03/01/2004  Those involved with the assembly and packaging end of semiconductor manufacturing are seeing a fundamental change in the role of a few suppliers who used to be lumped under the moniker "subcontractors."

The Roadmap Challenge to Design Services

03/01/2004  MARKET REQUIREMENTS LEAD TO ADOPTION OF NEW TECHNOLOGIES

Feeling Bullish

03/01/2004  ost everywhere you look in our industry, good news abounds.

K&S sells advanced packaging segment

02/10/2004  (February 10, 2004) Willow Grove, Penn.—Kulicke & Soffa Industries Inc. has sold all the assets associated with its advanced packaging technology segment, which consisted solely of the flip chip business.

ChipPac, STATS plan merger

02/10/2004  (February 10, 2004) Singapore and Fremont, Calif.—STATS and ChipPAC have signed a definitive agreement to merge in a stock-for-stock transaction that will result in an independent semiconductor assembly and test solutions company that is one of the larger test houses in the world.

K&S selling flip chip biz

02/09/2004  February 9, 2004 - Kulicke & Soffa Industries Inc., Willow Grove, PA, said it has sold its flip-chip business to FlipChip International LLC for $3.4 million in cash and liabilities.

'SiPs or SoCs?' conference is coming right up

02/03/2004  (February 3, 2004) Why do companies continue to work on development of SoC solutions rather than focusing on a SiP solution? This will be the focus of an upcoming 1-day technical symposium presented by the MicroElectronics Packaging and Test Engineering Council (MEPTEC) organization on February 19. Some of the speakers of the upcoming conference have offered their insights into the pros and cons of the two technologies.

Global Trends in Lead-free Soldering

02/01/2004  PART II OF A II-PART SERIES ON LEAD-FREE

Flip Chip Cleaning with Vapor Phase Solvents

02/01/2004  Active Solvent Concentration is Essential Driver for Cleaning

You Said It

02/01/2004  In the period of time between the end of winter holidays and the buildup to spring activities, readers become a little more social.

Electronics Interconnections for Extreme Environments

02/01/2004  In January 2004, NASA landed two rovers named Spirit and Opportunity on Mars to explore the surface and gather geologic information to beam back to Earth.

Tessera, Oki sign packaging deal

01/26/2004  January 26, 2004 - Oki Electric Industry Co. Ltd. has licensed semiconductor packaging technology from Tessera Technologies, San Jose, CA, for use in devices including microcontrollers and ASICs.

Tessera and Oki sign licensing agreement

01/26/2004  (January 26, 2004) San Jose, Calif.—Tessera Technologies Inc. and Oki Electric Industry Co. Ltd. have signed a new licensing agreement. Oki and their subcontract assemblers plan to use Tessera's semiconductor packaging technology in devices such as microcontrollers and ASICs.

Amkor reports surge in demand, plans capacity expansion

01/23/2004  (January 23, 2004) Chandler, Ariz.— Amkor Technology Inc., citing an accelerating demand for advanced packaging solutions for cell phones and other handheld applications, is aggressively expanding capacity for stacked chip-scale packages (S-CSPs). Amkor's factories in Korea and Japan already produce stacked packages. The company will install S-CSP capacity in its factories in Taiwan and China early in 2004.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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