Wafer Processing

WAFER PROCESSING ARTICLES



Model-based-mask-data-prep-Solving-the-impossible-mask

03/10/2011 

SPIE Advanced Lithography eBeam Initiative annual meeting, circle shot imageAki Fujimura, chairman & CEO of D2S, provides an update of the eBeam Initiative roadmap. Speaking at SPIE Advanced Lithography with editor Debra Vogler, Fujimura recalls mask cost/yield and write time developments, summarizes the eBeam Initiative's meeting, and describes member Dai-Nippon Printing's impressive time results with an "impossible" mask.

SEMATECH reports die to wafer bonding progress for 3D integration

03/09/2011 

SEMATECH experts reported new breakthroughs in wafer bonding at the 7th Annual Device Packaging Conference (DPC), March 7-10 in Scottsdale, AZ. Low-temp die tacking has yielded faster die-to-wafer integration.

The 10 chipmaker "powers" that suppliers need to know

03/09/2011 

A new "power" rankings list of chipmakers reiterates how 300mm chipmaking capacity is being concentrated to a select group of players -- i.e., the ones that equipment and materials suppliers will need to focus on for future business.

Hermetic wafer level packaging lowers cost with IMT Au Au bond

03/08/2011 

IMT introduced its hermetic gold-to-gold (Au-Au) thermo compression bonding for wafer-level packaging (WLP). In development for nearly a year, this bond is being actively used in production.

AMAT-inspection-Magma-yield-analysis-integration-accelerates-litho-quals-better-chip-yields

03/08/2011 

Excalibur Litho from Applied Materials (AMAT) and Magma Design AutomationApplied Materials integrated Magma's CAD-based navigation and yield analysis software with AMAT inspection systems; it's called Excalibur Litho and targets designs at 2xnm and below. Ankush Oberai, Magma and Erez Paran, AMAT, explain why hot spot identification and real line data for libraries will fuel better lithography processes.

Carl-Zeiss-photomask-registration-correction-system-RegC-debuts

03/02/2011 

Carl Zeiss RegCCarl Zeiss introduced a new production tool aimed to improve registration and overlay of advanced photomasks. RegC is based on ZEISS femtosecond-laser technology. RegC enables correction on high-end photomasks for remaining registration errors after the pattern generation process. Current results show registration improvements over 50% in advanced lithography.

Wafer probe parameters for current carrying capability in semiconductor test Microprobe

03/01/2011 

Typical plot resulting from the SEMI methodology; a 20% contact force reduction marks the CCC spec. CCC improvement achieved through probe material conductivity (electrical and thermal) and high temperature strength increase. 75µm probe deflection.The trend toward complex semiconductor devices is fueling demand for more advanced wafer probe cards capable of accurately and cost-effectively testing these ICs, says January Kister, Microprobe. Kister examines the variables that impact current carrying capability (CCC) during semiconductor wafer test, and describe an optimal probe design with a composite metal structure.

Leveraging ion implant process characteristics to facilitate 22nm devices

03/01/2011  Using implant as a precision material modification in contrast to its traditional role as a semiconductor dopant tool, provides enabling technology and new applications. James L. Kawski, Varian Semiconductor Equipment Associates, Gloucester, MA USA

Tackling the rising cost-of-test for semiconductor devices

03/01/2011  Kenneth A Ramsey, Executive Vice President, MCT Worldwide, LLC, Minneapolis, MN USA

High-k metal gate characterization using picosecond ultrasonic technology

03/01/2011  Picosecond ultrasonic technology can be used during various stages of process development, integration, and volume manufacturing for monitoring the HKMG stack; this information can be used to characterize the process, and optimize deposition and CMP processes. J. Dai, P. Mukundhan, J. Chen, J. Tan, Rudolph Technologies, Flanders, NJ USA; D.B. Hsieh, T.C. Tsai, 1-United Microelectronics Corp., Tainan, Taiwan

SoftJin-enhances-defect-analysis-software

02/25/2011 

SoftJin NxDAT defect analysis softwareSoftJin Technologies, a provider of customized automation software for electronic design and manufacturing, enhanced NxDAT, its defect analysis software. The enhanced version of NxDAT is optimized for better speed and memory performance.

Sapphire wafer carriers debut from Meller Optics

02/24/2011 

Meller Optics sapphire wafer carriers.Custom fabricated sapphire wafer carriers that are uniform, parallel, and impervious to solvents and etchants for thinning semiconductor materials are available from Meller Optics Inc.

Si-wafer-double-side-lapping-system-upgrades-Novellus-Peter-Wolters

02/24/2011 

Peter Wolters lapping systemNovellus Systems subsidiary Peter Wolters GmbH introduced a new version of its microLine double side lapping system for prime silicon wafers. The AC-2100L system features independently driven inner and outer pin rings, automatic force calibration, and in-situ wafer thickness metrology.

SICAS 4Q10 data: Output lags capacity, utilization dips

02/22/2011 

Wafer capacity rose about twice as fast as output in the 2010 calendar year-ending quarter, so utilization rates pulled back slightly -- but one sector showed surprising strength.

Veeco GaN MOCVD tool debut

02/17/2011 

Veeco's TurboDisc MaxBright MOCVD, LED TV penetration Veeco Instruments' new TurboDisc MaxBright GaN MOCVD multi-reactor system is poised to take advantage of what the company believes is an accelerated rate of LED TV penetration. The new system targets manufacturing of HB-LEDs and is capable of single- or multi-chamber layer growth.

Taiwan DRAM consolidation take 2: Elpida pulls in Powerchip, ProMOS

02/17/2011 

Finally feeling the heat of price whipsaws (or withering stare of inevitability), Taiwan DRAM players seem ready to embrace tie-ups with Japan's Elpida Memory.

Camtek logs CMOS image sensor inspection unit orders

02/15/2011 

Camtek Ltd. (Nasdaq:CAMT; TASE:CAMT) received an order for multiple wafer inspection systems from one of the world's largest manufacturers of CMOS image sensors (CIS).

Wafer shipments surge in 2010, sales still catching up

02/15/2011 

Global wafer shipments and revenues rebounded strongly in 2010, according to updated data from SEMI's Silicon Manufacturers Group (SMG) -- but one is at record levels while the other lags behind.

Keithley Avoid wafer test probe set up cabling errors

02/14/2011 

Dave Rose, Keithley Instruments, addresses specific cabling techniques for DC, multi-frequency capacitance, and ultra-fast I-V and pulse testing, as well as the importance of proper grounding and shielding, choosing the proper interconnect for a specific measurement, and troubleshooting common interconnect problems.

Avantor plans Taiwan materials lab with wafer fab, metrology tools in 100 cleanroom

02/11/2011 

Avantor Performance Materials, Inc. (formerly Mallinckrodt Baker, Inc.) plans to open an electronics applications laboratory in Taiwan in 2Q11, to conduct customer demos, perform process-of-record (POR) development, and support the company's global electronics technologies development.




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Environment, Safety & Health

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The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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