Wafer Processing

WAFER PROCESSING ARTICLES



Toronto physicists squeeze light to quantum limit

01/07/2009  January 7, 2009: A team of University of Toronto physicists have demonstrated a new technique to squeeze light to the fundamental quantum limit, a finding that has potential applications for high-precision measurement, next-generation atomic clocks, novel quantum computing and our most fundamental understanding of the universe.

Fab spending still a "wild ride" in 2009

01/01/2009  Spending on equipping of frontend semiconductor fabs is expected to plummet 31% in 2008 to $26 billion, and recent announcements suggest another 30%-40% decline in 2009, resulting in the lowest spending level over the past 10 years. This article tracks the changing landscape of semiconductor fab spending, and what the future holds for 2009 and beyond.

Through-wafer Inspection for MEMS Devices — a Comparison

01/01/2009  Defect detection within MEMS devices is vital to ensure their operation, but many mechanical properties cannot be determined through electrical or functional test.

Behind the Scenes

01/01/2009  On a picture-perfect day in October, the Advanced Packaging roadshow crew took to the autobahn from Stuttgart, Germany to Hanau, to tour Umicore Electronic Materials.

Overlay control goes to high-order

12/24/2008  More challenging overlay requirements are driving a trend to use high-order control knobs for production set-up of scanners. This article explores the overlay requirements that are driving this trend, the challenges involved with implementing in production, and the cost-of-ownership trade-offs between different high-order control strategies.

Wafer-based solar cells aren't done yet

12/23/2008  Once content to salvage silicon scrap from the IC industry, manufacturers of wafer-based solar cells have become the largest consumer of high-purity silicon. Rising raw material costs and the emergence of less expensive alternative technologies have led manufacturers to find ways to rapidly reduce their silicon consumption in some nifty ways.

Everybody's Gone Home for Christmas

12/16/2008  Let's Hope They Eventually Come Back
By Jim Walker, Gartner/Dataquest
Even though we all like to hear "Merry Christmas" and "Happy New Year" during this holiday season, our worldwide financial meltdown has made it much less cheerful. The outlook for 2009 is very bleak for worldwide economies and, more specifically, the semiconductor industry.

Multitest to Merge with ECT Semiconductor Test Group

12/12/2008  Multitest Elektronische Systeme GmbH announced it will merge with the Everett Charles Technologies, semiconductor test group (STG). While the original brand names will reportedly be maintained, the key objective of this merger is to leverage combined strengths.

Wafer-level Probe Operating Environment

12/11/2008  The ProberBench Operating Environment, from SUSS MicroTec Test Systems, is a full-featured software suite designed for efficient, intuitive and safe wafer-level probing. The ProberBench Operating Environment, from SUSS MicroTec Test Systems is a full-featured software suite designed for efficient, intuitive and safe wafer-level probing. Development of the interface and architecture was reportedly based on a three-month user study in the laboratories semiconductor design houses and manufacturers.

SEMI: 500K jobs at risk with EU chip decline

12/11/2008  In a pre-emptive measure to avert an increase in unemployment throughout Europe, SEMI is appealing to EU and national policymakers to invest in Europe's semiconductor industry, citing its importance to the health and global competitiveness of the EU economy.

ASML "double-dips" with updated litho tool

12/10/2008  MLW peers under the hood of ASML's new NXT 1950i with company exec Frank van de Mast to understand the platform's benefits for double-patterned immersion litho, as well as leading-edge single patterning and spacer-layer DPT applications, and even EUV.

High-powered Ultra-violet Laser

12/09/2008  The Q304-HD laser from JDSU is a high-powered ultra-violet (UV) laser based upon the company's Q Series UV laser platform. This laser reportedly provides 50% more power and is designed to increase throughput, or the rate at which it conducts micromachining functions such as hole drilling, wafer cutting or singulation, and solar cell processing.

A measurement method for wafer-level 1/f noise

12/09/2008  In MOSFETs used for analog and RF circuits, 1/f noise is an important figure of merit. This article describes a wafer-level measurement method and setup to evaluate the 1/f noise of MOSFETs, which can be automatically performed on the wafer and can measure <100Hz low-frequency noise components.

Analyst: Foundries face "historical lows" in utilization

12/06/2008  Wafer shipments at the world's top two foundries, TSMC and UMC, are set to plunge further than anticipated in 4Q, but the picture for 1Q is even uglier with "historic lows" looming for utilizations, according to an analyst report.

Report: Merger imminent for China's Hua Hong NEC, Grace Semi

12/02/2008  Chinese foundries Hua Hong NEC (HHNEC) and Grace Semiconductor Manufacturing Corp. are finalizing merger plans in the next few weeks, according to a report by Digitimes citing a local chip industry group.

Applied Materials leads TSV drive for 3D ICs

12/01/2008  December 1, 2008: Applied Materials Inc. says it is leading a major effort to enable the widespread adoption of through-silicon vias (TSVs) for vertically stacking integrated circuits (ICs) to boost chip performance and functionality, working internally and with other equipment suppliers to develop an integrated, high-performance on-wafer process flow to lower costs, reduce risk, and accelerate time-to-market for customers.

Letter to the Editor

12/01/2008  I would like to clarify the comments you attributed to me as a result of our conversation at IMAPS International. I do not believe I said that through silicon vias (TSVs) were a pipedream, nor did I doubt that they would be adopted. What I said was that they would not be adopted at the rate projected. That is why I referenced the flip chip vs. wire bond issue as an historical reference.

When photoresist is not enough

11/26/2008  Pattern transfer is becoming trickier at 4x/32nm nodes and beyond, with thinner resist layers and higher aspect ratios/etch requirements for both logic and memory. Enter ashable hardmasks as a possible solution. Novellus VP Tim Archer tells SST about the company's strategy and technology to address this pain point.

STATS ChipPAC Expands QFN Portfolio

11/25/2008  STATS ChipPAC Ltd. has expanded its quad flat no-lead (QFN) packaging portfolio with a strip-etch version for applications requiring increased design flexibility and higher input/output (I/O) performance in a small, thin package profile. The new QFN package family, referred to as QFNs-se, reportedly features a higher number of very thin I/O terminal pads than conventional single or dual-row QFN or leadframe-based quad flat packages (QFPs).

EV Group Reports Continued Growth

11/20/2008  Crediting the continued demand in the 3D interconnect interconnect/through-silicon via (TSV) an nanoimprint lithography markets, EV Group reports an increase in revenue for 2008 of more than 15%. Despite the current global economic slowdown, the company says it remains cautiously optimistic about its outlook for 2009 given the expected growth opportunities to ensue as these novel technologies gain market acceptance/penetration.




WEBCASTS



Environment, Safety & Health

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The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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